0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the r8a7742 SoC
0004 *
0005 * Copyright (C) 2020 Renesas Electronics Corp.
0006 */
0007
0008 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
0009 #include <dt-bindings/interrupt-controller/arm-gic.h>
0010 #include <dt-bindings/interrupt-controller/irq.h>
0011 #include <dt-bindings/power/r8a7742-sysc.h>
0012
0013 / {
0014 compatible = "renesas,r8a7742";
0015 #address-cells = <2>;
0016 #size-cells = <2>;
0017
0018 /*
0019 * The external audio clocks are configured as 0 Hz fixed frequency
0020 * clocks by default.
0021 * Boards that provide audio clocks should override them.
0022 */
0023 audio_clk_a: audio_clk_a {
0024 compatible = "fixed-clock";
0025 #clock-cells = <0>;
0026 clock-frequency = <0>;
0027 };
0028 audio_clk_b: audio_clk_b {
0029 compatible = "fixed-clock";
0030 #clock-cells = <0>;
0031 clock-frequency = <0>;
0032 };
0033 audio_clk_c: audio_clk_c {
0034 compatible = "fixed-clock";
0035 #clock-cells = <0>;
0036 clock-frequency = <0>;
0037 };
0038
0039 /* External CAN clock */
0040 can_clk: can {
0041 compatible = "fixed-clock";
0042 #clock-cells = <0>;
0043 /* This value must be overridden by the board. */
0044 clock-frequency = <0>;
0045 };
0046
0047 cpus {
0048 #address-cells = <1>;
0049 #size-cells = <0>;
0050
0051 cpu0: cpu@0 {
0052 device_type = "cpu";
0053 compatible = "arm,cortex-a15";
0054 reg = <0>;
0055 clock-frequency = <1400000000>;
0056 clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
0057 power-domains = <&sysc R8A7742_PD_CA15_CPU0>;
0058 enable-method = "renesas,apmu";
0059 next-level-cache = <&L2_CA15>;
0060 capacity-dmips-mhz = <1024>;
0061 voltage-tolerance = <1>; /* 1% */
0062 clock-latency = <300000>; /* 300 us */
0063
0064 /* kHz - uV - OPPs unknown yet */
0065 operating-points = <1400000 1000000>,
0066 <1225000 1000000>,
0067 <1050000 1000000>,
0068 < 875000 1000000>,
0069 < 700000 1000000>,
0070 < 350000 1000000>;
0071 };
0072
0073 cpu1: cpu@1 {
0074 device_type = "cpu";
0075 compatible = "arm,cortex-a15";
0076 reg = <1>;
0077 clock-frequency = <1400000000>;
0078 clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
0079 power-domains = <&sysc R8A7742_PD_CA15_CPU1>;
0080 enable-method = "renesas,apmu";
0081 next-level-cache = <&L2_CA15>;
0082 capacity-dmips-mhz = <1024>;
0083 voltage-tolerance = <1>; /* 1% */
0084 clock-latency = <300000>; /* 300 us */
0085
0086 /* kHz - uV - OPPs unknown yet */
0087 operating-points = <1400000 1000000>,
0088 <1225000 1000000>,
0089 <1050000 1000000>,
0090 < 875000 1000000>,
0091 < 700000 1000000>,
0092 < 350000 1000000>;
0093 };
0094
0095 cpu2: cpu@2 {
0096 device_type = "cpu";
0097 compatible = "arm,cortex-a15";
0098 reg = <2>;
0099 clock-frequency = <1400000000>;
0100 clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
0101 power-domains = <&sysc R8A7742_PD_CA15_CPU2>;
0102 enable-method = "renesas,apmu";
0103 next-level-cache = <&L2_CA15>;
0104 capacity-dmips-mhz = <1024>;
0105 voltage-tolerance = <1>; /* 1% */
0106 clock-latency = <300000>; /* 300 us */
0107
0108 /* kHz - uV - OPPs unknown yet */
0109 operating-points = <1400000 1000000>,
0110 <1225000 1000000>,
0111 <1050000 1000000>,
0112 < 875000 1000000>,
0113 < 700000 1000000>,
0114 < 350000 1000000>;
0115 };
0116
0117 cpu3: cpu@3 {
0118 device_type = "cpu";
0119 compatible = "arm,cortex-a15";
0120 reg = <3>;
0121 clock-frequency = <1400000000>;
0122 clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
0123 power-domains = <&sysc R8A7742_PD_CA15_CPU3>;
0124 enable-method = "renesas,apmu";
0125 next-level-cache = <&L2_CA15>;
0126 capacity-dmips-mhz = <1024>;
0127 voltage-tolerance = <1>; /* 1% */
0128 clock-latency = <300000>; /* 300 us */
0129
0130 /* kHz - uV - OPPs unknown yet */
0131 operating-points = <1400000 1000000>,
0132 <1225000 1000000>,
0133 <1050000 1000000>,
0134 < 875000 1000000>,
0135 < 700000 1000000>,
0136 < 350000 1000000>;
0137 };
0138
0139 cpu4: cpu@100 {
0140 device_type = "cpu";
0141 compatible = "arm,cortex-a7";
0142 reg = <0x100>;
0143 clock-frequency = <780000000>;
0144 clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
0145 power-domains = <&sysc R8A7742_PD_CA7_CPU0>;
0146 next-level-cache = <&L2_CA7>;
0147 };
0148
0149 cpu5: cpu@101 {
0150 device_type = "cpu";
0151 compatible = "arm,cortex-a7";
0152 reg = <0x101>;
0153 clock-frequency = <780000000>;
0154 clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
0155 power-domains = <&sysc R8A7742_PD_CA7_CPU1>;
0156 next-level-cache = <&L2_CA7>;
0157 };
0158
0159 cpu6: cpu@102 {
0160 device_type = "cpu";
0161 compatible = "arm,cortex-a7";
0162 reg = <0x102>;
0163 clock-frequency = <780000000>;
0164 clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
0165 power-domains = <&sysc R8A7742_PD_CA7_CPU2>;
0166 next-level-cache = <&L2_CA7>;
0167 };
0168
0169 cpu7: cpu@103 {
0170 device_type = "cpu";
0171 compatible = "arm,cortex-a7";
0172 reg = <0x103>;
0173 clock-frequency = <780000000>;
0174 clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
0175 power-domains = <&sysc R8A7742_PD_CA7_CPU3>;
0176 next-level-cache = <&L2_CA7>;
0177 };
0178
0179 L2_CA15: cache-controller-0 {
0180 compatible = "cache";
0181 power-domains = <&sysc R8A7742_PD_CA15_SCU>;
0182 cache-unified;
0183 cache-level = <2>;
0184 };
0185
0186 L2_CA7: cache-controller-1 {
0187 compatible = "cache";
0188 power-domains = <&sysc R8A7742_PD_CA7_SCU>;
0189 cache-unified;
0190 cache-level = <2>;
0191 };
0192 };
0193
0194 /* External root clock */
0195 extal_clk: extal {
0196 compatible = "fixed-clock";
0197 #clock-cells = <0>;
0198 /* This value must be overridden by the board. */
0199 clock-frequency = <0>;
0200 };
0201
0202 /* External PCIe clock - can be overridden by the board */
0203 pcie_bus_clk: pcie_bus {
0204 compatible = "fixed-clock";
0205 #clock-cells = <0>;
0206 clock-frequency = <0>;
0207 };
0208
0209 pmu-0 {
0210 compatible = "arm,cortex-a15-pmu";
0211 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
0212 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
0213 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
0214 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
0215 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
0216 };
0217
0218 pmu-1 {
0219 compatible = "arm,cortex-a7-pmu";
0220 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
0221 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
0222 <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
0223 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
0224 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
0225 };
0226
0227 /* External SCIF clock */
0228 scif_clk: scif {
0229 compatible = "fixed-clock";
0230 #clock-cells = <0>;
0231 /* This value must be overridden by the board. */
0232 clock-frequency = <0>;
0233 };
0234
0235 soc {
0236 compatible = "simple-bus";
0237 interrupt-parent = <&gic>;
0238
0239 #address-cells = <2>;
0240 #size-cells = <2>;
0241 ranges;
0242
0243 rwdt: watchdog@e6020000 {
0244 compatible = "renesas,r8a7742-wdt",
0245 "renesas,rcar-gen2-wdt";
0246 reg = <0 0xe6020000 0 0x0c>;
0247 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0248 clocks = <&cpg CPG_MOD 402>;
0249 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0250 resets = <&cpg 402>;
0251 status = "disabled";
0252 };
0253
0254 gpio0: gpio@e6050000 {
0255 compatible = "renesas,gpio-r8a7742",
0256 "renesas,rcar-gen2-gpio";
0257 reg = <0 0xe6050000 0 0x50>;
0258 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0259 #gpio-cells = <2>;
0260 gpio-controller;
0261 gpio-ranges = <&pfc 0 0 32>;
0262 #interrupt-cells = <2>;
0263 interrupt-controller;
0264 clocks = <&cpg CPG_MOD 912>;
0265 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0266 resets = <&cpg 912>;
0267 };
0268
0269 gpio1: gpio@e6051000 {
0270 compatible = "renesas,gpio-r8a7742",
0271 "renesas,rcar-gen2-gpio";
0272 reg = <0 0xe6051000 0 0x50>;
0273 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0274 #gpio-cells = <2>;
0275 gpio-controller;
0276 gpio-ranges = <&pfc 0 32 30>;
0277 #interrupt-cells = <2>;
0278 interrupt-controller;
0279 clocks = <&cpg CPG_MOD 911>;
0280 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0281 resets = <&cpg 911>;
0282 };
0283
0284 gpio2: gpio@e6052000 {
0285 compatible = "renesas,gpio-r8a7742",
0286 "renesas,rcar-gen2-gpio";
0287 reg = <0 0xe6052000 0 0x50>;
0288 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0289 #gpio-cells = <2>;
0290 gpio-controller;
0291 gpio-ranges = <&pfc 0 64 30>;
0292 #interrupt-cells = <2>;
0293 interrupt-controller;
0294 clocks = <&cpg CPG_MOD 910>;
0295 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0296 resets = <&cpg 910>;
0297 };
0298
0299 gpio3: gpio@e6053000 {
0300 compatible = "renesas,gpio-r8a7742",
0301 "renesas,rcar-gen2-gpio";
0302 reg = <0 0xe6053000 0 0x50>;
0303 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0304 #gpio-cells = <2>;
0305 gpio-controller;
0306 gpio-ranges = <&pfc 0 96 32>;
0307 #interrupt-cells = <2>;
0308 interrupt-controller;
0309 clocks = <&cpg CPG_MOD 909>;
0310 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0311 resets = <&cpg 909>;
0312 };
0313
0314 gpio4: gpio@e6054000 {
0315 compatible = "renesas,gpio-r8a7742",
0316 "renesas,rcar-gen2-gpio";
0317 reg = <0 0xe6054000 0 0x50>;
0318 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0319 #gpio-cells = <2>;
0320 gpio-controller;
0321 gpio-ranges = <&pfc 0 128 32>;
0322 #interrupt-cells = <2>;
0323 interrupt-controller;
0324 clocks = <&cpg CPG_MOD 908>;
0325 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0326 resets = <&cpg 908>;
0327 };
0328
0329 gpio5: gpio@e6055000 {
0330 compatible = "renesas,gpio-r8a7742",
0331 "renesas,rcar-gen2-gpio";
0332 reg = <0 0xe6055000 0 0x50>;
0333 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0334 #gpio-cells = <2>;
0335 gpio-controller;
0336 gpio-ranges = <&pfc 0 160 32>;
0337 #interrupt-cells = <2>;
0338 interrupt-controller;
0339 clocks = <&cpg CPG_MOD 907>;
0340 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0341 resets = <&cpg 907>;
0342 };
0343
0344 pfc: pinctrl@e6060000 {
0345 compatible = "renesas,pfc-r8a7742";
0346 reg = <0 0xe6060000 0 0x250>;
0347 };
0348
0349 tpu: pwm@e60f0000 {
0350 compatible = "renesas,tpu-r8a7742", "renesas,tpu";
0351 reg = <0 0xe60f0000 0 0x148>;
0352 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
0353 clocks = <&cpg CPG_MOD 304>;
0354 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0355 resets = <&cpg 304>;
0356 #pwm-cells = <3>;
0357 status = "disabled";
0358 };
0359
0360 cpg: clock-controller@e6150000 {
0361 compatible = "renesas,r8a7742-cpg-mssr";
0362 reg = <0 0xe6150000 0 0x1000>;
0363 clocks = <&extal_clk>, <&usb_extal_clk>;
0364 clock-names = "extal", "usb_extal";
0365 #clock-cells = <2>;
0366 #power-domain-cells = <0>;
0367 #reset-cells = <1>;
0368 };
0369
0370 apmu@e6151000 {
0371 compatible = "renesas,r8a7742-apmu", "renesas,apmu";
0372 reg = <0 0xe6151000 0 0x188>;
0373 cpus = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
0374 };
0375
0376 apmu@e6152000 {
0377 compatible = "renesas,r8a7742-apmu", "renesas,apmu";
0378 reg = <0 0xe6152000 0 0x188>;
0379 cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
0380 };
0381
0382 rst: reset-controller@e6160000 {
0383 compatible = "renesas,r8a7742-rst";
0384 reg = <0 0xe6160000 0 0x0100>;
0385 };
0386
0387 sysc: system-controller@e6180000 {
0388 compatible = "renesas,r8a7742-sysc";
0389 reg = <0 0xe6180000 0 0x0200>;
0390 #power-domain-cells = <1>;
0391 };
0392
0393 irqc: interrupt-controller@e61c0000 {
0394 compatible = "renesas,irqc-r8a7742", "renesas,irqc";
0395 #interrupt-cells = <2>;
0396 interrupt-controller;
0397 reg = <0 0xe61c0000 0 0x200>;
0398 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0399 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0400 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0401 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
0402 clocks = <&cpg CPG_MOD 407>;
0403 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0404 resets = <&cpg 407>;
0405 };
0406
0407 thermal: thermal@e61f0000 {
0408 compatible = "renesas,thermal-r8a7742",
0409 "renesas,rcar-gen2-thermal";
0410 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
0411 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
0412 clocks = <&cpg CPG_MOD 522>;
0413 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0414 resets = <&cpg 522>;
0415 #thermal-sensor-cells = <0>;
0416 };
0417
0418 ipmmu_sy0: iommu@e6280000 {
0419 compatible = "renesas,ipmmu-r8a7742",
0420 "renesas,ipmmu-vmsa";
0421 reg = <0 0xe6280000 0 0x1000>;
0422 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
0423 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
0424 #iommu-cells = <1>;
0425 status = "disabled";
0426 };
0427
0428 ipmmu_sy1: iommu@e6290000 {
0429 compatible = "renesas,ipmmu-r8a7742",
0430 "renesas,ipmmu-vmsa";
0431 reg = <0 0xe6290000 0 0x1000>;
0432 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
0433 #iommu-cells = <1>;
0434 status = "disabled";
0435 };
0436
0437 ipmmu_ds: iommu@e6740000 {
0438 compatible = "renesas,ipmmu-r8a7742",
0439 "renesas,ipmmu-vmsa";
0440 reg = <0 0xe6740000 0 0x1000>;
0441 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
0442 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
0443 #iommu-cells = <1>;
0444 status = "disabled";
0445 };
0446
0447 ipmmu_mp: iommu@ec680000 {
0448 compatible = "renesas,ipmmu-r8a7742",
0449 "renesas,ipmmu-vmsa";
0450 reg = <0 0xec680000 0 0x1000>;
0451 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
0452 #iommu-cells = <1>;
0453 status = "disabled";
0454 };
0455
0456 ipmmu_mx: iommu@fe951000 {
0457 compatible = "renesas,ipmmu-r8a7742",
0458 "renesas,ipmmu-vmsa";
0459 reg = <0 0xfe951000 0 0x1000>;
0460 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
0461 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
0462 #iommu-cells = <1>;
0463 status = "disabled";
0464 };
0465
0466 icram0: sram@e63a0000 {
0467 compatible = "mmio-sram";
0468 reg = <0 0xe63a0000 0 0x12000>;
0469 #address-cells = <1>;
0470 #size-cells = <1>;
0471 ranges = <0 0 0xe63a0000 0x12000>;
0472 };
0473
0474 icram1: sram@e63c0000 {
0475 compatible = "mmio-sram";
0476 reg = <0 0xe63c0000 0 0x1000>;
0477 #address-cells = <1>;
0478 #size-cells = <1>;
0479 ranges = <0 0 0xe63c0000 0x1000>;
0480
0481 smp-sram@0 {
0482 compatible = "renesas,smp-sram";
0483 reg = <0 0x100>;
0484 };
0485 };
0486
0487 icram2: sram@e6300000 {
0488 compatible = "mmio-sram";
0489 reg = <0 0xe6300000 0 0x40000>;
0490 #address-cells = <1>;
0491 #size-cells = <1>;
0492 ranges = <0 0 0xe6300000 0x40000>;
0493 };
0494
0495 i2c0: i2c@e6508000 {
0496 #address-cells = <1>;
0497 #size-cells = <0>;
0498 compatible = "renesas,i2c-r8a7742",
0499 "renesas,rcar-gen2-i2c";
0500 reg = <0 0xe6508000 0 0x40>;
0501 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0502 clocks = <&cpg CPG_MOD 931>;
0503 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0504 resets = <&cpg 931>;
0505 i2c-scl-internal-delay-ns = <110>;
0506 status = "disabled";
0507 };
0508
0509 i2c1: i2c@e6518000 {
0510 #address-cells = <1>;
0511 #size-cells = <0>;
0512 compatible = "renesas,i2c-r8a7742",
0513 "renesas,rcar-gen2-i2c";
0514 reg = <0 0xe6518000 0 0x40>;
0515 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
0516 clocks = <&cpg CPG_MOD 930>;
0517 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0518 resets = <&cpg 930>;
0519 i2c-scl-internal-delay-ns = <6>;
0520 status = "disabled";
0521 };
0522
0523 i2c2: i2c@e6530000 {
0524 #address-cells = <1>;
0525 #size-cells = <0>;
0526 compatible = "renesas,i2c-r8a7742",
0527 "renesas,rcar-gen2-i2c";
0528 reg = <0 0xe6530000 0 0x40>;
0529 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
0530 clocks = <&cpg CPG_MOD 929>;
0531 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0532 resets = <&cpg 929>;
0533 i2c-scl-internal-delay-ns = <6>;
0534 status = "disabled";
0535 };
0536
0537 i2c3: i2c@e6540000 {
0538 #address-cells = <1>;
0539 #size-cells = <0>;
0540 compatible = "renesas,i2c-r8a7742",
0541 "renesas,rcar-gen2-i2c";
0542 reg = <0 0xe6540000 0 0x40>;
0543 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
0544 clocks = <&cpg CPG_MOD 928>;
0545 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0546 resets = <&cpg 928>;
0547 i2c-scl-internal-delay-ns = <110>;
0548 status = "disabled";
0549 };
0550
0551 iic0: i2c@e6500000 {
0552 #address-cells = <1>;
0553 #size-cells = <0>;
0554 compatible = "renesas,iic-r8a7742",
0555 "renesas,rcar-gen2-iic",
0556 "renesas,rmobile-iic";
0557 reg = <0 0xe6500000 0 0x425>;
0558 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
0559 clocks = <&cpg CPG_MOD 318>;
0560 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
0561 <&dmac1 0x61>, <&dmac1 0x62>;
0562 dma-names = "tx", "rx", "tx", "rx";
0563 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0564 resets = <&cpg 318>;
0565 status = "disabled";
0566 };
0567
0568 iic1: i2c@e6510000 {
0569 #address-cells = <1>;
0570 #size-cells = <0>;
0571 compatible = "renesas,iic-r8a7742",
0572 "renesas,rcar-gen2-iic",
0573 "renesas,rmobile-iic";
0574 reg = <0 0xe6510000 0 0x425>;
0575 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
0576 clocks = <&cpg CPG_MOD 323>;
0577 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
0578 <&dmac1 0x65>, <&dmac1 0x66>;
0579 dma-names = "tx", "rx", "tx", "rx";
0580 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0581 resets = <&cpg 323>;
0582 status = "disabled";
0583 };
0584
0585 iic2: i2c@e6520000 {
0586 #address-cells = <1>;
0587 #size-cells = <0>;
0588 compatible = "renesas,iic-r8a7742",
0589 "renesas,rcar-gen2-iic",
0590 "renesas,rmobile-iic";
0591 reg = <0 0xe6520000 0 0x425>;
0592 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
0593 clocks = <&cpg CPG_MOD 300>;
0594 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
0595 <&dmac1 0x69>, <&dmac1 0x6a>;
0596 dma-names = "tx", "rx", "tx", "rx";
0597 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0598 resets = <&cpg 300>;
0599 status = "disabled";
0600 };
0601
0602 iic3: i2c@e60b0000 {
0603 #address-cells = <1>;
0604 #size-cells = <0>;
0605 compatible = "renesas,iic-r8a7742",
0606 "renesas,rcar-gen2-iic",
0607 "renesas,rmobile-iic";
0608 reg = <0 0xe60b0000 0 0x425>;
0609 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
0610 clocks = <&cpg CPG_MOD 926>;
0611 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
0612 <&dmac1 0x77>, <&dmac1 0x78>;
0613 dma-names = "tx", "rx", "tx", "rx";
0614 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0615 resets = <&cpg 926>;
0616 status = "disabled";
0617 };
0618
0619 hsusb: usb@e6590000 {
0620 compatible = "renesas,usbhs-r8a7742",
0621 "renesas,rcar-gen2-usbhs";
0622 reg = <0 0xe6590000 0 0x100>;
0623 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
0624 clocks = <&cpg CPG_MOD 704>;
0625 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
0626 <&usb_dmac1 0>, <&usb_dmac1 1>;
0627 dma-names = "ch0", "ch1", "ch2", "ch3";
0628 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0629 resets = <&cpg 704>;
0630 renesas,buswait = <4>;
0631 phys = <&usb0 1>;
0632 phy-names = "usb";
0633 status = "disabled";
0634 };
0635
0636 usbphy: usb-phy@e6590100 {
0637 compatible = "renesas,usb-phy-r8a7742",
0638 "renesas,rcar-gen2-usb-phy";
0639 reg = <0 0xe6590100 0 0x100>;
0640 #address-cells = <1>;
0641 #size-cells = <0>;
0642 clocks = <&cpg CPG_MOD 704>;
0643 clock-names = "usbhs";
0644 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0645 resets = <&cpg 704>;
0646 status = "disabled";
0647
0648 usb0: usb-channel@0 {
0649 reg = <0>;
0650 #phy-cells = <1>;
0651 };
0652 usb2: usb-channel@2 {
0653 reg = <2>;
0654 #phy-cells = <1>;
0655 };
0656 };
0657
0658 usb_dmac0: dma-controller@e65a0000 {
0659 compatible = "renesas,r8a7742-usb-dmac",
0660 "renesas,usb-dmac";
0661 reg = <0 0xe65a0000 0 0x100>;
0662 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
0663 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
0664 interrupt-names = "ch0", "ch1";
0665 clocks = <&cpg CPG_MOD 330>;
0666 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0667 resets = <&cpg 330>;
0668 #dma-cells = <1>;
0669 dma-channels = <2>;
0670 };
0671
0672 usb_dmac1: dma-controller@e65b0000 {
0673 compatible = "renesas,r8a7742-usb-dmac",
0674 "renesas,usb-dmac";
0675 reg = <0 0xe65b0000 0 0x100>;
0676 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
0677 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
0678 interrupt-names = "ch0", "ch1";
0679 clocks = <&cpg CPG_MOD 331>;
0680 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0681 resets = <&cpg 331>;
0682 #dma-cells = <1>;
0683 dma-channels = <2>;
0684 };
0685
0686 dmac0: dma-controller@e6700000 {
0687 compatible = "renesas,dmac-r8a7742",
0688 "renesas,rcar-dmac";
0689 reg = <0 0xe6700000 0 0x20000>;
0690 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
0691 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
0692 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
0693 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
0694 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
0695 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
0696 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
0697 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
0698 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
0699 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
0700 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
0701 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
0702 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
0703 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
0704 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
0705 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
0706 interrupt-names = "error",
0707 "ch0", "ch1", "ch2", "ch3",
0708 "ch4", "ch5", "ch6", "ch7",
0709 "ch8", "ch9", "ch10", "ch11",
0710 "ch12", "ch13", "ch14";
0711 clocks = <&cpg CPG_MOD 219>;
0712 clock-names = "fck";
0713 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0714 resets = <&cpg 219>;
0715 #dma-cells = <1>;
0716 dma-channels = <15>;
0717 };
0718
0719 dmac1: dma-controller@e6720000 {
0720 compatible = "renesas,dmac-r8a7742",
0721 "renesas,rcar-dmac";
0722 reg = <0 0xe6720000 0 0x20000>;
0723 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
0724 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
0725 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
0726 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
0727 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
0728 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
0729 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
0730 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
0731 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
0732 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
0733 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
0734 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
0735 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
0736 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
0737 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
0738 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
0739 interrupt-names = "error",
0740 "ch0", "ch1", "ch2", "ch3",
0741 "ch4", "ch5", "ch6", "ch7",
0742 "ch8", "ch9", "ch10", "ch11",
0743 "ch12", "ch13", "ch14";
0744 clocks = <&cpg CPG_MOD 218>;
0745 clock-names = "fck";
0746 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0747 resets = <&cpg 218>;
0748 #dma-cells = <1>;
0749 dma-channels = <15>;
0750 };
0751
0752 avb: ethernet@e6800000 {
0753 compatible = "renesas,etheravb-r8a7742",
0754 "renesas,etheravb-rcar-gen2";
0755 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
0756 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
0757 clocks = <&cpg CPG_MOD 812>;
0758 clock-names = "fck";
0759 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0760 resets = <&cpg 812>;
0761 #address-cells = <1>;
0762 #size-cells = <0>;
0763 status = "disabled";
0764 };
0765
0766 qspi: spi@e6b10000 {
0767 compatible = "renesas,qspi-r8a7742", "renesas,qspi";
0768 reg = <0 0xe6b10000 0 0x2c>;
0769 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
0770 clocks = <&cpg CPG_MOD 917>;
0771 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
0772 <&dmac1 0x17>, <&dmac1 0x18>;
0773 dma-names = "tx", "rx", "tx", "rx";
0774 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0775 resets = <&cpg 917>;
0776 num-cs = <1>;
0777 #address-cells = <1>;
0778 #size-cells = <0>;
0779 status = "disabled";
0780 };
0781
0782 scifa0: serial@e6c40000 {
0783 compatible = "renesas,scifa-r8a7742",
0784 "renesas,rcar-gen2-scifa", "renesas,scifa";
0785 reg = <0 0xe6c40000 0 0x40>;
0786 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
0787 clocks = <&cpg CPG_MOD 204>;
0788 clock-names = "fck";
0789 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
0790 <&dmac1 0x21>, <&dmac1 0x22>;
0791 dma-names = "tx", "rx", "tx", "rx";
0792 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0793 resets = <&cpg 204>;
0794 status = "disabled";
0795 };
0796
0797 scifa1: serial@e6c50000 {
0798 compatible = "renesas,scifa-r8a7742",
0799 "renesas,rcar-gen2-scifa", "renesas,scifa";
0800 reg = <0 0xe6c50000 0 0x40>;
0801 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0802 clocks = <&cpg CPG_MOD 203>;
0803 clock-names = "fck";
0804 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
0805 <&dmac1 0x25>, <&dmac1 0x26>;
0806 dma-names = "tx", "rx", "tx", "rx";
0807 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0808 resets = <&cpg 203>;
0809 status = "disabled";
0810 };
0811
0812 scifa2: serial@e6c60000 {
0813 compatible = "renesas,scifa-r8a7742",
0814 "renesas,rcar-gen2-scifa", "renesas,scifa";
0815 reg = <0 0xe6c60000 0 0x40>;
0816 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
0817 clocks = <&cpg CPG_MOD 202>;
0818 clock-names = "fck";
0819 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
0820 <&dmac1 0x27>, <&dmac1 0x28>;
0821 dma-names = "tx", "rx", "tx", "rx";
0822 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0823 resets = <&cpg 202>;
0824 status = "disabled";
0825 };
0826
0827 scifb0: serial@e6c20000 {
0828 compatible = "renesas,scifb-r8a7742",
0829 "renesas,rcar-gen2-scifb", "renesas,scifb";
0830 reg = <0 0xe6c20000 0 0x100>;
0831 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
0832 clocks = <&cpg CPG_MOD 206>;
0833 clock-names = "fck";
0834 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
0835 <&dmac1 0x3d>, <&dmac1 0x3e>;
0836 dma-names = "tx", "rx", "tx", "rx";
0837 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0838 resets = <&cpg 206>;
0839 status = "disabled";
0840 };
0841
0842 scifb1: serial@e6c30000 {
0843 compatible = "renesas,scifb-r8a7742",
0844 "renesas,rcar-gen2-scifb", "renesas,scifb";
0845 reg = <0 0xe6c30000 0 0x100>;
0846 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
0847 clocks = <&cpg CPG_MOD 207>;
0848 clock-names = "fck";
0849 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
0850 <&dmac1 0x19>, <&dmac1 0x1a>;
0851 dma-names = "tx", "rx", "tx", "rx";
0852 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0853 resets = <&cpg 207>;
0854 status = "disabled";
0855 };
0856
0857 scifb2: serial@e6ce0000 {
0858 compatible = "renesas,scifb-r8a7742",
0859 "renesas,rcar-gen2-scifb", "renesas,scifb";
0860 reg = <0 0xe6ce0000 0 0x100>;
0861 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
0862 clocks = <&cpg CPG_MOD 216>;
0863 clock-names = "fck";
0864 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
0865 <&dmac1 0x1d>, <&dmac1 0x1e>;
0866 dma-names = "tx", "rx", "tx", "rx";
0867 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0868 resets = <&cpg 216>;
0869 status = "disabled";
0870 };
0871
0872 scif0: serial@e6e60000 {
0873 compatible = "renesas,scif-r8a7742",
0874 "renesas,rcar-gen2-scif", "renesas,scif";
0875 reg = <0 0xe6e60000 0 0x40>;
0876 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
0877 clocks = <&cpg CPG_MOD 721>,
0878 <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
0879 clock-names = "fck", "brg_int", "scif_clk";
0880 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
0881 <&dmac1 0x29>, <&dmac1 0x2a>;
0882 dma-names = "tx", "rx", "tx", "rx";
0883 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0884 resets = <&cpg 721>;
0885 status = "disabled";
0886 };
0887
0888 scif1: serial@e6e68000 {
0889 compatible = "renesas,scif-r8a7742",
0890 "renesas,rcar-gen2-scif", "renesas,scif";
0891 reg = <0 0xe6e68000 0 0x40>;
0892 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
0893 clocks = <&cpg CPG_MOD 720>,
0894 <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
0895 clock-names = "fck", "brg_int", "scif_clk";
0896 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
0897 <&dmac1 0x2d>, <&dmac1 0x2e>;
0898 dma-names = "tx", "rx", "tx", "rx";
0899 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0900 resets = <&cpg 720>;
0901 status = "disabled";
0902 };
0903
0904 scif2: serial@e6e56000 {
0905 compatible = "renesas,scif-r8a7742",
0906 "renesas,rcar-gen2-scif", "renesas,scif";
0907 reg = <0 0xe6e56000 0 0x40>;
0908 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
0909 clocks = <&cpg CPG_MOD 310>,
0910 <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
0911 clock-names = "fck", "brg_int", "scif_clk";
0912 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
0913 <&dmac1 0x2b>, <&dmac1 0x2c>;
0914 dma-names = "tx", "rx", "tx", "rx";
0915 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0916 resets = <&cpg 310>;
0917 status = "disabled";
0918 };
0919
0920 hscif0: serial@e62c0000 {
0921 compatible = "renesas,hscif-r8a7742",
0922 "renesas,rcar-gen2-hscif", "renesas,hscif";
0923 reg = <0 0xe62c0000 0 0x60>;
0924 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0925 clocks = <&cpg CPG_MOD 717>,
0926 <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
0927 clock-names = "fck", "brg_int", "scif_clk";
0928 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
0929 <&dmac1 0x39>, <&dmac1 0x3a>;
0930 dma-names = "tx", "rx", "tx", "rx";
0931 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0932 resets = <&cpg 717>;
0933 status = "disabled";
0934 };
0935
0936 hscif1: serial@e62c8000 {
0937 compatible = "renesas,hscif-r8a7742",
0938 "renesas,rcar-gen2-hscif", "renesas,hscif";
0939 reg = <0 0xe62c8000 0 0x60>;
0940 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0941 clocks = <&cpg CPG_MOD 716>,
0942 <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
0943 clock-names = "fck", "brg_int", "scif_clk";
0944 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
0945 <&dmac1 0x4d>, <&dmac1 0x4e>;
0946 dma-names = "tx", "rx", "tx", "rx";
0947 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0948 resets = <&cpg 716>;
0949 status = "disabled";
0950 };
0951
0952 msiof0: spi@e6e20000 {
0953 compatible = "renesas,msiof-r8a7742",
0954 "renesas,rcar-gen2-msiof";
0955 reg = <0 0xe6e20000 0 0x0064>;
0956 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
0957 clocks = <&cpg CPG_MOD 0>;
0958 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
0959 <&dmac1 0x51>, <&dmac1 0x52>;
0960 dma-names = "tx", "rx", "tx", "rx";
0961 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0962 resets = <&cpg 0>;
0963 #address-cells = <1>;
0964 #size-cells = <0>;
0965 status = "disabled";
0966 };
0967
0968 msiof1: spi@e6e10000 {
0969 compatible = "renesas,msiof-r8a7742",
0970 "renesas,rcar-gen2-msiof";
0971 reg = <0 0xe6e10000 0 0x0064>;
0972 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
0973 clocks = <&cpg CPG_MOD 208>;
0974 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
0975 <&dmac1 0x55>, <&dmac1 0x56>;
0976 dma-names = "tx", "rx", "tx", "rx";
0977 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0978 resets = <&cpg 208>;
0979 #address-cells = <1>;
0980 #size-cells = <0>;
0981 status = "disabled";
0982 };
0983
0984 msiof2: spi@e6e00000 {
0985 compatible = "renesas,msiof-r8a7742",
0986 "renesas,rcar-gen2-msiof";
0987 reg = <0 0xe6e00000 0 0x0064>;
0988 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
0989 clocks = <&cpg CPG_MOD 205>;
0990 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
0991 <&dmac1 0x41>, <&dmac1 0x42>;
0992 dma-names = "tx", "rx", "tx", "rx";
0993 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
0994 resets = <&cpg 205>;
0995 #address-cells = <1>;
0996 #size-cells = <0>;
0997 status = "disabled";
0998 };
0999
1000 msiof3: spi@e6c90000 {
1001 compatible = "renesas,msiof-r8a7742",
1002 "renesas,rcar-gen2-msiof";
1003 reg = <0 0xe6c90000 0 0x0064>;
1004 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1005 clocks = <&cpg CPG_MOD 215>;
1006 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1007 <&dmac1 0x45>, <&dmac1 0x46>;
1008 dma-names = "tx", "rx", "tx", "rx";
1009 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1010 resets = <&cpg 215>;
1011 #address-cells = <1>;
1012 #size-cells = <0>;
1013 status = "disabled";
1014 };
1015
1016 can0: can@e6e80000 {
1017 compatible = "renesas,can-r8a7742",
1018 "renesas,rcar-gen2-can";
1019 reg = <0 0xe6e80000 0 0x1000>;
1020 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1021 clocks = <&cpg CPG_MOD 916>,
1022 <&cpg CPG_CORE R8A7742_CLK_RCAN>, <&can_clk>;
1023 clock-names = "clkp1", "clkp2", "can_clk";
1024 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1025 resets = <&cpg 916>;
1026 status = "disabled";
1027 };
1028
1029 can1: can@e6e88000 {
1030 compatible = "renesas,can-r8a7742",
1031 "renesas,rcar-gen2-can";
1032 reg = <0 0xe6e88000 0 0x1000>;
1033 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1034 clocks = <&cpg CPG_MOD 915>,
1035 <&cpg CPG_CORE R8A7742_CLK_RCAN>, <&can_clk>;
1036 clock-names = "clkp1", "clkp2", "can_clk";
1037 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1038 resets = <&cpg 915>;
1039 status = "disabled";
1040 };
1041
1042 pwm0: pwm@e6e30000 {
1043 compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1044 reg = <0 0xe6e30000 0 0x8>;
1045 clocks = <&cpg CPG_MOD 523>;
1046 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1047 resets = <&cpg 523>;
1048 #pwm-cells = <2>;
1049 status = "disabled";
1050 };
1051
1052 pwm1: pwm@e6e31000 {
1053 compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1054 reg = <0 0xe6e31000 0 0x8>;
1055 clocks = <&cpg CPG_MOD 523>;
1056 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1057 resets = <&cpg 523>;
1058 #pwm-cells = <2>;
1059 status = "disabled";
1060 };
1061
1062 pwm2: pwm@e6e32000 {
1063 compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1064 reg = <0 0xe6e32000 0 0x8>;
1065 clocks = <&cpg CPG_MOD 523>;
1066 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1067 resets = <&cpg 523>;
1068 #pwm-cells = <2>;
1069 status = "disabled";
1070 };
1071
1072 pwm3: pwm@e6e33000 {
1073 compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1074 reg = <0 0xe6e33000 0 0x8>;
1075 clocks = <&cpg CPG_MOD 523>;
1076 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1077 resets = <&cpg 523>;
1078 #pwm-cells = <2>;
1079 status = "disabled";
1080 };
1081
1082 pwm4: pwm@e6e34000 {
1083 compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1084 reg = <0 0xe6e34000 0 0x8>;
1085 clocks = <&cpg CPG_MOD 523>;
1086 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1087 resets = <&cpg 523>;
1088 #pwm-cells = <2>;
1089 status = "disabled";
1090 };
1091
1092 pwm5: pwm@e6e35000 {
1093 compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1094 reg = <0 0xe6e35000 0 0x8>;
1095 clocks = <&cpg CPG_MOD 523>;
1096 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1097 resets = <&cpg 523>;
1098 #pwm-cells = <2>;
1099 status = "disabled";
1100 };
1101
1102 pwm6: pwm@e6e36000 {
1103 compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1104 reg = <0 0xe6e36000 0 0x8>;
1105 clocks = <&cpg CPG_MOD 523>;
1106 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1107 resets = <&cpg 523>;
1108 #pwm-cells = <2>;
1109 status = "disabled";
1110 };
1111
1112 vin0: video@e6ef0000 {
1113 compatible = "renesas,vin-r8a7742",
1114 "renesas,rcar-gen2-vin";
1115 reg = <0 0xe6ef0000 0 0x1000>;
1116 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1117 clocks = <&cpg CPG_MOD 811>;
1118 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1119 resets = <&cpg 811>;
1120 status = "disabled";
1121 };
1122
1123 vin1: video@e6ef1000 {
1124 compatible = "renesas,vin-r8a7742",
1125 "renesas,rcar-gen2-vin";
1126 reg = <0 0xe6ef1000 0 0x1000>;
1127 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1128 clocks = <&cpg CPG_MOD 810>;
1129 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1130 resets = <&cpg 810>;
1131 status = "disabled";
1132 };
1133
1134 vin2: video@e6ef2000 {
1135 compatible = "renesas,vin-r8a7742",
1136 "renesas,rcar-gen2-vin";
1137 reg = <0 0xe6ef2000 0 0x1000>;
1138 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1139 clocks = <&cpg CPG_MOD 809>;
1140 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1141 resets = <&cpg 809>;
1142 status = "disabled";
1143 };
1144
1145 vin3: video@e6ef3000 {
1146 compatible = "renesas,vin-r8a7742",
1147 "renesas,rcar-gen2-vin";
1148 reg = <0 0xe6ef3000 0 0x1000>;
1149 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1150 clocks = <&cpg CPG_MOD 808>;
1151 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1152 resets = <&cpg 808>;
1153 status = "disabled";
1154 };
1155
1156 rcar_sound: sound@ec500000 {
1157 /*
1158 * #sound-dai-cells is required
1159 *
1160 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1161 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1162 */
1163 compatible = "renesas,rcar_sound-r8a7742",
1164 "renesas,rcar_sound-gen2";
1165 reg = <0 0xec500000 0 0x1000>, /* SCU */
1166 <0 0xec5a0000 0 0x100>, /* ADG */
1167 <0 0xec540000 0 0x1000>, /* SSIU */
1168 <0 0xec541000 0 0x280>, /* SSI */
1169 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1170 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1171
1172 clocks = <&cpg CPG_MOD 1005>,
1173 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1174 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1175 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1176 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1177 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1178 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1179 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1180 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1181 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1182 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1183 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1184 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1185 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1186 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1187 <&cpg CPG_CORE R8A7742_CLK_M2>;
1188 clock-names = "ssi-all",
1189 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1190 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1191 "ssi.1", "ssi.0",
1192 "src.9", "src.8", "src.7", "src.6",
1193 "src.5", "src.4", "src.3", "src.2",
1194 "src.1", "src.0",
1195 "ctu.0", "ctu.1",
1196 "mix.0", "mix.1",
1197 "dvc.0", "dvc.1",
1198 "clk_a", "clk_b", "clk_c", "clk_i";
1199 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1200 resets = <&cpg 1005>,
1201 <&cpg 1006>, <&cpg 1007>,
1202 <&cpg 1008>, <&cpg 1009>,
1203 <&cpg 1010>, <&cpg 1011>,
1204 <&cpg 1012>, <&cpg 1013>,
1205 <&cpg 1014>, <&cpg 1015>;
1206 reset-names = "ssi-all",
1207 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1208 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1209 "ssi.1", "ssi.0";
1210
1211 status = "disabled";
1212
1213 rcar_sound,dvc {
1214 dvc0: dvc-0 {
1215 dmas = <&audma1 0xbc>;
1216 dma-names = "tx";
1217 };
1218 dvc1: dvc-1 {
1219 dmas = <&audma1 0xbe>;
1220 dma-names = "tx";
1221 };
1222 };
1223
1224 rcar_sound,mix {
1225 mix0: mix-0 { };
1226 mix1: mix-1 { };
1227 };
1228
1229 rcar_sound,ctu {
1230 ctu00: ctu-0 { };
1231 ctu01: ctu-1 { };
1232 ctu02: ctu-2 { };
1233 ctu03: ctu-3 { };
1234 ctu10: ctu-4 { };
1235 ctu11: ctu-5 { };
1236 ctu12: ctu-6 { };
1237 ctu13: ctu-7 { };
1238 };
1239
1240 rcar_sound,src {
1241 src0: src-0 {
1242 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1243 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1244 dma-names = "rx", "tx";
1245 };
1246 src1: src-1 {
1247 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1248 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1249 dma-names = "rx", "tx";
1250 };
1251 src2: src-2 {
1252 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1253 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1254 dma-names = "rx", "tx";
1255 };
1256 src3: src-3 {
1257 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1258 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1259 dma-names = "rx", "tx";
1260 };
1261 src4: src-4 {
1262 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1263 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1264 dma-names = "rx", "tx";
1265 };
1266 src5: src-5 {
1267 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1268 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1269 dma-names = "rx", "tx";
1270 };
1271 src6: src-6 {
1272 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1273 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1274 dma-names = "rx", "tx";
1275 };
1276 src7: src-7 {
1277 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1278 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1279 dma-names = "rx", "tx";
1280 };
1281 src8: src-8 {
1282 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1283 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1284 dma-names = "rx", "tx";
1285 };
1286 src9: src-9 {
1287 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1288 dmas = <&audma0 0x97>, <&audma1 0xba>;
1289 dma-names = "rx", "tx";
1290 };
1291 };
1292
1293 rcar_sound,ssi {
1294 ssi0: ssi-0 {
1295 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1296 dmas = <&audma0 0x01>, <&audma1 0x02>,
1297 <&audma0 0x15>, <&audma1 0x16>;
1298 dma-names = "rx", "tx", "rxu", "txu";
1299 };
1300 ssi1: ssi-1 {
1301 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1302 dmas = <&audma0 0x03>, <&audma1 0x04>,
1303 <&audma0 0x49>, <&audma1 0x4a>;
1304 dma-names = "rx", "tx", "rxu", "txu";
1305 };
1306 ssi2: ssi-2 {
1307 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1308 dmas = <&audma0 0x05>, <&audma1 0x06>,
1309 <&audma0 0x63>, <&audma1 0x64>;
1310 dma-names = "rx", "tx", "rxu", "txu";
1311 };
1312 ssi3: ssi-3 {
1313 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1314 dmas = <&audma0 0x07>, <&audma1 0x08>,
1315 <&audma0 0x6f>, <&audma1 0x70>;
1316 dma-names = "rx", "tx", "rxu", "txu";
1317 };
1318 ssi4: ssi-4 {
1319 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1320 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1321 <&audma0 0x71>, <&audma1 0x72>;
1322 dma-names = "rx", "tx", "rxu", "txu";
1323 };
1324 ssi5: ssi-5 {
1325 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1326 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1327 <&audma0 0x73>, <&audma1 0x74>;
1328 dma-names = "rx", "tx", "rxu", "txu";
1329 };
1330 ssi6: ssi-6 {
1331 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1332 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1333 <&audma0 0x75>, <&audma1 0x76>;
1334 dma-names = "rx", "tx", "rxu", "txu";
1335 };
1336 ssi7: ssi-7 {
1337 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1338 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1339 <&audma0 0x79>, <&audma1 0x7a>;
1340 dma-names = "rx", "tx", "rxu", "txu";
1341 };
1342 ssi8: ssi-8 {
1343 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1344 dmas = <&audma0 0x11>, <&audma1 0x12>,
1345 <&audma0 0x7b>, <&audma1 0x7c>;
1346 dma-names = "rx", "tx", "rxu", "txu";
1347 };
1348 ssi9: ssi-9 {
1349 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1350 dmas = <&audma0 0x13>, <&audma1 0x14>,
1351 <&audma0 0x7d>, <&audma1 0x7e>;
1352 dma-names = "rx", "tx", "rxu", "txu";
1353 };
1354 };
1355 };
1356
1357 audma0: dma-controller@ec700000 {
1358 compatible = "renesas,dmac-r8a7742",
1359 "renesas,rcar-dmac";
1360 reg = <0 0xec700000 0 0x10000>;
1361 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1362 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1363 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1364 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1365 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1366 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1367 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1368 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1369 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1370 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1371 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1372 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1373 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1374 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1375 interrupt-names = "error",
1376 "ch0", "ch1", "ch2", "ch3",
1377 "ch4", "ch5", "ch6", "ch7",
1378 "ch8", "ch9", "ch10", "ch11",
1379 "ch12";
1380 clocks = <&cpg CPG_MOD 502>;
1381 clock-names = "fck";
1382 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1383 resets = <&cpg 502>;
1384 #dma-cells = <1>;
1385 dma-channels = <13>;
1386 };
1387
1388 audma1: dma-controller@ec720000 {
1389 compatible = "renesas,dmac-r8a7742",
1390 "renesas,rcar-dmac";
1391 reg = <0 0xec720000 0 0x10000>;
1392 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1393 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1394 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1395 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1396 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1397 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1398 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1399 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1400 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1401 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1402 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1403 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1404 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1405 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1406 interrupt-names = "error",
1407 "ch0", "ch1", "ch2", "ch3",
1408 "ch4", "ch5", "ch6", "ch7",
1409 "ch8", "ch9", "ch10", "ch11",
1410 "ch12";
1411 clocks = <&cpg CPG_MOD 501>;
1412 clock-names = "fck";
1413 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1414 resets = <&cpg 501>;
1415 #dma-cells = <1>;
1416 dma-channels = <13>;
1417 };
1418
1419 xhci: usb@ee000000 {
1420 compatible = "renesas,xhci-r8a7742",
1421 "renesas,rcar-gen2-xhci";
1422 reg = <0 0xee000000 0 0xc00>;
1423 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1424 clocks = <&cpg CPG_MOD 328>;
1425 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1426 resets = <&cpg 328>;
1427 phys = <&usb2 1>;
1428 phy-names = "usb";
1429 status = "disabled";
1430 };
1431
1432 pci0: pci@ee090000 {
1433 compatible = "renesas,pci-r8a7742",
1434 "renesas,pci-rcar-gen2";
1435 device_type = "pci";
1436 reg = <0 0xee090000 0 0xc00>,
1437 <0 0xee080000 0 0x1100>;
1438 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1439 clocks = <&cpg CPG_MOD 703>;
1440 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1441 resets = <&cpg 703>;
1442 status = "disabled";
1443
1444 bus-range = <0 0>;
1445 #address-cells = <3>;
1446 #size-cells = <2>;
1447 #interrupt-cells = <1>;
1448 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1449 interrupt-map-mask = <0xf800 0 0 0x7>;
1450 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1451 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1452 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1453
1454 usb@1,0 {
1455 reg = <0x800 0 0 0 0>;
1456 phys = <&usb0 0>;
1457 phy-names = "usb";
1458 };
1459
1460 usb@2,0 {
1461 reg = <0x1000 0 0 0 0>;
1462 phys = <&usb0 0>;
1463 phy-names = "usb";
1464 };
1465 };
1466
1467 pci1: pci@ee0b0000 {
1468 compatible = "renesas,pci-r8a7742",
1469 "renesas,pci-rcar-gen2";
1470 device_type = "pci";
1471 reg = <0 0xee0b0000 0 0xc00>,
1472 <0 0xee0a0000 0 0x1100>;
1473 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1474 clocks = <&cpg CPG_MOD 703>;
1475 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1476 resets = <&cpg 703>;
1477 status = "disabled";
1478
1479 bus-range = <1 1>;
1480 #address-cells = <3>;
1481 #size-cells = <2>;
1482 #interrupt-cells = <1>;
1483 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1484 interrupt-map-mask = <0xf800 0 0 0x7>;
1485 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1486 <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1487 <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1488 };
1489
1490 pci2: pci@ee0d0000 {
1491 compatible = "renesas,pci-r8a7742",
1492 "renesas,pci-rcar-gen2";
1493 device_type = "pci";
1494 clocks = <&cpg CPG_MOD 703>;
1495 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1496 resets = <&cpg 703>;
1497 reg = <0 0xee0d0000 0 0xc00>,
1498 <0 0xee0c0000 0 0x1100>;
1499 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1500 status = "disabled";
1501
1502 bus-range = <2 2>;
1503 #address-cells = <3>;
1504 #size-cells = <2>;
1505 #interrupt-cells = <1>;
1506 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1507 interrupt-map-mask = <0xf800 0 0 0x7>;
1508 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1509 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1510 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1511
1512 usb@1,0 {
1513 reg = <0x20800 0 0 0 0>;
1514 phys = <&usb2 0>;
1515 phy-names = "usb";
1516 };
1517
1518 usb@2,0 {
1519 reg = <0x21000 0 0 0 0>;
1520 phys = <&usb2 0>;
1521 phy-names = "usb";
1522 };
1523 };
1524
1525 sdhi0: mmc@ee100000 {
1526 compatible = "renesas,sdhi-r8a7742",
1527 "renesas,rcar-gen2-sdhi";
1528 reg = <0 0xee100000 0 0x328>;
1529 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1530 clocks = <&cpg CPG_MOD 314>;
1531 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1532 <&dmac1 0xcd>, <&dmac1 0xce>;
1533 dma-names = "tx", "rx", "tx", "rx";
1534 max-frequency = <195000000>;
1535 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1536 resets = <&cpg 314>;
1537 status = "disabled";
1538 };
1539
1540 sdhi1: mmc@ee120000 {
1541 compatible = "renesas,sdhi-r8a7742",
1542 "renesas,rcar-gen2-sdhi";
1543 reg = <0 0xee120000 0 0x328>;
1544 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1545 clocks = <&cpg CPG_MOD 313>;
1546 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1547 <&dmac1 0xc9>, <&dmac1 0xca>;
1548 dma-names = "tx", "rx", "tx", "rx";
1549 max-frequency = <195000000>;
1550 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1551 resets = <&cpg 313>;
1552 status = "disabled";
1553 };
1554
1555 sdhi2: mmc@ee140000 {
1556 compatible = "renesas,sdhi-r8a7742",
1557 "renesas,rcar-gen2-sdhi";
1558 reg = <0 0xee140000 0 0x100>;
1559 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1560 clocks = <&cpg CPG_MOD 312>;
1561 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1562 <&dmac1 0xc1>, <&dmac1 0xc2>;
1563 dma-names = "tx", "rx", "tx", "rx";
1564 max-frequency = <97500000>;
1565 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1566 resets = <&cpg 312>;
1567 status = "disabled";
1568 };
1569
1570 sdhi3: mmc@ee160000 {
1571 compatible = "renesas,sdhi-r8a7742",
1572 "renesas,rcar-gen2-sdhi";
1573 reg = <0 0xee160000 0 0x100>;
1574 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1575 clocks = <&cpg CPG_MOD 311>;
1576 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1577 <&dmac1 0xd3>, <&dmac1 0xd4>;
1578 dma-names = "tx", "rx", "tx", "rx";
1579 max-frequency = <97500000>;
1580 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1581 resets = <&cpg 311>;
1582 status = "disabled";
1583 };
1584
1585 mmcif0: mmc@ee200000 {
1586 compatible = "renesas,mmcif-r8a7742",
1587 "renesas,sh-mmcif";
1588 reg = <0 0xee200000 0 0x80>;
1589 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1590 clocks = <&cpg CPG_MOD 315>;
1591 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1592 <&dmac1 0xd1>, <&dmac1 0xd2>;
1593 dma-names = "tx", "rx", "tx", "rx";
1594 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1595 resets = <&cpg 315>;
1596 reg-io-width = <4>;
1597 status = "disabled";
1598 max-frequency = <97500000>;
1599 };
1600
1601 mmcif1: mmc@ee220000 {
1602 compatible = "renesas,mmcif-r8a7742",
1603 "renesas,sh-mmcif";
1604 reg = <0 0xee220000 0 0x80>;
1605 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1606 clocks = <&cpg CPG_MOD 305>;
1607 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1608 <&dmac1 0xe1>, <&dmac1 0xe2>;
1609 dma-names = "tx", "rx", "tx", "rx";
1610 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1611 resets = <&cpg 305>;
1612 reg-io-width = <4>;
1613 status = "disabled";
1614 max-frequency = <97500000>;
1615 };
1616
1617 sata0: sata@ee300000 {
1618 compatible = "renesas,sata-r8a7742",
1619 "renesas,rcar-gen2-sata";
1620 reg = <0 0xee300000 0 0x200000>;
1621 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1622 clocks = <&cpg CPG_MOD 815>;
1623 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1624 resets = <&cpg 815>;
1625 status = "disabled";
1626 };
1627
1628 sata1: sata@ee500000 {
1629 compatible = "renesas,sata-r8a7742",
1630 "renesas,rcar-gen2-sata";
1631 reg = <0 0xee500000 0 0x200000>;
1632 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1633 clocks = <&cpg CPG_MOD 814>;
1634 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1635 resets = <&cpg 814>;
1636 status = "disabled";
1637 };
1638
1639 ether: ethernet@ee700000 {
1640 compatible = "renesas,ether-r8a7742",
1641 "renesas,rcar-gen2-ether";
1642 reg = <0 0xee700000 0 0x400>;
1643 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1644 clocks = <&cpg CPG_MOD 813>;
1645 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1646 resets = <&cpg 813>;
1647 phy-mode = "rmii";
1648 #address-cells = <1>;
1649 #size-cells = <0>;
1650 status = "disabled";
1651 };
1652
1653 gic: interrupt-controller@f1001000 {
1654 compatible = "arm,gic-400";
1655 #interrupt-cells = <3>;
1656 #address-cells = <0>;
1657 interrupt-controller;
1658 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1659 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1660 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1661 clocks = <&cpg CPG_MOD 408>;
1662 clock-names = "clk";
1663 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1664 resets = <&cpg 408>;
1665 };
1666
1667 pciec: pcie@fe000000 {
1668 compatible = "renesas,pcie-r8a7742",
1669 "renesas,pcie-rcar-gen2";
1670 reg = <0 0xfe000000 0 0x80000>;
1671 #address-cells = <3>;
1672 #size-cells = <2>;
1673 bus-range = <0x00 0xff>;
1674 device_type = "pci";
1675 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1676 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1677 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1678 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1679 /* Map all possible DDR as inbound ranges */
1680 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1681 <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1682 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1683 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1684 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1685 #interrupt-cells = <1>;
1686 interrupt-map-mask = <0 0 0 0>;
1687 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1688 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1689 clock-names = "pcie", "pcie_bus";
1690 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1691 resets = <&cpg 319>;
1692 status = "disabled";
1693 };
1694
1695 vsp@fe920000 {
1696 compatible = "renesas,vsp1";
1697 reg = <0 0xfe920000 0 0x8000>;
1698 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1699 clocks = <&cpg CPG_MOD 130>;
1700 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1701 resets = <&cpg 130>;
1702 };
1703
1704 vsp@fe928000 {
1705 compatible = "renesas,vsp1";
1706 reg = <0 0xfe928000 0 0x8000>;
1707 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1708 clocks = <&cpg CPG_MOD 131>;
1709 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1710 resets = <&cpg 131>;
1711 };
1712
1713 vsp@fe930000 {
1714 compatible = "renesas,vsp1";
1715 reg = <0 0xfe930000 0 0x8000>;
1716 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1717 clocks = <&cpg CPG_MOD 128>;
1718 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1719 resets = <&cpg 128>;
1720 };
1721
1722 vsp@fe938000 {
1723 compatible = "renesas,vsp1";
1724 reg = <0 0xfe938000 0 0x8000>;
1725 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1726 clocks = <&cpg CPG_MOD 127>;
1727 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1728 resets = <&cpg 127>;
1729 };
1730
1731 du: display@feb00000 {
1732 compatible = "renesas,du-r8a7742";
1733 reg = <0 0xfeb00000 0 0x70000>;
1734 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1735 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1736 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1737 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1738 <&cpg CPG_MOD 722>;
1739 clock-names = "du.0", "du.1", "du.2";
1740 resets = <&cpg 724>;
1741 reset-names = "du.0";
1742 status = "disabled";
1743
1744 ports {
1745 #address-cells = <1>;
1746 #size-cells = <0>;
1747
1748 port@0 {
1749 reg = <0>;
1750 du_out_rgb: endpoint {
1751 };
1752 };
1753 port@1 {
1754 reg = <1>;
1755 du_out_lvds0: endpoint {
1756 remote-endpoint = <&lvds0_in>;
1757 };
1758 };
1759 port@2 {
1760 reg = <2>;
1761 du_out_lvds1: endpoint {
1762 remote-endpoint = <&lvds1_in>;
1763 };
1764 };
1765 };
1766 };
1767
1768 lvds0: lvds@feb90000 {
1769 compatible = "renesas,r8a7742-lvds";
1770 reg = <0 0xfeb90000 0 0x14>;
1771 clocks = <&cpg CPG_MOD 726>;
1772 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1773 resets = <&cpg 726>;
1774 status = "disabled";
1775
1776 ports {
1777 #address-cells = <1>;
1778 #size-cells = <0>;
1779
1780 port@0 {
1781 reg = <0>;
1782 lvds0_in: endpoint {
1783 remote-endpoint = <&du_out_lvds0>;
1784 };
1785 };
1786 port@1 {
1787 reg = <1>;
1788 lvds0_out: endpoint {
1789 };
1790 };
1791 };
1792 };
1793
1794 lvds1: lvds@feb94000 {
1795 compatible = "renesas,r8a7742-lvds";
1796 reg = <0 0xfeb94000 0 0x14>;
1797 clocks = <&cpg CPG_MOD 725>;
1798 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1799 resets = <&cpg 725>;
1800 status = "disabled";
1801
1802 ports {
1803 #address-cells = <1>;
1804 #size-cells = <0>;
1805
1806 port@0 {
1807 reg = <0>;
1808 lvds1_in: endpoint {
1809 remote-endpoint = <&du_out_lvds1>;
1810 };
1811 };
1812 port@1 {
1813 reg = <1>;
1814 lvds1_out: endpoint {
1815 };
1816 };
1817 };
1818 };
1819
1820 prr: chipid@ff000044 {
1821 compatible = "renesas,prr";
1822 reg = <0 0xff000044 0 4>;
1823 };
1824
1825 cmt0: timer@ffca0000 {
1826 compatible = "renesas,r8a7742-cmt0",
1827 "renesas,rcar-gen2-cmt0";
1828 reg = <0 0xffca0000 0 0x1004>;
1829 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1830 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1831 clocks = <&cpg CPG_MOD 124>;
1832 clock-names = "fck";
1833 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1834 resets = <&cpg 124>;
1835 status = "disabled";
1836 };
1837
1838 cmt1: timer@e6130000 {
1839 compatible = "renesas,r8a7742-cmt1",
1840 "renesas,rcar-gen2-cmt1";
1841 reg = <0 0xe6130000 0 0x1004>;
1842 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1843 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1844 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1845 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1846 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1847 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1848 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1849 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1850 clocks = <&cpg CPG_MOD 329>;
1851 clock-names = "fck";
1852 power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1853 resets = <&cpg 329>;
1854 status = "disabled";
1855 };
1856 };
1857
1858 thermal-zones {
1859 cpu_thermal: cpu-thermal {
1860 polling-delay-passive = <0>;
1861 polling-delay = <0>;
1862
1863 thermal-sensors = <&thermal>;
1864
1865 trips {
1866 cpu-crit {
1867 temperature = <95000>;
1868 hysteresis = <0>;
1869 type = "critical";
1870 };
1871 };
1872 cooling-maps {
1873 };
1874 };
1875 };
1876
1877 timer {
1878 compatible = "arm,armv7-timer";
1879 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1880 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1881 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1882 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
1883 };
1884
1885 /* External USB clock - can be overridden by the board */
1886 usb_extal_clk: usb_extal {
1887 compatible = "fixed-clock";
1888 #clock-cells = <0>;
1889 clock-frequency = <48000000>;
1890 };
1891 };
