Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Device Tree Source for the iWave RZ/G1H Qseven SOM
0004  *
0005  * Copyright (C) 2020 Renesas Electronics Corp.
0006  */
0007 
0008 #include "r8a7742.dtsi"
0009 #include <dt-bindings/gpio/gpio.h>
0010 
0011 / {
0012         compatible = "iwave,g21m", "renesas,r8a7742";
0013 
0014         memory@40000000 {
0015                 device_type = "memory";
0016                 reg = <0 0x40000000 0 0x40000000>;
0017         };
0018 
0019         memory@200000000 {
0020                 device_type = "memory";
0021                 reg = <2 0x00000000 0 0x40000000>;
0022         };
0023 
0024         reg_3p3v: 3p3v {
0025                 compatible = "regulator-fixed";
0026                 regulator-name = "3P3V";
0027                 regulator-min-microvolt = <3300000>;
0028                 regulator-max-microvolt = <3300000>;
0029                 regulator-always-on;
0030                 regulator-boot-on;
0031         };
0032 };
0033 
0034 &extal_clk {
0035         clock-frequency = <20000000>;
0036 };
0037 
0038 &gpio0 {
0039         /* GP0_18 set low to select QSPI. Doing so will disable VIN2 */
0040         qspi-en-hog {
0041                 gpio-hog;
0042                 gpios = <18 GPIO_ACTIVE_HIGH>;
0043                 output-low;
0044                 line-name = "QSPI_EN";
0045         };
0046 };
0047 
0048 &i2c0 {
0049         pinctrl-0 = <&i2c0_pins>;
0050         pinctrl-names = "default";
0051 
0052         status = "okay";
0053         clock-frequency = <400000>;
0054 
0055         rtc@68 {
0056                 compatible = "ti,bq32000";
0057                 reg = <0x68>;
0058                 interrupt-parent = <&gpio1>;
0059                 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
0060         };
0061 };
0062 
0063 &mmcif1 {
0064         pinctrl-0 = <&mmc1_pins>;
0065         pinctrl-names = "default";
0066 
0067         vmmc-supply = <&reg_3p3v>;
0068         bus-width = <4>;
0069         non-removable;
0070         status = "okay";
0071 };
0072 
0073 &pfc {
0074         i2c0_pins: i2c0 {
0075                 groups = "i2c0";
0076                 function = "i2c0";
0077         };
0078 
0079         mmc1_pins: mmc1 {
0080                 groups = "mmc1_data4", "mmc1_ctrl";
0081                 function = "mmc1";
0082         };
0083 
0084         qspi_pins: qspi {
0085                 groups = "qspi_ctrl", "qspi_data2";
0086                 function = "qspi";
0087         };
0088 };
0089 
0090 &qspi {
0091         pinctrl-0 = <&qspi_pins>;
0092         pinctrl-names = "default";
0093 
0094         status = "okay";
0095 
0096         flash: flash@0 {
0097                 compatible = "sst,sst25vf016b", "jedec,spi-nor";
0098                 reg = <0>;
0099                 spi-max-frequency = <50000000>;
0100                 m25p,fast-read;
0101                 spi-cpol;
0102                 spi-cpha;
0103 
0104                 partitions {
0105                         compatible = "fixed-partitions";
0106                         #address-cells = <1>;
0107                         #size-cells = <1>;
0108 
0109                         partition@0 {
0110                                 label = "bootloader";
0111                                 reg = <0x00000000 0x000c0000>;
0112                                 read-only;
0113                         };
0114                         partition@c0000 {
0115                                 label = "env";
0116                                 reg = <0x000c0000 0x00002000>;
0117                         };
0118                         partition@c2000 {
0119                                 label = "user";
0120                                 reg = <0x000c2000 0x0013e000>;
0121                         };
0122                 };
0123         };
0124 };