0001 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
0002 // Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
0003
0004 #include "qcom-ipq4019.dtsi"
0005 #include <dt-bindings/gpio/gpio.h>
0006 #include <dt-bindings/input/input.h>
0007
0008 / {
0009 model = "8devices Jalapeno";
0010 compatible = "8dev,jalapeno";
0011 };
0012
0013 &tlmm {
0014 mdio_pins: mdio_pinmux {
0015 pinmux_1 {
0016 pins = "gpio53";
0017 function = "mdio";
0018 };
0019
0020 pinmux_2 {
0021 pins = "gpio52";
0022 function = "mdc";
0023 };
0024
0025 pinconf {
0026 pins = "gpio52", "gpio53";
0027 bias-pull-up;
0028 };
0029 };
0030
0031 serial_pins: serial_pinmux {
0032 mux {
0033 pins = "gpio60", "gpio61";
0034 function = "blsp_uart0";
0035 bias-disable;
0036 };
0037 };
0038
0039 spi_0_pins: spi_0_pinmux {
0040 pin {
0041 function = "blsp_spi0";
0042 pins = "gpio55", "gpio56", "gpio57";
0043 drive-strength = <2>;
0044 bias-disable;
0045 };
0046
0047 pin_cs {
0048 function = "gpio";
0049 pins = "gpio54", "gpio59";
0050 drive-strength = <2>;
0051 bias-disable;
0052 output-high;
0053 };
0054 };
0055 };
0056
0057 &watchdog {
0058 status = "okay";
0059 };
0060
0061 &prng {
0062 status = "okay";
0063 };
0064
0065 &blsp_dma {
0066 status = "okay";
0067 };
0068
0069 &blsp1_spi1 {
0070 status = "okay";
0071
0072 pinctrl-0 = <&spi_0_pins>;
0073 pinctrl-names = "default";
0074 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
0075
0076 flash@0 {
0077 status = "okay";
0078
0079 compatible = "jedec,spi-nor";
0080 reg = <0>;
0081 spi-max-frequency = <24000000>;
0082
0083 partitions {
0084 compatible = "fixed-partitions";
0085 #address-cells = <1>;
0086 #size-cells = <1>;
0087
0088 partition@0 {
0089 label = "SBL1";
0090 reg = <0x00000000 0x00040000>;
0091 read-only;
0092 };
0093
0094 partition@40000 {
0095 label = "MIBIB";
0096 reg = <0x00040000 0x00020000>;
0097 read-only;
0098 };
0099
0100 partition@60000 {
0101 label = "QSEE";
0102 reg = <0x00060000 0x00060000>;
0103 read-only;
0104 };
0105
0106 partition@c0000 {
0107 label = "CDT";
0108 reg = <0x000c0000 0x00010000>;
0109 read-only;
0110 };
0111
0112 partition@d0000 {
0113 label = "DDRPARAMS";
0114 reg = <0x000d0000 0x00010000>;
0115 read-only;
0116 };
0117
0118 partition@e0000 {
0119 label = "u-boot-env";
0120 reg = <0x000e0000 0x00010000>;
0121 };
0122
0123 partition@f0000 {
0124 label = "u-boot";
0125 reg = <0x000f0000 0x00080000>;
0126 read-only;
0127 };
0128
0129 partition@170000 {
0130 label = "ART";
0131 reg = <0x00170000 0x00010000>;
0132 read-only;
0133 };
0134 };
0135 };
0136
0137 spi-nand@1 {
0138 status = "okay";
0139
0140 compatible = "spi-nand";
0141 reg = <1>;
0142 spi-max-frequency = <24000000>;
0143
0144 partitions {
0145 compatible = "fixed-partitions";
0146 #address-cells = <1>;
0147 #size-cells = <1>;
0148
0149 partition@0 {
0150 label = "ubi1";
0151 reg = <0x00000000 0x04000000>;
0152 };
0153
0154 partition@4000000 {
0155 label = "ubi2";
0156 reg = <0x04000000 0x04000000>;
0157 };
0158 };
0159 };
0160 };
0161
0162 &blsp1_uart1 {
0163 status = "okay";
0164
0165 pinctrl-0 = <&serial_pins>;
0166 pinctrl-names = "default";
0167 };
0168
0169 &cryptobam {
0170 status = "okay";
0171 };
0172
0173 &crypto {
0174 status = "okay";
0175 };
0176
0177 &mdio {
0178 status = "okay";
0179
0180 pinctrl-0 = <&mdio_pins>;
0181 pinctrl-names = "default";
0182 };
0183
0184 &wifi0 {
0185 status = "okay";
0186
0187 qcom,ath10k-calibration-variant = "8devices-Jalapeno";
0188 };
0189
0190 &wifi1 {
0191 status = "okay";
0192
0193 qcom,ath10k-calibration-variant = "8devices-Jalapeno";
0194 };
0195
0196 &usb3_ss_phy {
0197 status = "okay";
0198 };
0199
0200 &usb3_hs_phy {
0201 status = "okay";
0202 };
0203
0204 &usb3 {
0205 status = "okay";
0206 };
0207
0208 &usb2_hs_phy {
0209 status = "okay";
0210 };
0211
0212 &usb2 {
0213 status = "okay";
0214 };
