0001 // SPDX-License-Identifier: GPL-2.0
0002 /* The pxa3xx skeleton simply augments the 2xx version */
0003 #include "pxa2xx.dtsi"
0004 #include "dt-bindings/clock/pxa-clock.h"
0005
0006 / {
0007 model = "Marvell PXA27x familiy SoC";
0008 compatible = "marvell,pxa27x";
0009
0010 pxabus {
0011 pdma: dma-controller@40000000 {
0012 compatible = "marvell,pdma-1.0";
0013 reg = <0x40000000 0x10000>;
0014 interrupts = <25>;
0015 #dma-cells = <2>;
0016 /* For backwards compatibility: */
0017 #dma-channels = <32>;
0018 dma-channels = <32>;
0019 #dma-requests = <75>;
0020 dma-requests = <75>;
0021 status = "okay";
0022 };
0023
0024 pxairq: interrupt-controller@40d00000 {
0025 marvell,intc-priority;
0026 marvell,intc-nr-irqs = <34>;
0027 };
0028
0029 pinctrl: pinctrl@40e00000 {
0030 reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
0031 0x40f00020 0x10>;
0032 compatible = "marvell,pxa27x-pinctrl";
0033 };
0034
0035 gpio: gpio@40e00000 {
0036 compatible = "intel,pxa27x-gpio";
0037 gpio-ranges = <&pinctrl 0 0 128>;
0038 clocks = <&clks CLK_NONE>;
0039 };
0040
0041 usb0: usb@4c000000 {
0042 compatible = "marvell,pxa-ohci";
0043 reg = <0x4c000000 0x10000>;
0044 interrupts = <3>;
0045 clocks = <&clks CLK_USBHOST>;
0046 status = "disabled";
0047 };
0048
0049 pwm0: pwm@40b00000 {
0050 compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
0051 reg = <0x40b00000 0x10>;
0052 #pwm-cells = <1>;
0053 clocks = <&clks CLK_PWM0>;
0054 };
0055
0056 pwm1: pwm@40b00010 {
0057 compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
0058 reg = <0x40b00010 0x10>;
0059 #pwm-cells = <1>;
0060 clocks = <&clks CLK_PWM1>;
0061 };
0062
0063 pwm2: pwm@40c00000 {
0064 compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
0065 reg = <0x40c00000 0x10>;
0066 #pwm-cells = <1>;
0067 clocks = <&clks CLK_PWM0>;
0068 };
0069
0070 pwm3: pwm@40c00010 {
0071 compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
0072 reg = <0x40c00010 0x10>;
0073 #pwm-cells = <1>;
0074 clocks = <&clks CLK_PWM1>;
0075 };
0076
0077 pwri2c: i2c@40f00180 {
0078 compatible = "mrvl,pxa-i2c";
0079 reg = <0x40f00180 0x24>;
0080 interrupts = <6>;
0081 clocks = <&clks CLK_PWRI2C>;
0082 #address-cells = <0x1>;
0083 #size-cells = <0>;
0084 status = "disabled";
0085 };
0086
0087 pxa27x_udc: udc@40600000 {
0088 compatible = "marvell,pxa270-udc";
0089 reg = <0x40600000 0x10000>;
0090 interrupts = <11>;
0091 clocks = <&clks CLK_USB>;
0092 status = "disabled";
0093 };
0094
0095 keypad: keypad@41500000 {
0096 compatible = "marvell,pxa27x-keypad";
0097 reg = <0x41500000 0x4c>;
0098 interrupts = <4>;
0099 clocks = <&clks CLK_KEYPAD>;
0100 status = "disabled";
0101 };
0102
0103 pxa_camera: imaging@50000000 {
0104 compatible = "marvell,pxa270-qci";
0105 reg = <0x50000000 0x1000>;
0106 interrupts = <33>;
0107 dmas = <&pdma 68 0 /* Y channel */
0108 &pdma 69 0 /* U channel */
0109 &pdma 70 0>; /* V channel */
0110 dma-names = "CI_Y", "CI_U", "CI_V";
0111
0112 clocks = <&clks CLK_CAMERA>;
0113 clock-names = "ciclk";
0114 clock-frequency = <5000000>;
0115 clock-output-names = "qci_mclk";
0116
0117 status = "disabled";
0118 };
0119
0120 rtc@40900000 {
0121 clocks = <&clks CLK_OSC32k768>;
0122 };
0123 };
0124
0125 clocks {
0126 /*
0127 * The muxing of external clocks/internal dividers for osc* clock
0128 * sources has been hidden under the carpet by now.
0129 */
0130 #address-cells = <1>;
0131 #size-cells = <1>;
0132 ranges;
0133
0134 clks: pxa2xx_clks@41300004 {
0135 compatible = "marvell,pxa270-clocks";
0136 #clock-cells = <1>;
0137 status = "okay";
0138 };
0139 };
0140
0141 timer@40a00000 {
0142 compatible = "marvell,pxa-timer";
0143 reg = <0x40a00000 0x20>;
0144 interrupts = <26>;
0145 clocks = <&clks CLK_OSTIMER>;
0146 status = "okay";
0147 };
0148
0149 pxa270_opp_table: opp_table0 {
0150 compatible = "operating-points-v2";
0151
0152 opp-104000000 {
0153 opp-hz = /bits/ 64 <104000000>;
0154 opp-microvolt = <900000 900000 1705000>;
0155 clock-latency-ns = <20>;
0156 };
0157 opp-156000000 {
0158 opp-hz = /bits/ 64 <156000000>;
0159 opp-microvolt = <1000000 1000000 1705000>;
0160 clock-latency-ns = <20>;
0161 };
0162 opp-208000000 {
0163 opp-hz = /bits/ 64 <208000000>;
0164 opp-microvolt = <1180000 1180000 1705000>;
0165 clock-latency-ns = <20>;
0166 };
0167 opp-312000000 {
0168 opp-hz = /bits/ 64 <312000000>;
0169 opp-microvolt = <1250000 1250000 1705000>;
0170 clock-latency-ns = <20>;
0171 };
0172 opp-416000000 {
0173 opp-hz = /bits/ 64 <416000000>;
0174 opp-microvolt = <1350000 1350000 1705000>;
0175 clock-latency-ns = <20>;
0176 };
0177 opp-520000000 {
0178 opp-hz = /bits/ 64 <520000000>;
0179 opp-microvolt = <1450000 1450000 1705000>;
0180 clock-latency-ns = <20>;
0181 };
0182 opp-624000000 {
0183 opp-hz = /bits/ 64 <624000000>;
0184 opp-microvolt = <1550000 1550000 1705000>;
0185 clock-latency-ns = <20>;
0186 };
0187 };
0188 };
