0001 &l4_abe { /* 0x40100000 */
0002 compatible = "ti,omap5-l4-abe", "simple-pm-bus";
0003 reg = <0x40100000 0x400>,
0004 <0x40100400 0x400>;
0005 reg-names = "la", "ap";
0006 power-domains = <&prm_abe>;
0007 /* OMAP5_L4_ABE_CLKCTRL is read-only */
0008 #address-cells = <1>;
0009 #size-cells = <1>;
0010 ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
0011 <0x49000000 0x49000000 0x100000>;
0012 segment@0 { /* 0x40100000 */
0013 compatible = "simple-pm-bus";
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016 ranges =
0017 /* CPU to L4 ABE mapping */
0018 <0x00000000 0x00000000 0x000400>, /* ap 0 */
0019 <0x00000400 0x00000400 0x000400>, /* ap 1 */
0020 <0x00022000 0x00022000 0x001000>, /* ap 2 */
0021 <0x00023000 0x00023000 0x001000>, /* ap 3 */
0022 <0x00024000 0x00024000 0x001000>, /* ap 4 */
0023 <0x00025000 0x00025000 0x001000>, /* ap 5 */
0024 <0x00026000 0x00026000 0x001000>, /* ap 6 */
0025 <0x00027000 0x00027000 0x001000>, /* ap 7 */
0026 <0x00028000 0x00028000 0x001000>, /* ap 8 */
0027 <0x00029000 0x00029000 0x001000>, /* ap 9 */
0028 <0x0002a000 0x0002a000 0x001000>, /* ap 10 */
0029 <0x0002b000 0x0002b000 0x001000>, /* ap 11 */
0030 <0x0002e000 0x0002e000 0x001000>, /* ap 12 */
0031 <0x0002f000 0x0002f000 0x001000>, /* ap 13 */
0032 <0x00030000 0x00030000 0x001000>, /* ap 14 */
0033 <0x00031000 0x00031000 0x001000>, /* ap 15 */
0034 <0x00032000 0x00032000 0x001000>, /* ap 16 */
0035 <0x00033000 0x00033000 0x001000>, /* ap 17 */
0036 <0x00038000 0x00038000 0x001000>, /* ap 18 */
0037 <0x00039000 0x00039000 0x001000>, /* ap 19 */
0038 <0x0003a000 0x0003a000 0x001000>, /* ap 20 */
0039 <0x0003b000 0x0003b000 0x001000>, /* ap 21 */
0040 <0x0003c000 0x0003c000 0x001000>, /* ap 22 */
0041 <0x0003d000 0x0003d000 0x001000>, /* ap 23 */
0042 <0x0003e000 0x0003e000 0x001000>, /* ap 24 */
0043 <0x0003f000 0x0003f000 0x001000>, /* ap 25 */
0044 <0x00080000 0x00080000 0x010000>, /* ap 26 */
0045 <0x00080000 0x00080000 0x001000>, /* ap 27 */
0046 <0x000a0000 0x000a0000 0x010000>, /* ap 28 */
0047 <0x000a0000 0x000a0000 0x001000>, /* ap 29 */
0048 <0x000c0000 0x000c0000 0x010000>, /* ap 30 */
0049 <0x000c0000 0x000c0000 0x001000>, /* ap 31 */
0050 <0x000f1000 0x000f1000 0x001000>, /* ap 32 */
0051 <0x000f2000 0x000f2000 0x001000>, /* ap 33 */
0052
0053 /* L3 to L4 ABE mapping */
0054 <0x49000000 0x49000000 0x000400>, /* ap 0 */
0055 <0x49000400 0x49000400 0x000400>, /* ap 1 */
0056 <0x49022000 0x49022000 0x001000>, /* ap 2 */
0057 <0x49023000 0x49023000 0x001000>, /* ap 3 */
0058 <0x49024000 0x49024000 0x001000>, /* ap 4 */
0059 <0x49025000 0x49025000 0x001000>, /* ap 5 */
0060 <0x49026000 0x49026000 0x001000>, /* ap 6 */
0061 <0x49027000 0x49027000 0x001000>, /* ap 7 */
0062 <0x49028000 0x49028000 0x001000>, /* ap 8 */
0063 <0x49029000 0x49029000 0x001000>, /* ap 9 */
0064 <0x4902a000 0x4902a000 0x001000>, /* ap 10 */
0065 <0x4902b000 0x4902b000 0x001000>, /* ap 11 */
0066 <0x4902e000 0x4902e000 0x001000>, /* ap 12 */
0067 <0x4902f000 0x4902f000 0x001000>, /* ap 13 */
0068 <0x49030000 0x49030000 0x001000>, /* ap 14 */
0069 <0x49031000 0x49031000 0x001000>, /* ap 15 */
0070 <0x49032000 0x49032000 0x001000>, /* ap 16 */
0071 <0x49033000 0x49033000 0x001000>, /* ap 17 */
0072 <0x49038000 0x49038000 0x001000>, /* ap 18 */
0073 <0x49039000 0x49039000 0x001000>, /* ap 19 */
0074 <0x4903a000 0x4903a000 0x001000>, /* ap 20 */
0075 <0x4903b000 0x4903b000 0x001000>, /* ap 21 */
0076 <0x4903c000 0x4903c000 0x001000>, /* ap 22 */
0077 <0x4903d000 0x4903d000 0x001000>, /* ap 23 */
0078 <0x4903e000 0x4903e000 0x001000>, /* ap 24 */
0079 <0x4903f000 0x4903f000 0x001000>, /* ap 25 */
0080 <0x49080000 0x49080000 0x010000>, /* ap 26 */
0081 <0x49080000 0x49080000 0x001000>, /* ap 27 */
0082 <0x490a0000 0x490a0000 0x010000>, /* ap 28 */
0083 <0x490a0000 0x490a0000 0x001000>, /* ap 29 */
0084 <0x490c0000 0x490c0000 0x010000>, /* ap 30 */
0085 <0x490c0000 0x490c0000 0x001000>, /* ap 31 */
0086 <0x490f1000 0x490f1000 0x001000>, /* ap 32 */
0087 <0x490f2000 0x490f2000 0x001000>; /* ap 33 */
0088
0089 target-module@22000 { /* 0x40122000, ap 2 02.0 */
0090 compatible = "ti,sysc-omap2", "ti,sysc";
0091 reg = <0x2208c 0x4>;
0092 reg-names = "sysc";
0093 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
0094 SYSC_OMAP2_ENAWAKEUP |
0095 SYSC_OMAP2_SOFTRESET)>;
0096 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0097 <SYSC_IDLE_NO>,
0098 <SYSC_IDLE_SMART>;
0099 /* Domains (V, P, C): core, abe_pwrdm, abe_clkdm */
0100 clocks = <&abe_clkctrl OMAP5_MCBSP1_CLKCTRL 0>;
0101 clock-names = "fck";
0102 #address-cells = <1>;
0103 #size-cells = <1>;
0104 ranges = <0x0 0x22000 0x1000>,
0105 <0x49022000 0x49022000 0x1000>;
0106
0107 mcbsp1: mcbsp@0 {
0108 compatible = "ti,omap4-mcbsp";
0109 reg = <0x0 0xff>, /* MPU private access */
0110 <0x49022000 0xff>; /* L3 Interconnect */
0111 reg-names = "mpu", "dma";
0112 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
0113 interrupt-names = "common";
0114 ti,buffer-size = <128>;
0115 dmas = <&sdma 33>,
0116 <&sdma 34>;
0117 dma-names = "tx", "rx";
0118 status = "disabled";
0119 };
0120 };
0121
0122 target-module@24000 { /* 0x40124000, ap 4 04.0 */
0123 compatible = "ti,sysc-omap2", "ti,sysc";
0124 reg = <0x2408c 0x4>;
0125 reg-names = "sysc";
0126 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
0127 SYSC_OMAP2_ENAWAKEUP |
0128 SYSC_OMAP2_SOFTRESET)>;
0129 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0130 <SYSC_IDLE_NO>,
0131 <SYSC_IDLE_SMART>;
0132 /* Domains (V, P, C): core, abe_pwrdm, abe_clkdm */
0133 clocks = <&abe_clkctrl OMAP5_MCBSP2_CLKCTRL 0>;
0134 clock-names = "fck";
0135 #address-cells = <1>;
0136 #size-cells = <1>;
0137 ranges = <0x0 0x24000 0x1000>,
0138 <0x49024000 0x49024000 0x1000>;
0139
0140 mcbsp2: mcbsp@0 {
0141 compatible = "ti,omap4-mcbsp";
0142 reg = <0x0 0xff>, /* MPU private access */
0143 <0x49024000 0xff>; /* L3 Interconnect */
0144 reg-names = "mpu", "dma";
0145 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
0146 interrupt-names = "common";
0147 ti,buffer-size = <128>;
0148 dmas = <&sdma 17>,
0149 <&sdma 18>;
0150 dma-names = "tx", "rx";
0151 status = "disabled";
0152 };
0153 };
0154
0155 target-module@26000 { /* 0x40126000, ap 6 06.0 */
0156 compatible = "ti,sysc-omap2", "ti,sysc";
0157 reg = <0x2608c 0x4>;
0158 reg-names = "sysc";
0159 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
0160 SYSC_OMAP2_ENAWAKEUP |
0161 SYSC_OMAP2_SOFTRESET)>;
0162 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0163 <SYSC_IDLE_NO>,
0164 <SYSC_IDLE_SMART>;
0165 /* Domains (V, P, C): core, abe_pwrdm, abe_clkdm */
0166 clocks = <&abe_clkctrl OMAP5_MCBSP3_CLKCTRL 0>;
0167 clock-names = "fck";
0168 #address-cells = <1>;
0169 #size-cells = <1>;
0170 ranges = <0x0 0x26000 0x1000>,
0171 <0x49026000 0x49026000 0x1000>;
0172
0173 mcbsp3: mcbsp@0 {
0174 compatible = "ti,omap4-mcbsp";
0175 reg = <0x0 0xff>, /* MPU private access */
0176 <0x49026000 0xff>; /* L3 Interconnect */
0177 reg-names = "mpu", "dma";
0178 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
0179 interrupt-names = "common";
0180 ti,buffer-size = <128>;
0181 dmas = <&sdma 19>,
0182 <&sdma 20>;
0183 dma-names = "tx", "rx";
0184 status = "disabled";
0185 };
0186 };
0187
0188 target-module@28000 { /* 0x40128000, ap 8 08.0 */
0189 compatible = "ti,sysc";
0190 status = "disabled";
0191 #address-cells = <1>;
0192 #size-cells = <1>;
0193 ranges = <0x0 0x28000 0x1000>,
0194 <0x49028000 0x49028000 0x1000>;
0195 };
0196
0197 target-module@2a000 { /* 0x4012a000, ap 10 0a.0 */
0198 compatible = "ti,sysc";
0199 status = "disabled";
0200 #address-cells = <1>;
0201 #size-cells = <1>;
0202 ranges = <0x0 0x2a000 0x1000>,
0203 <0x4902a000 0x4902a000 0x1000>;
0204 };
0205
0206 target-module@2e000 { /* 0x4012e000, ap 12 0c.0 */
0207 compatible = "ti,sysc-omap4", "ti,sysc";
0208 reg = <0x2e000 0x4>,
0209 <0x2e010 0x4>;
0210 reg-names = "rev", "sysc";
0211 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
0212 SYSC_OMAP4_SOFTRESET)>;
0213 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0214 <SYSC_IDLE_NO>,
0215 <SYSC_IDLE_SMART>,
0216 <SYSC_IDLE_SMART_WKUP>;
0217 /* Domains (V, P, C): core, abe_pwrdm, abe_clkdm */
0218 clocks = <&abe_clkctrl OMAP5_DMIC_CLKCTRL 0>;
0219 clock-names = "fck";
0220 #address-cells = <1>;
0221 #size-cells = <1>;
0222 ranges = <0x0 0x2e000 0x1000>,
0223 <0x4902e000 0x4902e000 0x1000>;
0224
0225 dmic: dmic@0 {
0226 compatible = "ti,omap4-dmic";
0227 reg = <0x0 0x7f>, /* MPU private access */
0228 <0x4902e000 0x7f>; /* L3 Interconnect */
0229 reg-names = "mpu", "dma";
0230 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
0231 dmas = <&sdma 67>;
0232 dma-names = "up_link";
0233 status = "disabled";
0234 };
0235 };
0236
0237 target-module@30000 { /* 0x40130000, ap 14 0e.0 */
0238 compatible = "ti,sysc";
0239 status = "disabled";
0240 #address-cells = <1>;
0241 #size-cells = <1>;
0242 ranges = <0x0 0x30000 0x1000>,
0243 <0x49030000 0x49030000 0x1000>;
0244 };
0245
0246 mcpdm_module: target-module@32000 { /* 0x40132000, ap 16 10.0 */
0247 compatible = "ti,sysc-omap4", "ti,sysc";
0248 reg = <0x32000 0x4>,
0249 <0x32010 0x4>;
0250 reg-names = "rev", "sysc";
0251 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
0252 SYSC_OMAP4_SOFTRESET)>;
0253 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0254 <SYSC_IDLE_NO>,
0255 <SYSC_IDLE_SMART>,
0256 <SYSC_IDLE_SMART_WKUP>;
0257 /* Domains (V, P, C): core, abe_pwrdm, abe_clkdm */
0258 clocks = <&abe_clkctrl OMAP5_MCPDM_CLKCTRL 0>;
0259 clock-names = "fck";
0260 #address-cells = <1>;
0261 #size-cells = <1>;
0262 ranges = <0x0 0x32000 0x1000>,
0263 <0x49032000 0x49032000 0x1000>;
0264
0265 /* Must be only enabled for boards with pdmclk wired */
0266 status = "disabled";
0267
0268 mcpdm: mcpdm@0 {
0269 compatible = "ti,omap4-mcpdm";
0270 reg = <0x0 0x7f>, /* MPU private access */
0271 <0x49032000 0x7f>; /* L3 Interconnect */
0272 reg-names = "mpu", "dma";
0273 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
0274 dmas = <&sdma 65>,
0275 <&sdma 66>;
0276 dma-names = "up_link", "dn_link";
0277 };
0278 };
0279
0280 target-module@38000 { /* 0x40138000, ap 18 12.0 */
0281 compatible = "ti,sysc-omap4-timer", "ti,sysc";
0282 reg = <0x38000 0x4>,
0283 <0x38010 0x4>;
0284 reg-names = "rev", "sysc";
0285 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
0286 SYSC_OMAP4_SOFTRESET)>;
0287 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0288 <SYSC_IDLE_NO>,
0289 <SYSC_IDLE_SMART>,
0290 <SYSC_IDLE_SMART_WKUP>;
0291 /* Domains (V, P, C): core, abe_pwrdm, abe_clkdm */
0292 clocks = <&abe_clkctrl OMAP5_TIMER5_CLKCTRL 0>;
0293 clock-names = "fck";
0294 #address-cells = <1>;
0295 #size-cells = <1>;
0296 ranges = <0x0 0x38000 0x1000>,
0297 <0x49038000 0x49038000 0x1000>;
0298
0299 timer5: timer@0 {
0300 compatible = "ti,omap5430-timer";
0301 reg = <0x0 0x80>,
0302 <0x49038000 0x80>;
0303 clocks = <&abe_clkctrl OMAP5_TIMER5_CLKCTRL 24>,
0304 <&dss_syc_gfclk_div>;
0305 clock-names = "fck", "timer_sys_ck";
0306 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
0307 ti,timer-dsp;
0308 ti,timer-pwm;
0309 };
0310 };
0311
0312 target-module@3a000 { /* 0x4013a000, ap 20 14.0 */
0313 compatible = "ti,sysc-omap4-timer", "ti,sysc";
0314 reg = <0x3a000 0x4>,
0315 <0x3a010 0x4>;
0316 reg-names = "rev", "sysc";
0317 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
0318 SYSC_OMAP4_SOFTRESET)>;
0319 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0320 <SYSC_IDLE_NO>,
0321 <SYSC_IDLE_SMART>,
0322 <SYSC_IDLE_SMART_WKUP>;
0323 /* Domains (V, P, C): core, abe_pwrdm, abe_clkdm */
0324 clocks = <&abe_clkctrl OMAP5_TIMER6_CLKCTRL 0>;
0325 clock-names = "fck";
0326 #address-cells = <1>;
0327 #size-cells = <1>;
0328 ranges = <0x0 0x3a000 0x1000>,
0329 <0x4903a000 0x4903a000 0x1000>;
0330
0331 timer6: timer@0 {
0332 compatible = "ti,omap5430-timer";
0333 reg = <0x0 0x80>,
0334 <0x4903a000 0x80>;
0335 clocks = <&abe_clkctrl OMAP5_TIMER6_CLKCTRL 24>,
0336 <&dss_syc_gfclk_div>;
0337 clock-names = "fck", "timer_sys_ck";
0338 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
0339 ti,timer-dsp;
0340 ti,timer-pwm;
0341 };
0342 };
0343
0344 target-module@3c000 { /* 0x4013c000, ap 22 16.0 */
0345 compatible = "ti,sysc-omap4-timer", "ti,sysc";
0346 reg = <0x3c000 0x4>,
0347 <0x3c010 0x4>;
0348 reg-names = "rev", "sysc";
0349 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
0350 SYSC_OMAP4_SOFTRESET)>;
0351 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0352 <SYSC_IDLE_NO>,
0353 <SYSC_IDLE_SMART>,
0354 <SYSC_IDLE_SMART_WKUP>;
0355 /* Domains (V, P, C): core, abe_pwrdm, abe_clkdm */
0356 clocks = <&abe_clkctrl OMAP5_TIMER7_CLKCTRL 0>;
0357 clock-names = "fck";
0358 #address-cells = <1>;
0359 #size-cells = <1>;
0360 ranges = <0x0 0x3c000 0x1000>,
0361 <0x4903c000 0x4903c000 0x1000>;
0362
0363 timer7: timer@0 {
0364 compatible = "ti,omap5430-timer";
0365 reg = <0x0 0x80>,
0366 <0x4903c000 0x80>;
0367 clocks = <&abe_clkctrl OMAP5_TIMER7_CLKCTRL 24>,
0368 <&dss_syc_gfclk_div>;
0369 clock-names = "fck", "timer_sys_ck";
0370 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
0371 ti,timer-dsp;
0372 };
0373 };
0374
0375 target-module@3e000 { /* 0x4013e000, ap 24 18.0 */
0376 compatible = "ti,sysc-omap4-timer", "ti,sysc";
0377 reg = <0x3e000 0x4>,
0378 <0x3e010 0x4>;
0379 reg-names = "rev", "sysc";
0380 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
0381 SYSC_OMAP4_SOFTRESET)>;
0382 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0383 <SYSC_IDLE_NO>,
0384 <SYSC_IDLE_SMART>,
0385 <SYSC_IDLE_SMART_WKUP>;
0386 /* Domains (V, P, C): core, abe_pwrdm, abe_clkdm */
0387 clocks = <&abe_clkctrl OMAP5_TIMER8_CLKCTRL 0>;
0388 clock-names = "fck";
0389 #address-cells = <1>;
0390 #size-cells = <1>;
0391 ranges = <0x0 0x3e000 0x1000>,
0392 <0x4903e000 0x4903e000 0x1000>;
0393
0394 timer8: timer@0 {
0395 compatible = "ti,omap5430-timer";
0396 reg = <0x0 0x80>,
0397 <0x4903e000 0x80>;
0398 clocks = <&abe_clkctrl OMAP5_TIMER8_CLKCTRL 24>,
0399 <&dss_syc_gfclk_div>;
0400 clock-names = "fck", "timer_sys_ck";
0401 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
0402 ti,timer-dsp;
0403 ti,timer-pwm;
0404 };
0405 };
0406
0407 target-module@80000 { /* 0x40180000, ap 26 1a.0 */
0408 compatible = "ti,sysc";
0409 status = "disabled";
0410 #address-cells = <1>;
0411 #size-cells = <1>;
0412 ranges = <0x0 0x80000 0x10000>,
0413 <0x49080000 0x49080000 0x10000>;
0414 };
0415
0416 target-module@a0000 { /* 0x401a0000, ap 28 1c.0 */
0417 compatible = "ti,sysc";
0418 status = "disabled";
0419 #address-cells = <1>;
0420 #size-cells = <1>;
0421 ranges = <0x0 0xa0000 0x10000>,
0422 <0x490a0000 0x490a0000 0x10000>;
0423 };
0424
0425 target-module@c0000 { /* 0x401c0000, ap 30 1e.0 */
0426 compatible = "ti,sysc";
0427 status = "disabled";
0428 #address-cells = <1>;
0429 #size-cells = <1>;
0430 ranges = <0x0 0xc0000 0x10000>,
0431 <0x490c0000 0x490c0000 0x10000>;
0432 };
0433
0434 target-module@f1000 { /* 0x401f1000, ap 32 20.0 */
0435 compatible = "ti,sysc-omap4", "ti,sysc";
0436 reg = <0xf1000 0x4>,
0437 <0xf1010 0x4>;
0438 reg-names = "rev", "sysc";
0439 ti,sysc-midle = <SYSC_IDLE_FORCE>,
0440 <SYSC_IDLE_NO>,
0441 <SYSC_IDLE_SMART>,
0442 <SYSC_IDLE_SMART_WKUP>;
0443 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0444 <SYSC_IDLE_NO>,
0445 <SYSC_IDLE_SMART>;
0446 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0447 clocks = <&abe_clkctrl OMAP5_AESS_CLKCTRL 0>;
0448 clock-names = "fck";
0449 #address-cells = <1>;
0450 #size-cells = <1>;
0451 ranges = <0x0 0xf1000 0x1000>,
0452 <0x490f1000 0x490f1000 0x1000>;
0453 };
0454 };
0455 };
0456
