boot/dts/omap4-mcpdm.dtsi

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Common omap4 mcpdm configuration
0004  *
0005  * Only include this file if your board has pdmclk wired from the
0006  * pmic to ABE as mcpdm uses an external clock for the module.
0007  */
0008
0009 &omap4_pmx_core {
0010         mcpdm_pins: pinmux_mcpdm_pins {
0011                 pinctrl-single,pins = <
0012                 /* 0x4a100106 abe_pdm_ul_data.abe_pdm_ul_data ag25 */
0013                 OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0)
0014
0015                 /* 0x4a100108 abe_pdm_dl_data.abe_pdm_dl_data af25 */
0016                 OMAP4_IOPAD(0x108, PIN_INPUT_PULLDOWN | MUX_MODE0)
0017
0018                 /* 0x4a10010a abe_pdm_frame.abe_pdm_frame ae25 */
0019                 OMAP4_IOPAD(0x10a, PIN_INPUT_PULLUP   | MUX_MODE0)
0020
0021                 /* 0x4a10010c abe_pdm_lb_clk.abe_pdm_lb_clk af26 */
0022                 OMAP4_IOPAD(0x10c, PIN_INPUT_PULLDOWN | MUX_MODE0)
0023
0024                 /* 0x4a10010e abe_clks.abe_clks ah26 */
0025                 OMAP4_IOPAD(0x10e, PIN_INPUT_PULLDOWN | MUX_MODE0)
0026                 >;
0027         };
0028 };
0029
0030 &mcpdm_module {
0031         /*
0032          * McPDM pads must be muxed at the interconnect target module
0033          * level as the module on the SoC needs external clock from
0034          * the PMIC
0035          */
0036         pinctrl-names = "default";
0037         pinctrl-0 = <&mcpdm_pins>;
0038         status = "okay";
0039 };
0040
0041 &mcpdm {
0042         clocks = <&twl6040>;
0043         clock-names = "pdmclk";
0044 };