0001 &l4_abe { /* 0x40100000 */
0002 compatible = "ti,omap4-l4-abe", "simple-pm-bus";
0003 reg = <0x40100000 0x400>,
0004 <0x40100400 0x400>;
0005 reg-names = "la", "ap";
0006 power-domains = <&prm_abe>;
0007 /* OMAP4_L4_ABE_CLKCTRL is read-only */
0008 #address-cells = <1>;
0009 #size-cells = <1>;
0010 ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
0011 <0x49000000 0x49000000 0x100000>;
0012 segment@0 { /* 0x40100000 */
0013 compatible = "simple-pm-bus";
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016 ranges =
0017 /* CPU to L4 ABE mapping */
0018 <0x00000000 0x00000000 0x000400>, /* ap 0 */
0019 <0x00000400 0x00000400 0x000400>, /* ap 1 */
0020 <0x00022000 0x00022000 0x001000>, /* ap 2 */
0021 <0x00023000 0x00023000 0x001000>, /* ap 3 */
0022 <0x00024000 0x00024000 0x001000>, /* ap 4 */
0023 <0x00025000 0x00025000 0x001000>, /* ap 5 */
0024 <0x00026000 0x00026000 0x001000>, /* ap 6 */
0025 <0x00027000 0x00027000 0x001000>, /* ap 7 */
0026 <0x00028000 0x00028000 0x001000>, /* ap 8 */
0027 <0x00029000 0x00029000 0x001000>, /* ap 9 */
0028 <0x0002a000 0x0002a000 0x001000>, /* ap 10 */
0029 <0x0002b000 0x0002b000 0x001000>, /* ap 11 */
0030 <0x0002e000 0x0002e000 0x001000>, /* ap 12 */
0031 <0x0002f000 0x0002f000 0x001000>, /* ap 13 */
0032 <0x00030000 0x00030000 0x001000>, /* ap 14 */
0033 <0x00031000 0x00031000 0x001000>, /* ap 15 */
0034 <0x00032000 0x00032000 0x001000>, /* ap 16 */
0035 <0x00033000 0x00033000 0x001000>, /* ap 17 */
0036 <0x00038000 0x00038000 0x001000>, /* ap 18 */
0037 <0x00039000 0x00039000 0x001000>, /* ap 19 */
0038 <0x0003a000 0x0003a000 0x001000>, /* ap 20 */
0039 <0x0003b000 0x0003b000 0x001000>, /* ap 21 */
0040 <0x0003c000 0x0003c000 0x001000>, /* ap 22 */
0041 <0x0003d000 0x0003d000 0x001000>, /* ap 23 */
0042 <0x0003e000 0x0003e000 0x001000>, /* ap 24 */
0043 <0x0003f000 0x0003f000 0x001000>, /* ap 25 */
0044 <0x00080000 0x00080000 0x010000>, /* ap 26 */
0045 <0x00080000 0x00080000 0x001000>, /* ap 27 */
0046 <0x000a0000 0x000a0000 0x010000>, /* ap 28 */
0047 <0x000a0000 0x000a0000 0x001000>, /* ap 29 */
0048 <0x000c0000 0x000c0000 0x010000>, /* ap 30 */
0049 <0x000c0000 0x000c0000 0x001000>, /* ap 31 */
0050 <0x000f1000 0x000f1000 0x001000>, /* ap 32 */
0051 <0x000f2000 0x000f2000 0x001000>, /* ap 33 */
0052
0053 /* L3 to L4 ABE mapping */
0054 <0x49000000 0x49000000 0x000400>, /* ap 0 */
0055 <0x49000400 0x49000400 0x000400>, /* ap 1 */
0056 <0x49022000 0x49022000 0x001000>, /* ap 2 */
0057 <0x49023000 0x49023000 0x001000>, /* ap 3 */
0058 <0x49024000 0x49024000 0x001000>, /* ap 4 */
0059 <0x49025000 0x49025000 0x001000>, /* ap 5 */
0060 <0x49026000 0x49026000 0x001000>, /* ap 6 */
0061 <0x49027000 0x49027000 0x001000>, /* ap 7 */
0062 <0x49028000 0x49028000 0x001000>, /* ap 8 */
0063 <0x49029000 0x49029000 0x001000>, /* ap 9 */
0064 <0x4902a000 0x4902a000 0x001000>, /* ap 10 */
0065 <0x4902b000 0x4902b000 0x001000>, /* ap 11 */
0066 <0x4902e000 0x4902e000 0x001000>, /* ap 12 */
0067 <0x4902f000 0x4902f000 0x001000>, /* ap 13 */
0068 <0x49030000 0x49030000 0x001000>, /* ap 14 */
0069 <0x49031000 0x49031000 0x001000>, /* ap 15 */
0070 <0x49032000 0x49032000 0x001000>, /* ap 16 */
0071 <0x49033000 0x49033000 0x001000>, /* ap 17 */
0072 <0x49038000 0x49038000 0x001000>, /* ap 18 */
0073 <0x49039000 0x49039000 0x001000>, /* ap 19 */
0074 <0x4903a000 0x4903a000 0x001000>, /* ap 20 */
0075 <0x4903b000 0x4903b000 0x001000>, /* ap 21 */
0076 <0x4903c000 0x4903c000 0x001000>, /* ap 22 */
0077 <0x4903d000 0x4903d000 0x001000>, /* ap 23 */
0078 <0x4903e000 0x4903e000 0x001000>, /* ap 24 */
0079 <0x4903f000 0x4903f000 0x001000>, /* ap 25 */
0080 <0x49080000 0x49080000 0x010000>, /* ap 26 */
0081 <0x49080000 0x49080000 0x001000>, /* ap 27 */
0082 <0x490a0000 0x490a0000 0x010000>, /* ap 28 */
0083 <0x490a0000 0x490a0000 0x001000>, /* ap 29 */
0084 <0x490c0000 0x490c0000 0x010000>, /* ap 30 */
0085 <0x490c0000 0x490c0000 0x001000>, /* ap 31 */
0086 <0x490f1000 0x490f1000 0x001000>, /* ap 32 */
0087 <0x490f2000 0x490f2000 0x001000>; /* ap 33 */
0088
0089 target-module@22000 { /* 0x40122000, ap 2 02.0 */
0090 compatible = "ti,sysc-omap2", "ti,sysc";
0091 reg = <0x2208c 0x4>;
0092 reg-names = "sysc";
0093 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
0094 SYSC_OMAP2_ENAWAKEUP |
0095 SYSC_OMAP2_SOFTRESET)>;
0096 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0097 <SYSC_IDLE_NO>,
0098 <SYSC_IDLE_SMART>;
0099 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0100 clocks = <&abe_clkctrl OMAP4_MCBSP1_CLKCTRL 0>;
0101 clock-names = "fck";
0102 #address-cells = <1>;
0103 #size-cells = <1>;
0104 ranges = <0x0 0x22000 0x1000>,
0105 <0x49022000 0x49022000 0x1000>;
0106
0107 mcbsp1: mcbsp@0 {
0108 compatible = "ti,omap4-mcbsp";
0109 reg = <0x0 0xff>, /* MPU private access */
0110 <0x49022000 0xff>; /* L3 Interconnect */
0111 reg-names = "mpu", "dma";
0112 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
0113 interrupt-names = "common";
0114 ti,buffer-size = <128>;
0115 dmas = <&sdma 33>,
0116 <&sdma 34>;
0117 dma-names = "tx", "rx";
0118 status = "disabled";
0119 };
0120 };
0121
0122 target-module@24000 { /* 0x40124000, ap 4 04.0 */
0123 compatible = "ti,sysc-omap2", "ti,sysc";
0124 reg = <0x2408c 0x4>;
0125 reg-names = "sysc";
0126 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
0127 SYSC_OMAP2_ENAWAKEUP |
0128 SYSC_OMAP2_SOFTRESET)>;
0129 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0130 <SYSC_IDLE_NO>,
0131 <SYSC_IDLE_SMART>;
0132 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0133 clocks = <&abe_clkctrl OMAP4_MCBSP2_CLKCTRL 0>;
0134 clock-names = "fck";
0135 #address-cells = <1>;
0136 #size-cells = <1>;
0137 ranges = <0x0 0x24000 0x1000>,
0138 <0x49024000 0x49024000 0x1000>;
0139
0140 mcbsp2: mcbsp@0 {
0141 compatible = "ti,omap4-mcbsp";
0142 reg = <0x0 0xff>, /* MPU private access */
0143 <0x49024000 0xff>; /* L3 Interconnect */
0144 reg-names = "mpu", "dma";
0145 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
0146 interrupt-names = "common";
0147 ti,buffer-size = <128>;
0148 dmas = <&sdma 17>,
0149 <&sdma 18>;
0150 dma-names = "tx", "rx";
0151 status = "disabled";
0152 };
0153 };
0154
0155 target-module@26000 { /* 0x40126000, ap 6 06.0 */
0156 compatible = "ti,sysc-omap2", "ti,sysc";
0157 reg = <0x2608c 0x4>;
0158 reg-names = "sysc";
0159 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
0160 SYSC_OMAP2_ENAWAKEUP |
0161 SYSC_OMAP2_SOFTRESET)>;
0162 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0163 <SYSC_IDLE_NO>,
0164 <SYSC_IDLE_SMART>;
0165 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0166 clocks = <&abe_clkctrl OMAP4_MCBSP3_CLKCTRL 0>;
0167 clock-names = "fck";
0168 #address-cells = <1>;
0169 #size-cells = <1>;
0170 ranges = <0x0 0x26000 0x1000>,
0171 <0x49026000 0x49026000 0x1000>;
0172
0173 mcbsp3: mcbsp@0 {
0174 compatible = "ti,omap4-mcbsp";
0175 reg = <0x0 0xff>, /* MPU private access */
0176 <0x49026000 0xff>; /* L3 Interconnect */
0177 reg-names = "mpu", "dma";
0178 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
0179 interrupt-names = "common";
0180 ti,buffer-size = <128>;
0181 dmas = <&sdma 19>,
0182 <&sdma 20>;
0183 dma-names = "tx", "rx";
0184 status = "disabled";
0185 };
0186 };
0187
0188 target-module@28000 { /* 0x40128000, ap 8 08.0 */
0189 /* 0x4012a000, ap 10 0a.0 */
0190 compatible = "ti,sysc-mcasp", "ti,sysc";
0191 reg = <0x28000 0x4>,
0192 <0x28004 0x4>;
0193 reg-names = "rev", "sysc";
0194 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0195 <SYSC_IDLE_NO>,
0196 <SYSC_IDLE_SMART>;
0197 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0198 clocks = <&abe_clkctrl OMAP4_MCASP_CLKCTRL 0>;
0199 clock-names = "fck";
0200 #address-cells = <1>;
0201 #size-cells = <1>;
0202 ranges = <0x0 0x28000 0x1000>,
0203 <0x49028000 0x49028000 0x1000>,
0204 <0x2000 0x2a000 0x1000>,
0205 <0x4902a000 0x4902a000 0x1000>;
0206
0207 mcasp0: mcasp@0 {
0208 compatible = "ti,omap4-mcasp-audio";
0209 reg = <0x0 0x2000>,
0210 <0x4902a000 0x1000>; /* L3 data port */
0211 reg-names = "mpu","dat";
0212 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
0213 interrupt-names = "tx";
0214 dmas = <&sdma 8>;
0215 dma-names = "tx";
0216 clocks = <&abe_clkctrl OMAP4_MCASP_CLKCTRL 0>;
0217 clock-names = "fck";
0218 op-mode = <1>; /* MCASP_DIT_MODE */
0219 serial-dir = < 1 >; /* 1 TX serializers */
0220 status = "disabled";
0221 };
0222 };
0223
0224 target-module@2e000 { /* 0x4012e000, ap 12 0c.0 */
0225 compatible = "ti,sysc-omap4", "ti,sysc";
0226 reg = <0x2e000 0x4>,
0227 <0x2e010 0x4>;
0228 reg-names = "rev", "sysc";
0229 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
0230 SYSC_OMAP4_SOFTRESET)>;
0231 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0232 <SYSC_IDLE_NO>,
0233 <SYSC_IDLE_SMART>,
0234 <SYSC_IDLE_SMART_WKUP>;
0235 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0236 clocks = <&abe_clkctrl OMAP4_DMIC_CLKCTRL 0>;
0237 clock-names = "fck";
0238 #address-cells = <1>;
0239 #size-cells = <1>;
0240 ranges = <0x0 0x2e000 0x1000>,
0241 <0x4902e000 0x4902e000 0x1000>;
0242
0243 dmic: dmic@0 {
0244 compatible = "ti,omap4-dmic";
0245 reg = <0x0 0x7f>, /* MPU private access */
0246 <0x4902e000 0x7f>; /* L3 Interconnect */
0247 reg-names = "mpu", "dma";
0248 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
0249 dmas = <&sdma 67>;
0250 dma-names = "up_link";
0251 status = "disabled";
0252 };
0253 };
0254
0255 target-module@30000 { /* 0x40130000, ap 14 0e.0 */
0256 compatible = "ti,sysc-omap2", "ti,sysc";
0257 reg = <0x30000 0x4>,
0258 <0x30010 0x4>,
0259 <0x30014 0x4>;
0260 reg-names = "rev", "sysc", "syss";
0261 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
0262 SYSC_OMAP2_SOFTRESET)>;
0263 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0264 <SYSC_IDLE_NO>,
0265 <SYSC_IDLE_SMART>,
0266 <SYSC_IDLE_SMART_WKUP>;
0267 ti,syss-mask = <1>;
0268 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0269 clocks = <&abe_clkctrl OMAP4_WD_TIMER3_CLKCTRL 0>;
0270 clock-names = "fck";
0271 #address-cells = <1>;
0272 #size-cells = <1>;
0273 ranges = <0x0 0x30000 0x1000>,
0274 <0x49030000 0x49030000 0x1000>;
0275
0276 wdt3: wdt@0 {
0277 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
0278 reg = <0x0 0x80>;
0279 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
0280 };
0281 };
0282
0283 mcpdm_module: target-module@32000 { /* 0x40132000, ap 16 10.0 */
0284 compatible = "ti,sysc-omap4", "ti,sysc";
0285 reg = <0x32000 0x4>,
0286 <0x32010 0x4>;
0287 reg-names = "rev", "sysc";
0288 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
0289 SYSC_OMAP4_SOFTRESET)>;
0290 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0291 <SYSC_IDLE_NO>,
0292 <SYSC_IDLE_SMART>,
0293 <SYSC_IDLE_SMART_WKUP>;
0294 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0295 clocks = <&abe_clkctrl OMAP4_MCPDM_CLKCTRL 0>;
0296 clock-names = "fck";
0297 #address-cells = <1>;
0298 #size-cells = <1>;
0299 ranges = <0x0 0x32000 0x1000>,
0300 <0x49032000 0x49032000 0x1000>;
0301
0302 /* Must be only enabled for boards with pdmclk wired */
0303 status = "disabled";
0304
0305 mcpdm: mcpdm@0 {
0306 compatible = "ti,omap4-mcpdm";
0307 reg = <0x0 0x7f>, /* MPU private access */
0308 <0x49032000 0x7f>; /* L3 Interconnect */
0309 reg-names = "mpu", "dma";
0310 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
0311 dmas = <&sdma 65>,
0312 <&sdma 66>;
0313 dma-names = "up_link", "dn_link";
0314 };
0315 };
0316
0317 target-module@38000 { /* 0x40138000, ap 18 12.0 */
0318 compatible = "ti,sysc-omap4-timer", "ti,sysc";
0319 reg = <0x38000 0x4>,
0320 <0x38010 0x4>;
0321 reg-names = "rev", "sysc";
0322 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
0323 SYSC_OMAP4_SOFTRESET)>;
0324 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0325 <SYSC_IDLE_NO>,
0326 <SYSC_IDLE_SMART>,
0327 <SYSC_IDLE_SMART_WKUP>;
0328 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0329 clocks = <&abe_clkctrl OMAP4_TIMER5_CLKCTRL 0>;
0330 clock-names = "fck";
0331 #address-cells = <1>;
0332 #size-cells = <1>;
0333 ranges = <0x0 0x38000 0x1000>,
0334 <0x49038000 0x49038000 0x1000>;
0335
0336 timer5: timer@0 {
0337 compatible = "ti,omap4430-timer";
0338 reg = <0x00000000 0x80>,
0339 <0x49038000 0x80>;
0340 clocks = <&abe_clkctrl OMAP4_TIMER5_CLKCTRL 24>,
0341 <&syc_clk_div_ck>;
0342 clock-names = "fck", "timer_sys_ck";
0343 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
0344 ti,timer-dsp;
0345 };
0346 };
0347
0348 target-module@3a000 { /* 0x4013a000, ap 20 14.0 */
0349 compatible = "ti,sysc-omap4-timer", "ti,sysc";
0350 reg = <0x3a000 0x4>,
0351 <0x3a010 0x4>;
0352 reg-names = "rev", "sysc";
0353 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
0354 SYSC_OMAP4_SOFTRESET)>;
0355 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0356 <SYSC_IDLE_NO>,
0357 <SYSC_IDLE_SMART>,
0358 <SYSC_IDLE_SMART_WKUP>;
0359 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0360 clocks = <&abe_clkctrl OMAP4_TIMER6_CLKCTRL 0>;
0361 clock-names = "fck";
0362 #address-cells = <1>;
0363 #size-cells = <1>;
0364 ranges = <0x0 0x3a000 0x1000>,
0365 <0x4903a000 0x4903a000 0x1000>;
0366
0367 timer6: timer@0 {
0368 compatible = "ti,omap4430-timer";
0369 reg = <0x00000000 0x80>,
0370 <0x4903a000 0x80>;
0371 clocks = <&abe_clkctrl OMAP4_TIMER6_CLKCTRL 24>,
0372 <&syc_clk_div_ck>;
0373 clock-names = "fck", "timer_sys_ck";
0374 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
0375 ti,timer-dsp;
0376 };
0377 };
0378
0379 target-module@3c000 { /* 0x4013c000, ap 22 16.0 */
0380 compatible = "ti,sysc-omap4-timer", "ti,sysc";
0381 reg = <0x3c000 0x4>,
0382 <0x3c010 0x4>;
0383 reg-names = "rev", "sysc";
0384 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
0385 SYSC_OMAP4_SOFTRESET)>;
0386 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0387 <SYSC_IDLE_NO>,
0388 <SYSC_IDLE_SMART>,
0389 <SYSC_IDLE_SMART_WKUP>;
0390 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0391 clocks = <&abe_clkctrl OMAP4_TIMER7_CLKCTRL 0>;
0392 clock-names = "fck";
0393 #address-cells = <1>;
0394 #size-cells = <1>;
0395 ranges = <0x0 0x3c000 0x1000>,
0396 <0x4903c000 0x4903c000 0x1000>;
0397
0398 timer7: timer@0 {
0399 compatible = "ti,omap4430-timer";
0400 reg = <0x00000000 0x80>,
0401 <0x4903c000 0x80>;
0402 clocks = <&abe_clkctrl OMAP4_TIMER7_CLKCTRL 24>,
0403 <&syc_clk_div_ck>;
0404 clock-names = "fck", "timer_sys_ck";
0405 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
0406 ti,timer-dsp;
0407 };
0408 };
0409
0410 target-module@3e000 { /* 0x4013e000, ap 24 18.0 */
0411 compatible = "ti,sysc-omap4-timer", "ti,sysc";
0412 reg = <0x3e000 0x4>,
0413 <0x3e010 0x4>;
0414 reg-names = "rev", "sysc";
0415 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
0416 SYSC_OMAP4_SOFTRESET)>;
0417 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0418 <SYSC_IDLE_NO>,
0419 <SYSC_IDLE_SMART>,
0420 <SYSC_IDLE_SMART_WKUP>;
0421 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0422 clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 0>;
0423 clock-names = "fck";
0424 #address-cells = <1>;
0425 #size-cells = <1>;
0426 ranges = <0x0 0x3e000 0x1000>,
0427 <0x4903e000 0x4903e000 0x1000>;
0428
0429 timer8: timer@0 {
0430 compatible = "ti,omap4430-timer";
0431 reg = <0x00000000 0x80>,
0432 <0x4903e000 0x80>;
0433 clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>,
0434 <&syc_clk_div_ck>;
0435 clock-names = "fck", "timer_sys_ck";
0436 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
0437 ti,timer-pwm;
0438 ti,timer-dsp;
0439 };
0440 };
0441
0442 target-module@80000 { /* 0x40180000, ap 26 1a.0 */
0443 compatible = "ti,sysc";
0444 status = "disabled";
0445 #address-cells = <1>;
0446 #size-cells = <1>;
0447 ranges = <0x0 0x80000 0x10000>,
0448 <0x49080000 0x49080000 0x10000>;
0449 };
0450
0451 target-module@a0000 { /* 0x401a0000, ap 28 1c.0 */
0452 compatible = "ti,sysc";
0453 status = "disabled";
0454 #address-cells = <1>;
0455 #size-cells = <1>;
0456 ranges = <0x0 0xa0000 0x10000>,
0457 <0x490a0000 0x490a0000 0x10000>;
0458 };
0459
0460 target-module@c0000 { /* 0x401c0000, ap 30 1e.0 */
0461 compatible = "ti,sysc";
0462 status = "disabled";
0463 #address-cells = <1>;
0464 #size-cells = <1>;
0465 ranges = <0x0 0xc0000 0x10000>,
0466 <0x490c0000 0x490c0000 0x10000>;
0467 };
0468
0469 target-module@f1000 { /* 0x401f1000, ap 32 20.0 */
0470 compatible = "ti,sysc-omap4", "ti,sysc";
0471 reg = <0xf1000 0x4>,
0472 <0xf1010 0x4>;
0473 reg-names = "rev", "sysc";
0474 ti,sysc-midle = <SYSC_IDLE_FORCE>,
0475 <SYSC_IDLE_NO>,
0476 <SYSC_IDLE_SMART>,
0477 <SYSC_IDLE_SMART_WKUP>;
0478 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0479 <SYSC_IDLE_NO>,
0480 <SYSC_IDLE_SMART>;
0481 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */
0482 clocks = <&abe_clkctrl OMAP4_AESS_CLKCTRL 0>;
0483 clock-names = "fck";
0484 #address-cells = <1>;
0485 #size-cells = <1>;
0486 ranges = <0x0 0xf1000 0x1000>,
0487 <0x490f1000 0x490f1000 0x1000>;
0488
0489 /*
0490 * No child device binding or driver in mainline.
0491 * See Android tree and related upstreaming efforts
0492 * for the old driver.
0493 */
0494 };
0495 };
0496 };
0497
