0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
0004 */
0005 /dts-v1/;
0006
0007 #include "omap36xx.dtsi"
0008 #include "omap-zoom-common.dtsi"
0009
0010 / {
0011 model = "TI Zoom3";
0012 compatible = "ti,omap3-zoom3", "ti,omap3630", "ti,omap36xx", "ti,omap3";
0013
0014 cpus {
0015 cpu@0 {
0016 cpu0-supply = <&vcc>;
0017 };
0018 };
0019
0020 memory@80000000 {
0021 device_type = "memory";
0022 reg = <0x80000000 0x20000000>; /* 512 MB */
0023 };
0024
0025 vddvario: regulator-vddvario {
0026 compatible = "regulator-fixed";
0027 regulator-name = "vddvario";
0028 regulator-always-on;
0029 };
0030
0031 vdd33a: regulator-vdd33a {
0032 compatible = "regulator-fixed";
0033 regulator-name = "vdd33a";
0034 regulator-always-on;
0035 };
0036
0037 wl12xx_vmmc: wl12xx_vmmc {
0038 pinctrl-names = "default";
0039 pinctrl-0 = <&wl12xx_gpio>;
0040 compatible = "regulator-fixed";
0041 regulator-name = "vwl1271";
0042 regulator-min-microvolt = <1800000>;
0043 regulator-max-microvolt = <1800000>;
0044 gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* gpio101 */
0045 startup-delay-us = <70000>;
0046 enable-active-high;
0047 };
0048 };
0049
0050 &omap3_pmx_core {
0051 /* REVISIT: twl gpio0 is mmc0_cd */
0052 mmc1_pins: pinmux_mmc1_pins {
0053 pinctrl-single,pins = <
0054 OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
0055 OMAP3_CORE1_IOPAD(0x2146, PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
0056 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
0057 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
0058 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
0059 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
0060 >;
0061 };
0062
0063 mmc2_pins: pinmux_mmc2_pins {
0064 pinctrl-single,pins = <
0065 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
0066 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
0067 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
0068 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
0069 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
0070 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
0071 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat4.sdmmc2_dat4 */
0072 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat5.sdmmc2_dat5 */
0073 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat6.sdmmc2_dat6 */
0074 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat7.sdmmc2_dat7 */
0075 >;
0076 };
0077
0078 mmc3_pins: pinmux_mmc3_pins {
0079 pinctrl-single,pins = <
0080 OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 WLAN IRQ */
0081 OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
0082 >;
0083 };
0084
0085 uart1_pins: pinmux_uart1_pins {
0086 pinctrl-single,pins = <
0087 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
0088 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
0089 OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
0090 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
0091 >;
0092 };
0093
0094 uart2_pins: pinmux_uart2_pins {
0095 pinctrl-single,pins = <
0096 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
0097 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
0098 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
0099 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
0100 >;
0101 };
0102
0103 uart3_pins: pinmux_uart3_pins {
0104 pinctrl-single,pins = <
0105 OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
0106 OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
0107 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
0108 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
0109 >;
0110 };
0111
0112 /* wl12xx GPIO output for WLAN_EN */
0113 wl12xx_gpio: pinmux_wl12xx_gpio {
0114 pinctrl-single,pins = <
0115 OMAP3_CORE1_IOPAD(0x211a, PIN_OUTPUT| MUX_MODE4) /* cam_d2.gpio_101 */
0116 >;
0117 };
0118 };
0119
0120 &omap3_pmx_core2 {
0121 mmc3_2_pins: pinmux_mmc3_2_pins {
0122 pinctrl-single,pins = <
0123 OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
0124 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d4.sdmmc3_dat0 */
0125 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
0126 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d6.sdmmc3_dat2 */
0127 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d3.sdmmc3_dat3 */
0128 >;
0129 };
0130 };
0131
0132 &omap3_pmx_wkup {
0133 wlan_host_wkup: pinmux_wlan_host_wkup_pins {
0134 pinctrl-single,pins = <
0135 OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_clkout1.gpio_10 WLAN_HOST_WKUP */
0136 >;
0137 };
0138 };
0139
0140 &i2c1 {
0141 clock-frequency = <2600000>;
0142
0143 twl: twl@48 {
0144 reg = <0x48>;
0145 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
0146 interrupt-parent = <&intc>;
0147 };
0148 };
0149
0150 #include "twl4030.dtsi"
0151
0152 &i2c2 {
0153 clock-frequency = <400000>;
0154 };
0155
0156 &i2c3 {
0157 clock-frequency = <400000>;
0158
0159 /*
0160 * TVP5146 Video decoder-in for analog input support.
0161 */
0162 tvp5146@5c {
0163 compatible = "ti,tvp5146m2";
0164 reg = <0x5c>;
0165 };
0166 };
0167
0168 &twl_gpio {
0169 ti,use-leds;
0170 };
0171
0172 &mmc1 {
0173 vmmc-supply = <&vmmc1>;
0174 vqmmc-supply = <&vsim>;
0175 bus-width = <4>;
0176 pinctrl-names = "default";
0177 pinctrl-0 = <&mmc1_pins>;
0178 };
0179 /*
0180 &mmc2 {
0181 vmmc-supply = <&vmmc2>;
0182 ti,non-removable;
0183 bus-width = <8>;
0184 pinctrl-names = "default";
0185 pinctrl-0 = <&mmc2_pins>;
0186 };
0187 */
0188 &mmc3 {
0189 vmmc-supply = <&wl12xx_vmmc>;
0190 non-removable;
0191 bus-width = <4>;
0192 cap-power-off-card;
0193 pinctrl-names = "default";
0194 pinctrl-0 = <&mmc3_pins &mmc3_2_pins>;
0195
0196 #address-cells = <1>;
0197 #size-cells = <0>;
0198 wlcore: wlcore@2 {
0199 compatible = "ti,wl1271";
0200 reg = <2>;
0201 interrupt-parent = <&gpio6>;
0202 interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 162 */
0203 ref-clock-frequency = <26000000>;
0204 };
0205 };
0206
0207 &uart1 {
0208 pinctrl-names = "default";
0209 pinctrl-0 = <&uart1_pins>;
0210 };
0211
0212 &uart2 {
0213 pinctrl-names = "default";
0214 pinctrl-0 = <&uart2_pins>;
0215 };
0216
0217 &uart3 {
0218 pinctrl-names = "default";
0219 pinctrl-0 = <&uart3_pins>;
0220 };
0221
0222 &uart4 {
0223 status = "disabled";
0224 };
0225
0226 &usb_otg_hs {
0227 interface-type = <0>;
0228 usb-phy = <&usb2_phy>;
0229 mode = <3>;
0230 power = <50>;
0231 };
