0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
0004 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
0005 */
0006 /dts-v1/;
0007
0008 #include "omap34xx.dtsi"
0009
0010 /* Secure omaps have some devices inaccessible depending on the firmware */
0011 &aes1_target {
0012 status = "disabled";
0013 };
0014
0015 &aes2_target {
0016 status = "disabled";
0017 };
0018
0019 &sham {
0020 status = "disabled";
0021 };
0022
0023 / {
0024 cpus {
0025 cpu@0 {
0026 cpu0-supply = <&vcc>;
0027 };
0028 };
0029
0030 memory@80000000 {
0031 device_type = "memory";
0032 reg = <0x80000000 0x10000000>; /* 256 MB */
0033 };
0034
0035 /* HS USB Port 2 Power */
0036 hsusb2_power: hsusb2_power_reg {
0037 compatible = "regulator-fixed";
0038 regulator-name = "hsusb2_vbus";
0039 regulator-min-microvolt = <3300000>;
0040 regulator-max-microvolt = <3300000>;
0041 gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
0042 startup-delay-us = <70000>;
0043 };
0044
0045 /* HS USB Host PHY on PORT 2 */
0046 hsusb2_phy: hsusb2_phy {
0047 compatible = "usb-nop-xceiv";
0048 reset-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>; /* gpio_162 */
0049 vcc-supply = <&hsusb2_power>;
0050 #phy-cells = <0>;
0051 };
0052
0053 sound {
0054 compatible = "ti,omap-twl4030";
0055 ti,model = "omap3beagle";
0056
0057 /* McBSP2 is used for onboard sound, same as on beagle */
0058 ti,mcbsp = <&mcbsp2>;
0059 };
0060
0061 /* Regulator to enable/switch the vcc of the Wifi module */
0062 mmc2_sdio_poweron: regulator-mmc2-sdio-poweron {
0063 compatible = "regulator-fixed";
0064 regulator-name = "regulator-mmc2-sdio-poweron";
0065 regulator-min-microvolt = <3150000>;
0066 regulator-max-microvolt = <3150000>;
0067 gpio = <&gpio5 29 GPIO_ACTIVE_LOW>; /* gpio_157 */
0068 startup-delay-us = <10000>;
0069 };
0070 };
0071
0072 &omap3_pmx_core {
0073 hsusbb2_pins: pinmux_hsusbb2_pins {
0074 pinctrl-single,pins = <
0075 OMAP3_CORE1_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
0076 OMAP3_CORE1_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
0077 OMAP3_CORE1_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
0078 OMAP3_CORE1_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
0079 OMAP3_CORE1_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
0080 OMAP3_CORE1_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
0081 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
0082 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
0083 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
0084 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
0085 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
0086 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
0087 >;
0088 };
0089
0090 mmc1_pins: pinmux_mmc1_pins {
0091 pinctrl-single,pins = <
0092 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
0093 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
0094 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
0095 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
0096 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
0097 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
0098 OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
0099 OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
0100 OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
0101 OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
0102 >;
0103 };
0104
0105 mmc2_pins: pinmux_mmc2_pins {
0106 pinctrl-single,pins = <
0107 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
0108 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
0109 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
0110 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
0111 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
0112 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
0113 >;
0114 };
0115
0116 /* wlan GPIO output for WLAN_EN */
0117 wlan_gpio: pinmux_wlan_gpio {
0118 pinctrl-single,pins = <
0119 OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_fsr gpio_157 */
0120 >;
0121 };
0122
0123 uart3_pins: pinmux_uart3_pins {
0124 pinctrl-single,pins = <
0125 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
0126 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
0127 >;
0128 };
0129
0130 i2c3_pins: pinmux_i2c3_pins {
0131 pinctrl-single,pins = <
0132 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl.i2c3_scl */
0133 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.i2c3_sda */
0134 >;
0135 };
0136
0137 mcspi1_pins: pinmux_mcspi1_pins {
0138 pinctrl-single,pins = <
0139 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
0140 OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
0141 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
0142 OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
0143 >;
0144 };
0145
0146 mcspi3_pins: pinmux_mcspi3_pins {
0147 pinctrl-single,pins = <
0148 OMAP3_CORE1_IOPAD(0x25dc, PIN_OUTPUT | MUX_MODE1) /* etk_d0.mcspi3_simo gpio14 INPUT | MODE1 */
0149 OMAP3_CORE1_IOPAD(0x25de, PIN_INPUT_PULLUP | MUX_MODE1) /* etk_d1.mcspi3_somi gpio15 INPUT | MODE1 */
0150 OMAP3_CORE1_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE1) /* etk_d2.mcspi3_cs0 gpio16 INPUT | MODE1 */
0151 OMAP3_CORE1_IOPAD(0x25e2, PIN_INPUT | MUX_MODE1) /* etk_d3.mcspi3_clk gpio17 INPUT | MODE1 */
0152 >;
0153 };
0154
0155 mcbsp3_pins: pinmux_mcbsp3_pins {
0156 pinctrl-single,pins = <
0157 OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0) /* mcbsp3_dx.uart2_cts */
0158 OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0) /* mcbsp3_dr.uart2_rts */
0159 OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0) /* mcbsp3_clk.uart2_tx */
0160 OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0) /* mcbsp3_fsx.uart2_rx */
0161 >;
0162 };
0163 };
0164
0165 /* McBSP1: mux'ed with GPIO158 as clock for HA-DSP */
0166 &mcbsp1 {
0167 status = "disabled";
0168 };
0169
0170 &mcbsp2 {
0171 status = "okay";
0172 };
0173
0174 &i2c1 {
0175 clock-frequency = <2600000>;
0176
0177 twl: twl@48 {
0178 reg = <0x48>;
0179 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
0180 interrupt-parent = <&intc>;
0181
0182 twl_audio: audio {
0183 compatible = "ti,twl4030-audio";
0184 codec {
0185 };
0186 };
0187 };
0188 };
0189
0190 &i2c3 {
0191 clock-frequency = <100000>;
0192
0193 pinctrl-names = "default";
0194 pinctrl-0 = <&i2c3_pins>;
0195 };
0196
0197 &mcspi1 {
0198 pinctrl-names = "default";
0199 pinctrl-0 = <&mcspi1_pins>;
0200 };
0201
0202 &mcspi3 {
0203 pinctrl-names = "default";
0204 pinctrl-0 = <&mcspi3_pins>;
0205 };
0206
0207 #include "twl4030.dtsi"
0208 #include "twl4030_omap3.dtsi"
0209
0210 &mmc1 {
0211 pinctrl-names = "default";
0212 pinctrl-0 = <&mmc1_pins>;
0213 vmmc-supply = <&vmmc1>;
0214 vqmmc-supply = <&vsim>;
0215 cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
0216 bus-width = <8>;
0217 };
0218
0219 // WiFi (Marvell 88W8686) on MMC2/SDIO
0220 &mmc2 {
0221 pinctrl-names = "default";
0222 pinctrl-0 = <&mmc2_pins>;
0223 vmmc-supply = <&mmc2_sdio_poweron>;
0224 non-removable;
0225 bus-width = <4>;
0226 cap-power-off-card;
0227 };
0228
0229 &mmc3 {
0230 status = "disabled";
0231 };
0232
0233 &usbhshost {
0234 port2-mode = "ehci-phy";
0235 };
0236
0237 &usbhsehci {
0238 phys = <0 &hsusb2_phy>;
0239 };
0240
0241 &twl_gpio {
0242 ti,use-leds;
0243 /* pullups: BIT(1) */
0244 ti,pullups = <0x000002>;
0245 /*
0246 * pulldowns:
0247 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
0248 * BIT(15), BIT(16), BIT(17)
0249 */
0250 ti,pulldowns = <0x03a1c4>;
0251 };
0252
0253 &uart3 {
0254 pinctrl-names = "default";
0255 pinctrl-0 = <&uart3_pins>;
0256 };
0257
0258 &mcbsp3 {
0259 status = "okay";
0260 pinctrl-names = "default";
0261 pinctrl-0 = <&mcbsp3_pins>;
0262 };
0263
0264 &gpmc {
0265 ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
0266
0267 nand@0,0 {
0268 compatible = "ti,omap2-nand";
0269 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
0270 interrupt-parent = <&gpmc>;
0271 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
0272 <1 IRQ_TYPE_NONE>; /* termcount */
0273 nand-bus-width = <16>;
0274 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
0275 ti,nand-ecc-opt = "sw";
0276
0277 gpmc,cs-on-ns = <0>;
0278 gpmc,cs-rd-off-ns = <36>;
0279 gpmc,cs-wr-off-ns = <36>;
0280 gpmc,adv-on-ns = <6>;
0281 gpmc,adv-rd-off-ns = <24>;
0282 gpmc,adv-wr-off-ns = <36>;
0283 gpmc,oe-on-ns = <6>;
0284 gpmc,oe-off-ns = <48>;
0285 gpmc,we-on-ns = <6>;
0286 gpmc,we-off-ns = <30>;
0287 gpmc,rd-cycle-ns = <72>;
0288 gpmc,wr-cycle-ns = <72>;
0289 gpmc,access-ns = <54>;
0290 gpmc,wr-access-ns = <30>;
0291
0292 #address-cells = <1>;
0293 #size-cells = <1>;
0294
0295 x-loader@0 {
0296 label = "X-Loader";
0297 reg = <0 0x80000>;
0298 };
0299
0300 bootloaders@80000 {
0301 label = "U-Boot";
0302 reg = <0x80000 0x1e0000>;
0303 };
0304
0305 bootloaders_env@260000 {
0306 label = "U-Boot Env";
0307 reg = <0x260000 0x20000>;
0308 };
0309
0310 kernel@280000 {
0311 label = "Kernel";
0312 reg = <0x280000 0x400000>;
0313 };
0314
0315 filesystem@680000 {
0316 label = "File System";
0317 reg = <0x680000 0xf980000>;
0318 };
0319 };
0320 };
0321
0322 &usb_otg_hs {
0323 interface-type = <0>;
0324 usb-phy = <&usb2_phy>;
0325 phys = <&usb2_phy>;
0326 phy-names = "usb2-phy";
0327 mode = <3>;
0328 power = <50>;
0329 };
0330
0331 &vaux2 {
0332 regulator-name = "vdd_ehci";
0333 regulator-min-microvolt = <1800000>;
0334 regulator-max-microvolt = <1800000>;
0335 regulator-always-on;
0336 };
