0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff)
0004 *
0005 * Written by: Aaro Koskinen <aaro.koskinen@iki.fi>
0006 */
0007
0008 #include "omap36xx.dtsi"
0009
0010 / {
0011 cpus {
0012 cpu@0 {
0013 cpu0-supply = <&vcc>;
0014 };
0015 };
0016
0017 memory@80000000 {
0018 device_type = "memory";
0019 reg = <0x80000000 0x40000000>; /* 1 GB */
0020 };
0021
0022 vemmc: fixedregulator0 {
0023 compatible = "regulator-fixed";
0024 regulator-name = "VEMMC";
0025 regulator-min-microvolt = <2900000>;
0026 regulator-max-microvolt = <2900000>;
0027 gpio = <&gpio5 29 GPIO_ACTIVE_HIGH>; /* gpio line 157 */
0028 startup-delay-us = <150>;
0029 enable-active-high;
0030 };
0031
0032 vwlan_fixed: fixedregulator2 {
0033 compatible = "regulator-fixed";
0034 regulator-name = "VWLAN";
0035 gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; /* gpio 35 */
0036 enable-active-high;
0037 };
0038
0039 leds {
0040 compatible = "gpio-leds";
0041
0042 heartbeat {
0043 label = "debug::sleep";
0044 gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; /* gpio92 */
0045 linux,default-trigger = "default-on";
0046 pinctrl-names = "default";
0047 pinctrl-0 = <&debug_leds>;
0048 };
0049 };
0050
0051 /* controlled (enabled/disabled) directly by wl1271 */
0052 vctcxo: vctcxo {
0053 compatible = "fixed-clock";
0054 #clock-cells = <0>;
0055 clock-frequency = <38400000>;
0056 };
0057 };
0058
0059 &omap3_pmx_core {
0060 accelerator_pins: pinmux_accelerator_pins {
0061 pinctrl-single,pins = <
0062 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT | MUX_MODE4) /* mcspi2_somi.gpio_180 -> LIS302 INT1 */
0063 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT | MUX_MODE4) /* mcspi2_cs0.gpio_181 -> LIS302 INT2 */
0064 >;
0065 };
0066
0067 debug_leds: pinmux_debug_led_pins {
0068 pinctrl-single,pins = <
0069 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE4) /* dss_data22.gpio_92 */
0070 >;
0071 };
0072
0073 mmc2_pins: pinmux_mmc2_pins {
0074 pinctrl-single,pins = <
0075 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
0076 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
0077 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
0078 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
0079 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
0080 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
0081 >;
0082 };
0083
0084 wlan_pins: pinmux_wlan_pins {
0085 pinctrl-single,pins = <
0086 OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE4) /* gpio 35 - wlan enable */
0087 OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 - wlan irq */
0088 >;
0089 };
0090
0091 ssi_pins: pinmux_ssi_pins {
0092 pinctrl-single,pins = <
0093 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
0094 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
0095 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
0096 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
0097 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
0098 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
0099 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
0100 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */
0101 >;
0102 };
0103
0104 ssi_pins_idle: pinmux_ssi_pins_idle {
0105 pinctrl-single,pins = <
0106 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE7) /* ssi1_dat_tx */
0107 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE7) /* ssi1_flag_tx */
0108 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLDOWN | MUX_MODE7) /* ssi1_rdy_tx */
0109 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
0110 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE7) /* ssi1_dat_rx */
0111 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE7) /* ssi1_flag_rx */
0112 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE4) /* ssi1_rdy_rx */
0113 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE7) /* ssi1_wake */
0114 >;
0115 };
0116
0117 modem_pins1: pinmux_modem_core1_pins {
0118 pinctrl-single,pins = <
0119 OMAP3_CORE1_IOPAD(0x207a, PIN_INPUT | MUX_MODE4) /* gpio_34 (ape_rst_rq) */
0120 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE4) /* gpio_88 (cmt_rst_rq) */
0121 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE4) /* gpio_93 (cmt_apeslpx) */
0122 >;
0123 };
0124
0125 uart2_pins: pinmux_uart2_pins {
0126 pinctrl-single,pins = <
0127 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */
0128 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts */
0129 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
0130 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */
0131 >;
0132 };
0133 };
0134
0135 &omap3_pmx_core2 {
0136 modem_pins2: pinmux_modem_core2_pins {
0137 pinctrl-single,pins = <
0138 OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4) /* gpio_23 (cmt_en) */
0139 >;
0140 };
0141 };
0142
0143 &i2c1 {
0144 clock-frequency = <2900000>;
0145
0146 twl: twl@48 {
0147 reg = <0x48>;
0148 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
0149 interrupt-parent = <&intc>;
0150 };
0151 };
0152
0153 /include/ "twl4030.dtsi"
0154
0155 &twl {
0156 compatible = "ti,twl5031";
0157
0158 twl_power: power {
0159 compatible = "ti,twl4030-power";
0160 ti,use_poweroff;
0161 };
0162 };
0163
0164 &twl_gpio {
0165 ti,pullups = <0x000001>; /* BIT(0) */
0166 ti,pulldowns = <0x008106>; /* BIT(1) | BIT(2) | BIT(8) | BIT(15) */
0167 };
0168
0169 &vdac {
0170 regulator-name = "vdac";
0171 regulator-min-microvolt = <1800000>;
0172 regulator-max-microvolt = <1800000>;
0173 };
0174
0175 &vpll1 {
0176 regulator-name = "vpll1";
0177 regulator-min-microvolt = <1800000>;
0178 regulator-max-microvolt = <1800000>;
0179 };
0180
0181 &vpll2 {
0182 regulator-name = "vpll2";
0183 regulator-min-microvolt = <1800000>;
0184 regulator-max-microvolt = <1800000>;
0185 };
0186
0187 &vaux1 {
0188 regulator-name = "vaux1";
0189 regulator-min-microvolt = <2800000>;
0190 regulator-max-microvolt = <2800000>;
0191 };
0192
0193 /* CSI-2 receiver */
0194 &vaux2 {
0195 regulator-name = "vaux2";
0196 regulator-min-microvolt = <1800000>;
0197 regulator-max-microvolt = <1800000>;
0198 };
0199
0200 /* Cameras */
0201 &vaux3 {
0202 regulator-name = "vaux3";
0203 regulator-min-microvolt = <2800000>;
0204 regulator-max-microvolt = <2800000>;
0205 };
0206
0207 &vaux4 {
0208 regulator-name = "vaux4";
0209 regulator-min-microvolt = <2800000>;
0210 regulator-max-microvolt = <2800000>;
0211 };
0212
0213 &vmmc1 {
0214 regulator-name = "vmmc1";
0215 regulator-min-microvolt = <1850000>;
0216 regulator-max-microvolt = <3150000>;
0217 };
0218
0219 &vmmc2 {
0220 regulator-name = "vmmc2";
0221 regulator-min-microvolt = <3000000>;
0222 regulator-max-microvolt = <3000000>;
0223 };
0224
0225 &vintana1 {
0226 regulator-name = "vintana1";
0227 regulator-min-microvolt = <1500000>;
0228 regulator-max-microvolt = <1500000>;
0229 };
0230
0231 &vintana2 {
0232 regulator-name = "vintana2";
0233 regulator-min-microvolt = <2750000>;
0234 regulator-max-microvolt = <2750000>;
0235 };
0236
0237 &vintdig {
0238 regulator-name = "vintdig";
0239 regulator-min-microvolt = <1500000>;
0240 regulator-max-microvolt = <1500000>;
0241 };
0242
0243 &vsim {
0244 regulator-name = "vsim";
0245 regulator-min-microvolt = <1800000>;
0246 regulator-max-microvolt = <1800000>;
0247 };
0248
0249 &vio {
0250 regulator-name = "vio";
0251 regulator-min-microvolt = <1800000>;
0252 regulator-max-microvolt = <1800000>;
0253 };
0254
0255 &i2c2 {
0256 clock-frequency = <400000>;
0257
0258 as3645a@30 {
0259 #address-cells = <1>;
0260 #size-cells = <0>;
0261 reg = <0x30>;
0262 compatible = "ams,as3645a";
0263 as3645a_flash: flash@0 {
0264 reg = <0x0>;
0265 flash-timeout-us = <150000>;
0266 flash-max-microamp = <320000>;
0267 led-max-microamp = <60000>;
0268 ams,input-max-microamp = <1750000>;
0269 };
0270 as3645a_indicator: indicator@1 {
0271 reg = <0x1>;
0272 led-max-microamp = <10000>;
0273 };
0274 };
0275 };
0276
0277 &i2c3 {
0278 clock-frequency = <400000>;
0279
0280 lis302: lis302@1d {
0281 compatible = "st,lis3lv02d";
0282 reg = <0x1d>;
0283
0284 Vdd-supply = <&vaux1>;
0285 Vdd_IO-supply = <&vio>;
0286
0287 pinctrl-names = "default";
0288 pinctrl-0 = <&accelerator_pins>;
0289
0290 interrupts-extended = <&gpio6 20 IRQ_TYPE_EDGE_FALLING>, <&gpio6 21 IRQ_TYPE_EDGE_FALLING>; /* 180, 181 */
0291
0292 /* click flags */
0293 st,click-single-x;
0294 st,click-single-y;
0295 st,click-single-z;
0296
0297 /* Limits are 0.5g * value */
0298 st,click-threshold-x = <8>;
0299 st,click-threshold-y = <8>;
0300 st,click-threshold-z = <10>;
0301
0302 /* Click must be longer than time limit */
0303 st,click-time-limit = <9>;
0304
0305 /* Kind of debounce filter */
0306 st,click-latency = <50>;
0307
0308 st,wakeup-x-hi;
0309 st,wakeup-y-hi;
0310 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
0311
0312 st,wakeup2-z-hi;
0313 st,wakeup2-threshold = <(1000/18)>; /* millig-value / 18 to get HW values */
0314
0315 st,highpass-cutoff-hz = <2>;
0316
0317 /* Interrupt line 1 for thresholds */
0318 st,irq1-ff-wu-1;
0319 st,irq1-ff-wu-2;
0320 /* Interrupt line 2 for click detection */
0321 st,irq2-click;
0322
0323 st,wu-duration-1 = <8>;
0324 st,wu-duration-2 = <8>;
0325 };
0326 };
0327
0328 &mmc1 {
0329 status = "disabled";
0330 };
0331
0332 &mmc2 {
0333 pinctrl-names = "default";
0334 pinctrl-0 = <&mmc2_pins>;
0335 vmmc-supply = <&vemmc>;
0336 bus-width = <4>;
0337 ti,non-removable;
0338 };
0339
0340 &mmc3 {
0341 status = "disabled";
0342 };
0343
0344 /* RNG not directly accessible on N950/N9. */
0345 &rng_target {
0346 status = "disabled";
0347 };
0348
0349 &usb_otg_hs {
0350 interface-type = <0>;
0351 usb-phy = <&usb2_phy>;
0352 phys = <&usb2_phy>;
0353 phy-names = "usb2-phy";
0354 mode = <3>;
0355 power = <50>;
0356 };
0357
0358 &gpmc {
0359 ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */
0360
0361 onenand@0,0 {
0362 #address-cells = <1>;
0363 #size-cells = <1>;
0364 compatible = "ti,omap2-onenand";
0365 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
0366
0367 /*
0368 * These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported
0369 * bootloader set values when booted with v4.19 using both N950
0370 * and N9 devices (OneNAND Manufacturer: Samsung):
0371 *
0372 * gpmc cs0 before gpmc_cs_program_settings:
0373 * cs0 GPMC_CS_CONFIG1: 0xfd001202
0374 * cs0 GPMC_CS_CONFIG2: 0x00181800
0375 * cs0 GPMC_CS_CONFIG3: 0x00030300
0376 * cs0 GPMC_CS_CONFIG4: 0x18001804
0377 * cs0 GPMC_CS_CONFIG5: 0x03171d1d
0378 * cs0 GPMC_CS_CONFIG6: 0x97080000
0379 */
0380 gpmc,sync-read;
0381 gpmc,sync-write;
0382 gpmc,burst-length = <16>;
0383 gpmc,burst-read;
0384 gpmc,burst-wrap;
0385 gpmc,burst-write;
0386 gpmc,device-width = <2>;
0387 gpmc,mux-add-data = <2>;
0388 gpmc,cs-on-ns = <0>;
0389 gpmc,cs-rd-off-ns = <122>;
0390 gpmc,cs-wr-off-ns = <122>;
0391 gpmc,adv-on-ns = <0>;
0392 gpmc,adv-rd-off-ns = <15>;
0393 gpmc,adv-wr-off-ns = <15>;
0394 gpmc,oe-on-ns = <20>;
0395 gpmc,oe-off-ns = <122>;
0396 gpmc,we-on-ns = <0>;
0397 gpmc,we-off-ns = <122>;
0398 gpmc,rd-cycle-ns = <148>;
0399 gpmc,wr-cycle-ns = <148>;
0400 gpmc,access-ns = <117>;
0401 gpmc,page-burst-access-ns = <15>;
0402 gpmc,bus-turnaround-ns = <0>;
0403 gpmc,cycle2cycle-delay-ns = <0>;
0404 gpmc,wait-monitoring-ns = <0>;
0405 gpmc,clk-activation-ns = <10>;
0406 gpmc,wr-data-mux-bus-ns = <40>;
0407 gpmc,wr-access-ns = <117>;
0408
0409 gpmc,sync-clk-ps = <15000>; /* TBC; Where this value came? */
0410
0411 /*
0412 * MTD partition table corresponding to Nokia's MeeGo 1.2
0413 * Harmattan release.
0414 */
0415 partition@0 {
0416 label = "bootloader";
0417 reg = <0x00000000 0x00100000>;
0418 };
0419 partition@1 {
0420 label = "config";
0421 reg = <0x00100000 0x002c0000>;
0422 };
0423 partition@2 {
0424 label = "kernel";
0425 reg = <0x003c0000 0x01000000>;
0426 };
0427 partition@3 {
0428 label = "log";
0429 reg = <0x013c0000 0x00200000>;
0430 };
0431 partition@4 {
0432 label = "var";
0433 reg = <0x015c0000 0x1ca40000>;
0434 };
0435 partition@5 {
0436 label = "moslo";
0437 reg = <0x1e000000 0x02000000>;
0438 };
0439 partition@6 {
0440 label = "omap2-onenand";
0441 reg = <0x00000000 0x20000000>;
0442 };
0443 };
0444 };
0445
0446 &ssi_port1 {
0447 pinctrl-names = "default", "idle";
0448 pinctrl-0 = <&ssi_pins>;
0449 pinctrl-1 = <&ssi_pins_idle>;
0450
0451 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
0452
0453 modem: hsi-client {
0454 pinctrl-names = "default";
0455 pinctrl-0 = <&modem_pins1 &modem_pins2>;
0456
0457 hsi-channel-ids = <0>, <1>, <2>, <3>;
0458 hsi-channel-names = "mcsaab-control",
0459 "speech-control",
0460 "speech-data",
0461 "mcsaab-data";
0462 hsi-speed-kbps = <96000>;
0463 hsi-mode = "frame";
0464 hsi-flow = "synchronized";
0465 hsi-arb-mode = "round-robin";
0466
0467 interrupts-extended = <&gpio2 2 IRQ_TYPE_EDGE_RISING>; /* gpio 34 */
0468
0469 gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>, /* gpio 93 */
0470 <&gpio3 24 GPIO_ACTIVE_HIGH>, /* gpio 88 */
0471 <&gpio1 23 GPIO_ACTIVE_HIGH>; /* gpio 23 */
0472 gpio-names = "cmt_apeslpx",
0473 "cmt_rst_rq",
0474 "cmt_en";
0475 };
0476 };
0477
0478 &ssi_port2 {
0479 status = "disabled";
0480 };
0481
0482 &uart2 {
0483 pinctrl-names = "default";
0484 pinctrl-0 = <&uart2_pins>;
0485
0486 bluetooth {
0487 compatible = "ti,wl1271-bluetooth-nokia", "nokia,h4p-bluetooth";
0488
0489 reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; /* 26 */
0490 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
0491 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
0492
0493 clocks = <&vctcxo>;
0494 clock-names = "sysclk";
0495 };
0496 };
0497
0498 &aes1_target {
0499 status = "disabled";
0500 };
0501
0502 &aes2_target {
0503 status = "disabled";
0504 };
