0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
0004 * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
0005 */
0006
0007 /dts-v1/;
0008
0009 #include "omap34xx.dtsi"
0010 #include <dt-bindings/input/input.h>
0011 #include <dt-bindings/leds/common.h>
0012
0013 /*
0014 * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
0015 * for omap AES HW crypto support. When linux kernel try to access memory of AES
0016 * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
0017 * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
0018 * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
0019 * There is "unofficial" version of bootloader which enables AES in L3 firewall
0020 * but it is not widely used and to prevent kernel crash rather AES is disabled.
0021 * There is also no runtime detection code if AES is disabled in L3 firewall...
0022 */
0023 &aes1_target {
0024 status = "disabled";
0025 };
0026
0027 &aes2_target {
0028 status = "disabled";
0029 };
0030
0031 / {
0032 model = "Nokia N900";
0033 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
0034
0035 aliases {
0036 i2c0;
0037 i2c1 = &i2c1;
0038 i2c2 = &i2c2;
0039 i2c3 = &i2c3;
0040 display0 = &lcd;
0041 display1 = &tv;
0042 };
0043
0044 cpus {
0045 cpu@0 {
0046 cpu0-supply = <&vcc>;
0047 };
0048 };
0049
0050 leds {
0051 compatible = "gpio-leds";
0052 heartbeat {
0053 label = "debug::sleep";
0054 gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; /* 162 */
0055 linux,default-trigger = "default-on";
0056 pinctrl-names = "default";
0057 pinctrl-0 = <&debug_leds>;
0058 };
0059 };
0060
0061 memory@80000000 {
0062 device_type = "memory";
0063 reg = <0x80000000 0x10000000>; /* 256 MB */
0064 };
0065
0066 gpio_keys {
0067 compatible = "gpio-keys";
0068
0069 camera_lens_cover {
0070 label = "Camera Lens Cover";
0071 gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
0072 linux,input-type = <EV_SW>;
0073 linux,code = <SW_CAMERA_LENS_COVER>;
0074 linux,can-disable;
0075 };
0076
0077 camera_focus {
0078 label = "Camera Focus";
0079 gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
0080 linux,code = <KEY_CAMERA_FOCUS>;
0081 linux,can-disable;
0082 };
0083
0084 camera_capture {
0085 label = "Camera Capture";
0086 gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
0087 linux,code = <KEY_CAMERA>;
0088 linux,can-disable;
0089 };
0090
0091 lock_button {
0092 label = "Lock Button";
0093 gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
0094 linux,code = <KEY_SCREENLOCK>;
0095 linux,can-disable;
0096 };
0097
0098 keypad_slide {
0099 label = "Keypad Slide";
0100 gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
0101 linux,input-type = <EV_SW>;
0102 linux,code = <SW_KEYPAD_SLIDE>;
0103 linux,can-disable;
0104 };
0105
0106 proximity_sensor {
0107 label = "Proximity Sensor";
0108 gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
0109 linux,input-type = <EV_SW>;
0110 linux,code = <SW_FRONT_PROXIMITY>;
0111 linux,can-disable;
0112 };
0113
0114 machine_cover {
0115 label = "Machine Cover";
0116 gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
0117 linux,input-type = <EV_SW>;
0118 linux,code = <SW_MACHINE_COVER>;
0119 linux,can-disable;
0120 };
0121 };
0122
0123 isp1707: isp1707 {
0124 compatible = "nxp,isp1707";
0125 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
0126 usb-phy = <&usb2_phy>;
0127 };
0128
0129 tv: connector {
0130 compatible = "composite-video-connector";
0131 label = "tv";
0132
0133 port {
0134 tv_connector_in: endpoint {
0135 remote-endpoint = <&venc_out>;
0136 };
0137 };
0138 };
0139
0140 sound: n900-audio {
0141 compatible = "nokia,n900-audio";
0142
0143 nokia,cpu-dai = <&mcbsp2>;
0144 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
0145 nokia,headphone-amplifier = <&tpa6130a2>;
0146
0147 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
0148 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
0149 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
0150 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
0151 };
0152
0153 battery: n900-battery {
0154 compatible = "nokia,n900-battery";
0155 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
0156 io-channel-names = "temp", "bsi", "vbat";
0157 };
0158
0159 pwm9: dmtimer-pwm {
0160 compatible = "ti,omap-dmtimer-pwm";
0161 #pwm-cells = <3>;
0162 ti,timers = <&timer9>;
0163 ti,clock-source = <0x00>; /* timer_sys_ck */
0164 };
0165
0166 ir: n900-ir {
0167 compatible = "nokia,n900-ir";
0168 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
0169 };
0170
0171 rom_rng: rng {
0172 compatible = "nokia,n900-rom-rng";
0173 clocks = <&rng_ick>;
0174 clock-names = "ick";
0175 };
0176
0177 /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
0178 vctcxo: vctcxo {
0179 compatible = "fixed-clock";
0180 #clock-cells = <0>;
0181 clock-frequency = <38400000>;
0182 };
0183 };
0184
0185 &isp {
0186 vdds_csib-supply = <&vaux2>;
0187
0188 pinctrl-names = "default";
0189 pinctrl-0 = <&camera_pins>;
0190
0191 ports {
0192 port@1 {
0193 reg = <1>;
0194
0195 csi_isp: endpoint {
0196 remote-endpoint = <&csi_cam1>;
0197 bus-type = <3>; /* CCP2 */
0198 clock-lanes = <1>;
0199 data-lanes = <0>;
0200 lane-polarity = <0 0>;
0201 /* Select strobe = <1> for back camera, <0> for front camera */
0202 strobe = <1>;
0203 };
0204 };
0205 };
0206 };
0207
0208 &omap3_pmx_core {
0209 pinctrl-names = "default";
0210
0211 uart2_pins: pinmux_uart2_pins {
0212 pinctrl-single,pins = <
0213 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */
0214 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts */
0215 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
0216 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */
0217 >;
0218 };
0219
0220 uart3_pins: pinmux_uart3_pins {
0221 pinctrl-single,pins = <
0222 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx */
0223 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx */
0224 >;
0225 };
0226
0227 ethernet_pins: pinmux_ethernet_pins {
0228 pinctrl-single,pins = <
0229 OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* gpmc_ncs3.gpio_54 */
0230 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4) /* dss_data16.gpio_86 */
0231 OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */
0232 >;
0233 };
0234
0235 gpmc_pins: pinmux_gpmc_pins {
0236 pinctrl-single,pins = <
0237
0238 /* address lines */
0239 OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
0240 OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
0241 OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
0242
0243 /* data lines, gpmc_d0..d7 not muxable according to TRM */
0244 OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
0245 OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
0246 OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
0247 OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
0248 OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
0249 OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
0250 OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
0251 OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
0252
0253 /*
0254 * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
0255 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
0256 */
0257 OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
0258 OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
0259 >;
0260 };
0261
0262 i2c1_pins: pinmux_i2c1_pins {
0263 pinctrl-single,pins = <
0264 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl */
0265 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda */
0266 >;
0267 };
0268
0269 i2c2_pins: pinmux_i2c2_pins {
0270 pinctrl-single,pins = <
0271 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
0272 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
0273 >;
0274 };
0275
0276 i2c3_pins: pinmux_i2c3_pins {
0277 pinctrl-single,pins = <
0278 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
0279 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
0280 >;
0281 };
0282
0283 debug_leds: pinmux_debug_led_pins {
0284 pinctrl-single,pins = <
0285 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 */
0286 >;
0287 };
0288
0289 mcspi4_pins: pinmux_mcspi4_pins {
0290 pinctrl-single,pins = <
0291 OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
0292 OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
0293 OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
0294 OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
0295 >;
0296 };
0297
0298 mmc1_pins: pinmux_mmc1_pins {
0299 pinctrl-single,pins = <
0300 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
0301 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
0302 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */
0303 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
0304 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
0305 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
0306 >;
0307 };
0308
0309 mmc2_pins: pinmux_mmc2_pins {
0310 pinctrl-single,pins = <
0311 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
0312 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
0313 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
0314 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
0315 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
0316 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
0317 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
0318 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
0319 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
0320 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
0321 >;
0322 };
0323
0324 acx565akm_pins: pinmux_acx565akm_pins {
0325 pinctrl-single,pins = <
0326 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
0327 >;
0328 };
0329
0330 dss_sdi_pins: pinmux_dss_sdi_pins {
0331 pinctrl-single,pins = <
0332 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1) /* dss_data10.sdi_dat1n */
0333 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1) /* dss_data11.sdi_dat1p */
0334 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1) /* dss_data12.sdi_dat2n */
0335 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1) /* dss_data13.sdi_dat2p */
0336
0337 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1) /* dss_data22.sdi_clkp */
0338 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn */
0339 >;
0340 };
0341
0342 wl1251_pins: pinmux_wl1251 {
0343 pinctrl-single,pins = <
0344 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4) /* gpio 87 => wl1251 enable */
0345 OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 => wl1251 irq */
0346 >;
0347 };
0348
0349 ssi_pins: pinmux_ssi {
0350 pinctrl-single,pins = <
0351 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
0352 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
0353 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
0354 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
0355 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
0356 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
0357 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
0358 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */
0359 >;
0360 };
0361
0362 modem_pins: pinmux_modem {
0363 pinctrl-single,pins = <
0364 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4) /* gpio 70 => cmt_apeslpx */
0365 OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4) /* gpio 72 => ape_rst_rq */
0366 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4) /* gpio 73 => cmt_rst_rq */
0367 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4) /* gpio 74 => cmt_en */
0368 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4) /* gpio 75 => cmt_rst */
0369 OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* gpio 157 => cmt_bsi */
0370 >;
0371 };
0372
0373 camera_pins: pinmux_camera {
0374 pinctrl-single,pins = <
0375 OMAP3_CORE1_IOPAD(0x210c, PIN_OUTPUT | MUX_MODE7) /* cam_hs */
0376 OMAP3_CORE1_IOPAD(0x210e, PIN_OUTPUT | MUX_MODE7) /* cam_vs */
0377 OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0) /* cam_xclka */
0378 OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE7) /* cam_d4 */
0379 OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0) /* cam_d6 */
0380 OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0) /* cam_d7 */
0381 OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE0) /* cam_d8 */
0382 OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE0) /* cam_d9 */
0383 OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE7) /* cam_d10 */
0384 OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE7) /* cam_xclkb */
0385 OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE0) /* cam_strobe */
0386 >;
0387 };
0388 };
0389
0390 &i2c1 {
0391 pinctrl-names = "default";
0392 pinctrl-0 = <&i2c1_pins>;
0393
0394 clock-frequency = <2200000>;
0395
0396 twl: twl@48 {
0397 reg = <0x48>;
0398 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
0399 interrupt-parent = <&intc>;
0400 };
0401 };
0402
0403 #include "twl4030.dtsi"
0404 #include "twl4030_omap3.dtsi"
0405
0406 &vaux1 {
0407 regulator-name = "V28";
0408 regulator-min-microvolt = <2800000>;
0409 regulator-max-microvolt = <2800000>;
0410 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
0411 regulator-always-on; /* due to battery cover sensor */
0412 };
0413
0414 &vaux2 {
0415 regulator-name = "VCSI";
0416 regulator-min-microvolt = <1800000>;
0417 regulator-max-microvolt = <1800000>;
0418 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
0419 };
0420
0421 &vaux3 {
0422 regulator-name = "VMMC2_30";
0423 regulator-min-microvolt = <2800000>;
0424 regulator-max-microvolt = <3000000>;
0425 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
0426 };
0427
0428 &vaux4 {
0429 regulator-name = "VCAM_ANA_28";
0430 regulator-min-microvolt = <2800000>;
0431 regulator-max-microvolt = <2800000>;
0432 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
0433 };
0434
0435 &vmmc1 {
0436 regulator-name = "VMMC1";
0437 regulator-min-microvolt = <1850000>;
0438 regulator-max-microvolt = <3150000>;
0439 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
0440 };
0441
0442 &vmmc2 {
0443 regulator-name = "V28_A";
0444 regulator-min-microvolt = <2800000>;
0445 regulator-max-microvolt = <3000000>;
0446 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
0447 regulator-always-on; /* due VIO leak to AIC34 VDDs */
0448 };
0449
0450 &vpll1 {
0451 regulator-name = "VPLL";
0452 regulator-min-microvolt = <1800000>;
0453 regulator-max-microvolt = <1800000>;
0454 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
0455 regulator-always-on;
0456 };
0457
0458 &vpll2 {
0459 regulator-name = "VSDI_CSI";
0460 regulator-min-microvolt = <1800000>;
0461 regulator-max-microvolt = <1800000>;
0462 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
0463 regulator-always-on;
0464 };
0465
0466 &vsim {
0467 regulator-name = "VMMC2_IO_18";
0468 regulator-min-microvolt = <1800000>;
0469 regulator-max-microvolt = <1800000>;
0470 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
0471 };
0472
0473 &vio {
0474 regulator-name = "VIO";
0475 regulator-min-microvolt = <1800000>;
0476 regulator-max-microvolt = <1800000>;
0477 };
0478
0479 &vintana1 {
0480 regulator-name = "VINTANA1";
0481 /* fixed to 1500000 */
0482 regulator-always-on;
0483 };
0484
0485 &vintana2 {
0486 regulator-name = "VINTANA2";
0487 regulator-min-microvolt = <2750000>;
0488 regulator-max-microvolt = <2750000>;
0489 regulator-always-on;
0490 };
0491
0492 &vintdig {
0493 regulator-name = "VINTDIG";
0494 /* fixed to 1500000 */
0495 regulator-always-on;
0496 };
0497
0498 /* First two dma channels are reserved on secure omap3 */
0499 &sdma {
0500 dma-channel-mask = <0xfffffffc>;
0501 };
0502
0503 &twl {
0504 twl_audio: audio {
0505 compatible = "ti,twl4030-audio";
0506 ti,enable-vibra = <1>;
0507 };
0508
0509 twl_power: power {
0510 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
0511 ti,use_poweroff;
0512 };
0513 };
0514
0515 &twl_keypad {
0516 linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
0517 MATRIX_KEY(0x00, 0x01, KEY_O)
0518 MATRIX_KEY(0x00, 0x02, KEY_P)
0519 MATRIX_KEY(0x00, 0x03, KEY_COMMA)
0520 MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
0521 MATRIX_KEY(0x00, 0x06, KEY_A)
0522 MATRIX_KEY(0x00, 0x07, KEY_S)
0523
0524 MATRIX_KEY(0x01, 0x00, KEY_W)
0525 MATRIX_KEY(0x01, 0x01, KEY_D)
0526 MATRIX_KEY(0x01, 0x02, KEY_F)
0527 MATRIX_KEY(0x01, 0x03, KEY_G)
0528 MATRIX_KEY(0x01, 0x04, KEY_H)
0529 MATRIX_KEY(0x01, 0x05, KEY_J)
0530 MATRIX_KEY(0x01, 0x06, KEY_K)
0531 MATRIX_KEY(0x01, 0x07, KEY_L)
0532
0533 MATRIX_KEY(0x02, 0x00, KEY_E)
0534 MATRIX_KEY(0x02, 0x01, KEY_DOT)
0535 MATRIX_KEY(0x02, 0x02, KEY_UP)
0536 MATRIX_KEY(0x02, 0x03, KEY_ENTER)
0537 MATRIX_KEY(0x02, 0x05, KEY_Z)
0538 MATRIX_KEY(0x02, 0x06, KEY_X)
0539 MATRIX_KEY(0x02, 0x07, KEY_C)
0540 MATRIX_KEY(0x02, 0x08, KEY_F9)
0541
0542 MATRIX_KEY(0x03, 0x00, KEY_R)
0543 MATRIX_KEY(0x03, 0x01, KEY_V)
0544 MATRIX_KEY(0x03, 0x02, KEY_B)
0545 MATRIX_KEY(0x03, 0x03, KEY_N)
0546 MATRIX_KEY(0x03, 0x04, KEY_M)
0547 MATRIX_KEY(0x03, 0x05, KEY_SPACE)
0548 MATRIX_KEY(0x03, 0x06, KEY_SPACE)
0549 MATRIX_KEY(0x03, 0x07, KEY_LEFT)
0550
0551 MATRIX_KEY(0x04, 0x00, KEY_T)
0552 MATRIX_KEY(0x04, 0x01, KEY_DOWN)
0553 MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
0554 MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
0555 MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
0556 MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
0557 MATRIX_KEY(0x04, 0x08, KEY_F10)
0558
0559 MATRIX_KEY(0x05, 0x00, KEY_Y)
0560 MATRIX_KEY(0x05, 0x08, KEY_F11)
0561
0562 MATRIX_KEY(0x06, 0x00, KEY_U)
0563
0564 MATRIX_KEY(0x07, 0x00, KEY_I)
0565 MATRIX_KEY(0x07, 0x01, KEY_F7)
0566 MATRIX_KEY(0x07, 0x02, KEY_F8)
0567 >;
0568 };
0569
0570 &twl_gpio {
0571 ti,pullups = <0x0>;
0572 ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
0573 };
0574
0575 &i2c2 {
0576 pinctrl-names = "default";
0577 pinctrl-0 = <&i2c2_pins>;
0578
0579 clock-frequency = <100000>;
0580
0581 tlv320aic3x: tlv320aic3x@18 {
0582 compatible = "ti,tlv320aic3x";
0583 reg = <0x18>;
0584 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
0585 ai3x-gpio-func = <
0586 0 /* AIC3X_GPIO1_FUNC_DISABLED */
0587 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
0588 >;
0589
0590 AVDD-supply = <&vmmc2>;
0591 DRVDD-supply = <&vmmc2>;
0592 IOVDD-supply = <&vio>;
0593 DVDD-supply = <&vio>;
0594
0595 ai3x-micbias-vg = <1>;
0596 };
0597
0598 tlv320aic3x_aux: tlv320aic3x@19 {
0599 compatible = "ti,tlv320aic3x";
0600 reg = <0x19>;
0601 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
0602
0603 AVDD-supply = <&vmmc2>;
0604 DRVDD-supply = <&vmmc2>;
0605 IOVDD-supply = <&vio>;
0606 DVDD-supply = <&vio>;
0607
0608 ai3x-micbias-vg = <2>;
0609 };
0610
0611 tsl2563: tsl2563@29 {
0612 compatible = "amstaos,tsl2563";
0613 reg = <0x29>;
0614
0615 amstaos,cover-comp-gain = <16>;
0616 };
0617
0618 adp1653: led-controller@30 {
0619 compatible = "adi,adp1653";
0620 reg = <0x30>;
0621 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
0622
0623 flash {
0624 flash-timeout-us = <500000>;
0625 flash-max-microamp = <320000>;
0626 led-max-microamp = <50000>;
0627 };
0628 indicator {
0629 led-max-microamp = <17500>;
0630 };
0631 };
0632
0633 lp5523: lp5523@32 {
0634 #address-cells = <1>;
0635 #size-cells = <0>;
0636 compatible = "national,lp5523";
0637 reg = <0x32>;
0638 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
0639 enable-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
0640
0641 led@0 {
0642 reg = <0>;
0643 chan-name = "lp5523:kb1";
0644 led-cur = /bits/ 8 <50>;
0645 max-cur = /bits/ 8 <100>;
0646 color = <LED_COLOR_ID_WHITE>;
0647 function = LED_FUNCTION_KBD_BACKLIGHT;
0648 };
0649
0650 led@1 {
0651 reg = <1>;
0652 chan-name = "lp5523:kb2";
0653 led-cur = /bits/ 8 <50>;
0654 max-cur = /bits/ 8 <100>;
0655 color = <LED_COLOR_ID_WHITE>;
0656 function = LED_FUNCTION_KBD_BACKLIGHT;
0657 };
0658
0659 led@2 {
0660 reg = <2>;
0661 chan-name = "lp5523:kb3";
0662 led-cur = /bits/ 8 <50>;
0663 max-cur = /bits/ 8 <100>;
0664 color = <LED_COLOR_ID_WHITE>;
0665 function = LED_FUNCTION_KBD_BACKLIGHT;
0666 };
0667
0668 led@3 {
0669 reg = <3>;
0670 chan-name = "lp5523:kb4";
0671 led-cur = /bits/ 8 <50>;
0672 max-cur = /bits/ 8 <100>;
0673 color = <LED_COLOR_ID_WHITE>;
0674 function = LED_FUNCTION_KBD_BACKLIGHT;
0675 };
0676
0677 led@4 {
0678 reg = <4>;
0679 chan-name = "lp5523:b";
0680 led-cur = /bits/ 8 <50>;
0681 max-cur = /bits/ 8 <100>;
0682 color = <LED_COLOR_ID_BLUE>;
0683 function = LED_FUNCTION_STATUS;
0684 };
0685
0686 led@5 {
0687 reg = <5>;
0688 chan-name = "lp5523:g";
0689 led-cur = /bits/ 8 <50>;
0690 max-cur = /bits/ 8 <100>;
0691 color = <LED_COLOR_ID_GREEN>;
0692 function = LED_FUNCTION_STATUS;
0693 };
0694
0695 led@6 {
0696 reg = <6>;
0697 chan-name = "lp5523:r";
0698 led-cur = /bits/ 8 <50>;
0699 max-cur = /bits/ 8 <100>;
0700 color = <LED_COLOR_ID_RED>;
0701 function = LED_FUNCTION_STATUS;
0702 };
0703
0704 led@7 {
0705 reg = <7>;
0706 chan-name = "lp5523:kb5";
0707 led-cur = /bits/ 8 <50>;
0708 max-cur = /bits/ 8 <100>;
0709 color = <LED_COLOR_ID_WHITE>;
0710 function = LED_FUNCTION_KBD_BACKLIGHT;
0711 };
0712
0713 led@8 {
0714 reg = <8>;
0715 chan-name = "lp5523:kb6";
0716 led-cur = /bits/ 8 <50>;
0717 max-cur = /bits/ 8 <100>;
0718 color = <LED_COLOR_ID_WHITE>;
0719 function = LED_FUNCTION_KBD_BACKLIGHT;
0720 };
0721 };
0722
0723 bq27200: bq27200@55 {
0724 compatible = "ti,bq27200";
0725 reg = <0x55>;
0726 power-supplies = <&bq24150a>;
0727 };
0728
0729 /* Stereo headphone amplifier */
0730 tpa6130a2: tpa6130a2@60 {
0731 compatible = "ti,tpa6130a2";
0732 reg = <0x60>;
0733
0734 Vdd-supply = <&vmmc2>;
0735
0736 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
0737 };
0738
0739 si4713: si4713@63 {
0740 compatible = "silabs,si4713";
0741 reg = <0x63>;
0742
0743 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
0744 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
0745 vio-supply = <&vio>;
0746 vdd-supply = <&vaux1>;
0747 };
0748
0749 bq24150a: bq24150a@6b {
0750 compatible = "ti,bq24150a";
0751 reg = <0x6b>;
0752
0753 ti,current-limit = <100>;
0754 ti,weak-battery-voltage = <3400>;
0755 ti,battery-regulation-voltage = <4200>;
0756 ti,charge-current = <650>;
0757 ti,termination-current = <100>;
0758 ti,resistor-sense = <68>;
0759
0760 ti,usb-charger-detection = <&isp1707>;
0761 };
0762 };
0763
0764 &i2c3 {
0765 pinctrl-names = "default";
0766 pinctrl-0 = <&i2c3_pins>;
0767
0768 clock-frequency = <400000>;
0769
0770 lis302dl: lis3lv02d@1d {
0771 compatible = "st,lis3lv02d";
0772 reg = <0x1d>;
0773
0774 Vdd-supply = <&vaux1>;
0775 Vdd_IO-supply = <&vio>;
0776
0777 interrupt-parent = <&gpio6>;
0778 interrupts = <21 20>; /* 181 and 180 */
0779
0780 /* click flags */
0781 st,click-single-x;
0782 st,click-single-y;
0783 st,click-single-z;
0784
0785 /* Limits are 0.5g * value */
0786 st,click-threshold-x = <8>;
0787 st,click-threshold-y = <8>;
0788 st,click-threshold-z = <10>;
0789
0790 /* Click must be longer than time limit */
0791 st,click-time-limit = <9>;
0792
0793 /* Kind of debounce filter */
0794 st,click-latency = <50>;
0795
0796 /* Interrupt line 2 for click detection */
0797 st,irq2-click;
0798
0799 st,wakeup-x-hi;
0800 st,wakeup-y-hi;
0801 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
0802
0803 st,wakeup2-z-hi;
0804 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
0805
0806 st,hipass1-disable;
0807 st,hipass2-disable;
0808
0809 st,axis-x = <1>; /* LIS3_DEV_X */
0810 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
0811 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
0812
0813 st,min-limit-x = <(-32)>;
0814 st,min-limit-y = <3>;
0815 st,min-limit-z = <3>;
0816
0817 st,max-limit-x = <(-3)>;
0818 st,max-limit-y = <32>;
0819 st,max-limit-z = <32>;
0820 };
0821
0822 cam1: camera@3e {
0823 compatible = "toshiba,et8ek8";
0824 reg = <0x3e>;
0825
0826 vana-supply = <&vaux4>;
0827
0828 clocks = <&isp 0>;
0829 clock-names = "extclk";
0830 clock-frequency = <9600000>;
0831
0832 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
0833
0834 lens-focus = <&ad5820>;
0835
0836 port {
0837 csi_cam1: endpoint {
0838 bus-type = <3>; /* CCP2 */
0839 strobe = <1>;
0840 clock-inv = <0>;
0841 crc = <1>;
0842
0843 remote-endpoint = <&csi_isp>;
0844 };
0845 };
0846 };
0847
0848 /* D/A converter for auto-focus */
0849 ad5820: dac@c {
0850 compatible = "adi,ad5820";
0851 reg = <0x0c>;
0852
0853 VANA-supply = <&vaux4>;
0854
0855 #io-channel-cells = <0>;
0856 };
0857 };
0858
0859 &mmc1 {
0860 pinctrl-names = "default";
0861 pinctrl-0 = <&mmc1_pins>;
0862 vmmc-supply = <&vmmc1>;
0863 bus-width = <4>;
0864 };
0865
0866 /* most boards use vaux3, only some old versions use vmmc2 instead */
0867 &mmc2 {
0868 pinctrl-names = "default";
0869 pinctrl-0 = <&mmc2_pins>;
0870 vmmc-supply = <&vaux3>;
0871 vqmmc-supply = <&vsim>;
0872 bus-width = <8>;
0873 non-removable;
0874 no-sdio;
0875 no-sd;
0876 };
0877
0878 &mmc3 {
0879 status = "disabled";
0880 };
0881
0882 &gpmc {
0883 ranges = <0 0 0x01000000 0x01000000>, /* 16 MB for OneNAND */
0884 <1 0 0x02000000 0x01000000>; /* 16 MB for smc91c96 */
0885 pinctrl-names = "default";
0886 pinctrl-0 = <&gpmc_pins>;
0887
0888 /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
0889 onenand@0,0 {
0890 #address-cells = <1>;
0891 #size-cells = <1>;
0892 compatible = "ti,omap2-onenand";
0893 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
0894
0895 /*
0896 * These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported
0897 * bootloader set values when booted with v5.1
0898 * (OneNAND Manufacturer: Samsung):
0899 *
0900 * cs0 GPMC_CS_CONFIG1: 0xfb001202
0901 * cs0 GPMC_CS_CONFIG2: 0x00111100
0902 * cs0 GPMC_CS_CONFIG3: 0x00020200
0903 * cs0 GPMC_CS_CONFIG4: 0x11001102
0904 * cs0 GPMC_CS_CONFIG5: 0x03101616
0905 * cs0 GPMC_CS_CONFIG6: 0x90060000
0906 */
0907 gpmc,sync-read;
0908 gpmc,sync-write;
0909 gpmc,burst-length = <16>;
0910 gpmc,burst-read;
0911 gpmc,burst-wrap;
0912 gpmc,burst-write;
0913 gpmc,device-width = <2>;
0914 gpmc,mux-add-data = <2>;
0915 gpmc,cs-on-ns = <0>;
0916 gpmc,cs-rd-off-ns = <102>;
0917 gpmc,cs-wr-off-ns = <102>;
0918 gpmc,adv-on-ns = <0>;
0919 gpmc,adv-rd-off-ns = <12>;
0920 gpmc,adv-wr-off-ns = <12>;
0921 gpmc,oe-on-ns = <12>;
0922 gpmc,oe-off-ns = <102>;
0923 gpmc,we-on-ns = <0>;
0924 gpmc,we-off-ns = <102>;
0925 gpmc,rd-cycle-ns = <132>;
0926 gpmc,wr-cycle-ns = <132>;
0927 gpmc,access-ns = <96>;
0928 gpmc,page-burst-access-ns = <18>;
0929 gpmc,bus-turnaround-ns = <0>;
0930 gpmc,cycle2cycle-delay-ns = <0>;
0931 gpmc,wait-monitoring-ns = <0>;
0932 gpmc,clk-activation-ns = <6>;
0933 gpmc,wr-data-mux-bus-ns = <36>;
0934 gpmc,wr-access-ns = <96>;
0935 gpmc,sync-clk-ps = <15000>;
0936
0937 /*
0938 * MTD partition table corresponding to Nokia's
0939 * Maemo 5 (Fremantle) release.
0940 */
0941 partition@0 {
0942 label = "bootloader";
0943 reg = <0x00000000 0x00020000>;
0944 read-only;
0945 };
0946 partition@1 {
0947 label = "config";
0948 reg = <0x00020000 0x00060000>;
0949 };
0950 partition@2 {
0951 label = "log";
0952 reg = <0x00080000 0x00040000>;
0953 };
0954 partition@3 {
0955 label = "kernel";
0956 reg = <0x000c0000 0x00200000>;
0957 };
0958 partition@4 {
0959 label = "initfs";
0960 reg = <0x002c0000 0x00200000>;
0961 };
0962 partition@5 {
0963 label = "rootfs";
0964 reg = <0x004c0000 0x0fb40000>;
0965 };
0966 };
0967
0968 /* Ethernet is on some early development boards and qemu */
0969 ethernet@gpmc {
0970 compatible = "smsc,lan91c94";
0971 interrupt-parent = <&gpio2>;
0972 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
0973 reg = <1 0 0xf>; /* 16 byte IO range */
0974 bank-width = <2>;
0975 pinctrl-names = "default";
0976 pinctrl-0 = <ðernet_pins>;
0977 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; /* gpio86 */
0978 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio164 */
0979 gpmc,device-width = <2>;
0980 gpmc,sync-clk-ps = <0>;
0981 gpmc,cs-on-ns = <0>;
0982 gpmc,cs-rd-off-ns = <48>;
0983 gpmc,cs-wr-off-ns = <24>;
0984 gpmc,adv-on-ns = <0>;
0985 gpmc,adv-rd-off-ns = <0>;
0986 gpmc,adv-wr-off-ns = <0>;
0987 gpmc,we-on-ns = <12>;
0988 gpmc,we-off-ns = <18>;
0989 gpmc,oe-on-ns = <12>;
0990 gpmc,oe-off-ns = <48>;
0991 gpmc,page-burst-access-ns = <0>;
0992 gpmc,access-ns = <42>;
0993 gpmc,rd-cycle-ns = <180>;
0994 gpmc,wr-cycle-ns = <180>;
0995 gpmc,bus-turnaround-ns = <0>;
0996 gpmc,cycle2cycle-delay-ns = <0>;
0997 gpmc,wait-monitoring-ns = <0>;
0998 gpmc,clk-activation-ns = <0>;
0999 gpmc,wr-access-ns = <0>;
1000 gpmc,wr-data-mux-bus-ns = <12>;
1001 };
1002 };
1003
1004 &mcspi1 {
1005 /*
1006 * For some reason, touchscreen is necessary for screen to work at
1007 * all on real hw. It works well without it on emulator.
1008 *
1009 * Also... order in the device tree actually matters here.
1010 */
1011 tsc2005@0 {
1012 compatible = "ti,tsc2005";
1013 spi-max-frequency = <6000000>;
1014 reg = <0>;
1015
1016 vio-supply = <&vio>;
1017
1018 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
1019 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
1020
1021 touchscreen-fuzz-x = <4>;
1022 touchscreen-fuzz-y = <7>;
1023 touchscreen-fuzz-pressure = <2>;
1024 touchscreen-size-x = <4096>;
1025 touchscreen-size-y = <4096>;
1026 touchscreen-max-pressure = <2048>;
1027
1028 ti,x-plate-ohms = <280>;
1029 ti,esd-recovery-timeout-ms = <8000>;
1030 };
1031
1032 lcd: acx565akm@2 {
1033 compatible = "sony,acx565akm";
1034 spi-max-frequency = <6000000>;
1035 reg = <2>;
1036
1037 pinctrl-names = "default";
1038 pinctrl-0 = <&acx565akm_pins>;
1039
1040 label = "lcd";
1041 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
1042
1043 port {
1044 lcd_in: endpoint {
1045 remote-endpoint = <&sdi_out>;
1046 };
1047 };
1048 };
1049 };
1050
1051 &mcspi4 {
1052 pinctrl-names = "default";
1053 pinctrl-0 = <&mcspi4_pins>;
1054
1055 wl1251@0 {
1056 pinctrl-names = "default";
1057 pinctrl-0 = <&wl1251_pins>;
1058
1059 vio-supply = <&vio>;
1060
1061 compatible = "ti,wl1251";
1062 reg = <0>;
1063 spi-max-frequency = <48000000>;
1064
1065 spi-cpol;
1066 spi-cpha;
1067
1068 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
1069
1070 interrupt-parent = <&gpio2>;
1071 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
1072
1073 clocks = <&vctcxo>;
1074 };
1075 };
1076
1077 /* RNG not directly accessible on n900, see omap3-rom-rng instead */
1078 &rng_target {
1079 status = "disabled";
1080 };
1081
1082 &usb_otg_hs {
1083 interface-type = <0>;
1084 usb-phy = <&usb2_phy>;
1085 phys = <&usb2_phy>;
1086 phy-names = "usb2-phy";
1087 mode = <2>;
1088 power = <50>;
1089 };
1090
1091 &uart1 {
1092 status = "disabled";
1093 };
1094
1095 &uart2 {
1096 pinctrl-names = "default";
1097 pinctrl-0 = <&uart2_pins>;
1098
1099 bcm2048: bluetooth {
1100 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
1101 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
1102 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
1103 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
1104 clocks = <&vctcxo>;
1105 clock-names = "sysclk";
1106 };
1107 };
1108
1109 &uart3 {
1110 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
1111 pinctrl-names = "default";
1112 pinctrl-0 = <&uart3_pins>;
1113 };
1114
1115 &dss {
1116 status = "okay";
1117
1118 pinctrl-names = "default";
1119 pinctrl-0 = <&dss_sdi_pins>;
1120
1121 vdds_sdi-supply = <&vaux1>;
1122
1123 ports {
1124 #address-cells = <1>;
1125 #size-cells = <0>;
1126
1127 port@1 {
1128 reg = <1>;
1129
1130 sdi_out: endpoint {
1131 remote-endpoint = <&lcd_in>;
1132 datapairs = <2>;
1133 };
1134 };
1135 };
1136 };
1137
1138 &venc {
1139 status = "okay";
1140
1141 vdda-supply = <&vdac>;
1142
1143 port {
1144 venc_out: endpoint {
1145 remote-endpoint = <&tv_connector_in>;
1146 ti,channels = <1>;
1147 };
1148 };
1149 };
1150
1151 &mcbsp2 {
1152 status = "okay";
1153 };
1154
1155 &ssi_port1 {
1156 pinctrl-names = "default";
1157 pinctrl-0 = <&ssi_pins>;
1158
1159 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
1160
1161 modem: hsi-client {
1162 compatible = "nokia,n900-modem";
1163
1164 pinctrl-names = "default";
1165 pinctrl-0 = <&modem_pins>;
1166
1167 hsi-channel-ids = <0>, <1>, <2>, <3>;
1168 hsi-channel-names = "mcsaab-control",
1169 "speech-control",
1170 "speech-data",
1171 "mcsaab-data";
1172 hsi-speed-kbps = <55000>;
1173 hsi-mode = "frame";
1174 hsi-flow = "synchronized";
1175 hsi-arb-mode = "round-robin";
1176
1177 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
1178
1179 gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>, /* 70 */
1180 <&gpio3 9 GPIO_ACTIVE_HIGH>, /* 73 */
1181 <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
1182 <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
1183 <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
1184 gpio-names = "cmt_apeslpx",
1185 "cmt_rst_rq",
1186 "cmt_en",
1187 "cmt_rst",
1188 "cmt_bsi";
1189 };
1190 };
1191
1192 &ssi_port2 {
1193 status = "disabled";
1194 };
