0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
0004 */
0005
0006 #include "omap36xx.dtsi"
0007
0008 / {
0009 model = "INCOstartec LILLY-A83X module (DM3730)";
0010 compatible = "incostartec,omap3-lilly-a83x", "ti,omap3630", "ti,omap36xx", "ti,omap3";
0011
0012 chosen {
0013 bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
0014 };
0015
0016 memory@80000000 {
0017 device_type = "memory";
0018 reg = <0x80000000 0x8000000>; /* 128 MB */
0019 };
0020
0021 leds {
0022 compatible = "gpio-leds";
0023
0024 led1 {
0025 label = "lilly-a83x::led1";
0026 gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
0027 linux,default-trigger = "default-on";
0028 };
0029
0030 };
0031
0032 sound {
0033 compatible = "ti,omap-twl4030";
0034 ti,model = "lilly-a83x";
0035
0036 ti,mcbsp = <&mcbsp2>;
0037 };
0038
0039 reg_vcc3: vcc3 {
0040 compatible = "regulator-fixed";
0041 regulator-name = "VCC3";
0042 regulator-min-microvolt = <3300000>;
0043 regulator-max-microvolt = <3300000>;
0044 regulator-always-on;
0045 };
0046
0047 hsusb1_phy: hsusb1_phy {
0048 compatible = "usb-nop-xceiv";
0049 vcc-supply = <®_vcc3>;
0050 #phy-cells = <0>;
0051 };
0052 };
0053
0054 &omap3_pmx_wkup {
0055 pinctrl-names = "default";
0056
0057 lan9221_pins: pinmux_lan9221_pins {
0058 pinctrl-single,pins = <
0059 OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4) /* reserved.gpio_129 */
0060 >;
0061 };
0062
0063 tsc2048_pins: pinmux_tsc2048_pins {
0064 pinctrl-single,pins = <
0065 OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_boot6.gpio_8 */
0066 >;
0067 };
0068
0069 mmc1cd_pins: pinmux_mmc1cd_pins {
0070 pinctrl-single,pins = <
0071 OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4) /* reserved.gpio_126 */
0072 >;
0073 };
0074 };
0075
0076 &omap3_pmx_core {
0077 pinctrl-names = "default";
0078
0079 uart1_pins: pinmux_uart1_pins {
0080 pinctrl-single,pins = <
0081 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
0082 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
0083 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
0084 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
0085 >;
0086 };
0087
0088 uart2_pins: pinmux_uart2_pins {
0089 pinctrl-single,pins = <
0090 OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clkx.uart2_tx */
0091 OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */
0092 >;
0093 };
0094
0095 uart3_pins: pinmux_uart3_pins {
0096 pinctrl-single,pins = <
0097 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
0098 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
0099 >;
0100 };
0101
0102 i2c1_pins: pinmux_i2c1_pins {
0103 pinctrl-single,pins = <
0104 OMAP3_CORE1_IOPAD(0x21ba ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.i2c1_scl */
0105 OMAP3_CORE1_IOPAD(0x21bc ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.i2c1_sda */
0106 >;
0107 };
0108
0109 i2c2_pins: pinmux_i2c2_pins {
0110 pinctrl-single,pins = <
0111 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */
0112 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */
0113 >;
0114 };
0115
0116 i2c3_pins: pinmux_i2c3_pins {
0117 pinctrl-single,pins = <
0118 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
0119 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
0120 >;
0121 };
0122
0123 hsusb1_pins: pinmux_hsusb1_pins {
0124 pinctrl-single,pins = <
0125
0126 /* GPIO 182 controls USB-Hub reset. But USB-Phy its
0127 * reset can't be controlled. So we clamp this GPIO to
0128 * high (PIN_OFF_OUTPUT_HIGH) to always enable USB-Hub.
0129 */
0130
0131 OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT_PULLUP | PIN_OFF_OUTPUT_HIGH | MUX_MODE4) /* mcspi2_cs1.gpio_182 */
0132 >;
0133 };
0134
0135 hsusb_otg_pins: pinmux_hsusb_otg_pins {
0136 pinctrl-single,pins = <
0137 OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
0138 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
0139 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
0140 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
0141 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
0142 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
0143 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
0144 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
0145 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
0146 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
0147 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
0148 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
0149 >;
0150 };
0151
0152 mmc1_pins: pinmux_mmc1_pins {
0153 pinctrl-single,pins = <
0154 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
0155 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
0156 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
0157 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
0158 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
0159 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
0160 >;
0161 };
0162
0163 spi2_pins: pinmux_spi2_pins {
0164 pinctrl-single,pins = <
0165 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_clk.mcspi2_clk */
0166 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_simo.mcspi2_simo */
0167 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_somi.mcspi2_somi */
0168 OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0.mcspi2_cs0 */
0169 >;
0170 };
0171 };
0172
0173 &omap3_pmx_core2 {
0174 pinctrl-names = "default";
0175
0176 hsusb1_2_pins: pinmux_hsusb1_2_pins {
0177 pinctrl-single,pins = <
0178 OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
0179 OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
0180 OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3) /* etk_d0.hsusb1_data0 */
0181 OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3) /* etk_d1.hsusb1_data1 */
0182 OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3) /* etk_d2.hsusb1_data2 */
0183 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */
0184 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3) /* etk_d4.hsusb1_data4 */
0185 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3) /* etk_d5.hsusb1_data5 */
0186 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3) /* etk_d6.hsusb1_data6 */
0187 OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3) /* etk_d7.hsusb1_data3 */
0188 OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3) /* etk_d8.hsusb1_dir */
0189 OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3) /* etk_d9.hsusb1_nxt */
0190 >;
0191 };
0192
0193 gpio1_pins: pinmux_gpio1_pins {
0194 pinctrl-single,pins = <
0195 OMAP3630_CORE2_IOPAD(0x25fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d15.gpio_29 */
0196 >;
0197 };
0198
0199 };
0200
0201 &gpio1 {
0202 pinctrl-names = "default";
0203 pinctrl-0 = <&gpio1_pins>;
0204 };
0205
0206 &gpio6 {
0207 pinctrl-names = "default";
0208 pinctrl-0 = <&hsusb1_pins>;
0209 };
0210
0211 &i2c1 {
0212 clock-frequency = <2600000>;
0213 pinctrl-names = "default";
0214 pinctrl-0 = <&i2c1_pins>;
0215
0216 twl: twl@48 {
0217 reg = <0x48>;
0218 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
0219 interrupt-parent = <&intc>;
0220
0221 twl_audio: audio {
0222 compatible = "ti,twl4030-audio";
0223 codec {
0224 };
0225 };
0226 };
0227 };
0228
0229 #include "twl4030.dtsi"
0230 #include "twl4030_omap3.dtsi"
0231
0232 &twl {
0233 vmmc1: regulator-vmmc1 {
0234 regulator-always-on;
0235 };
0236
0237 vdd1: regulator-vdd1 {
0238 regulator-always-on;
0239 };
0240
0241 vdd2: regulator-vdd2 {
0242 regulator-always-on;
0243 };
0244 };
0245
0246 &i2c2 {
0247 clock-frequency = <2600000>;
0248 pinctrl-names = "default";
0249 pinctrl-0 = <&i2c2_pins>;
0250 };
0251
0252 &i2c3 {
0253 clock-frequency = <2600000>;
0254 pinctrl-names = "default";
0255 pinctrl-0 = <&i2c3_pins>;
0256 gpiom1: gpio@20 {
0257 compatible = "microchip,mcp23017";
0258 gpio-controller;
0259 #gpio-cells = <2>;
0260 reg = <0x20>;
0261 };
0262 };
0263
0264 &uart1 {
0265 pinctrl-names = "default";
0266 pinctrl-0 = <&uart1_pins>;
0267 };
0268
0269 &uart2 {
0270 pinctrl-names = "default";
0271 pinctrl-0 = <&uart2_pins>;
0272 };
0273
0274 &uart3 {
0275 pinctrl-names = "default";
0276 pinctrl-0 = <&uart3_pins>;
0277 };
0278
0279 &uart4 {
0280 status = "disabled";
0281 };
0282
0283 &mmc1 {
0284 cd-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>;
0285 cd-inverted;
0286 vmmc-supply = <&vmmc1>;
0287 bus-width = <4>;
0288 pinctrl-names = "default";
0289 pinctrl-0 = <&mmc1_pins &mmc1cd_pins>;
0290 cap-sdio-irq;
0291 cap-sd-highspeed;
0292 cap-mmc-highspeed;
0293 };
0294
0295 &mmc2 {
0296 status = "disabled";
0297 };
0298
0299 &mmc3 {
0300 status = "disabled";
0301 };
0302
0303 &mcspi2 {
0304 status = "okay";
0305 pinctrl-names = "default";
0306 pinctrl-0 = <&spi2_pins>;
0307
0308 tsc2046@0 {
0309 reg = <0>; /* CS0 */
0310 compatible = "ti,tsc2046";
0311 interrupt-parent = <&gpio1>;
0312 interrupts = <8 0>; /* boot6 / gpio_8 */
0313 spi-max-frequency = <1000000>;
0314 pendown-gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
0315 vcc-supply = <®_vcc3>;
0316 pinctrl-names = "default";
0317 pinctrl-0 = <&tsc2048_pins>;
0318
0319 ti,x-min = /bits/ 16 <300>;
0320 ti,x-max = /bits/ 16 <3000>;
0321 ti,y-min = /bits/ 16 <600>;
0322 ti,y-max = /bits/ 16 <3600>;
0323 ti,x-plate-ohms = /bits/ 16 <80>;
0324 ti,pressure-max = /bits/ 16 <255>;
0325 ti,swap-xy;
0326
0327 wakeup-source;
0328 };
0329 };
0330
0331 &usbhsehci {
0332 phys = <&hsusb1_phy>;
0333 };
0334
0335 &usbhshost {
0336 pinctrl-names = "default";
0337 pinctrl-0 = <&hsusb1_2_pins>;
0338 num-ports = <2>;
0339 port1-mode = "ehci-phy";
0340 };
0341
0342 &usb_otg_hs {
0343 pinctrl-names = "default";
0344 pinctrl-0 = <&hsusb_otg_pins>;
0345 interface-type = <0>;
0346 usb-phy = <&usb2_phy>;
0347 phys = <&usb2_phy>;
0348 phy-names = "usb2-phy";
0349 mode = <3>;
0350 power = <50>;
0351 };
0352
0353 &mcbsp2 {
0354 status = "okay";
0355 };
0356
0357 &gpmc {
0358 ranges = <0 0 0x30000000 0x1000000>,
0359 <7 0 0x15000000 0x01000000>;
0360
0361 nand@0,0 {
0362 compatible = "ti,omap2-nand";
0363 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
0364 interrupt-parent = <&gpmc>;
0365 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
0366 <1 IRQ_TYPE_NONE>; /* termcount */
0367 nand-bus-width = <16>;
0368 ti,nand-ecc-opt = "bch8";
0369 /* no elm on omap3 */
0370
0371 gpmc,mux-add-data = <0>;
0372 gpmc,device-width = <2>;
0373 gpmc,wait-pin = <0>;
0374 gpmc,wait-monitoring-ns = <0>;
0375 gpmc,burst-length = <4>;
0376 gpmc,cs-on-ns = <0>;
0377 gpmc,cs-rd-off-ns = <100>;
0378 gpmc,cs-wr-off-ns = <100>;
0379 gpmc,adv-on-ns = <0>;
0380 gpmc,adv-rd-off-ns = <100>;
0381 gpmc,adv-wr-off-ns = <100>;
0382 gpmc,oe-on-ns = <5>;
0383 gpmc,oe-off-ns = <75>;
0384 gpmc,we-on-ns = <5>;
0385 gpmc,we-off-ns = <75>;
0386 gpmc,rd-cycle-ns = <100>;
0387 gpmc,wr-cycle-ns = <100>;
0388 gpmc,access-ns = <60>;
0389 gpmc,page-burst-access-ns = <5>;
0390 gpmc,bus-turnaround-ns = <0>;
0391 gpmc,cycle2cycle-samecsen;
0392 gpmc,cycle2cycle-delay-ns = <50>;
0393 gpmc,wr-data-mux-bus-ns = <75>;
0394 gpmc,wr-access-ns = <155>;
0395
0396 #address-cells = <1>;
0397 #size-cells = <1>;
0398
0399 partition@0 {
0400 label = "MLO";
0401 reg = <0 0x80000>;
0402 };
0403
0404 partition@80000 {
0405 label = "u-boot";
0406 reg = <0x80000 0x1e0000>;
0407 };
0408
0409 partition@260000 {
0410 label = "u-boot-environment";
0411 reg = <0x260000 0x20000>;
0412 };
0413
0414 partition@280000 {
0415 label = "kernel";
0416 reg = <0x280000 0x500000>;
0417 };
0418
0419 partition@780000 {
0420 label = "filesystem";
0421 reg = <0x780000 0xf880000>;
0422 };
0423 };
0424
0425 ethernet@7,0 {
0426 compatible = "smsc,lan9221", "smsc,lan9115";
0427 bank-width = <2>;
0428 gpmc,mux-add-data = <2>;
0429 gpmc,cs-on-ns = <10>;
0430 gpmc,cs-rd-off-ns = <60>;
0431 gpmc,cs-wr-off-ns = <60>;
0432 gpmc,adv-on-ns = <0>;
0433 gpmc,adv-rd-off-ns = <10>;
0434 gpmc,adv-wr-off-ns = <10>;
0435 gpmc,oe-on-ns = <10>;
0436 gpmc,oe-off-ns = <60>;
0437 gpmc,we-on-ns = <10>;
0438 gpmc,we-off-ns = <60>;
0439 gpmc,rd-cycle-ns = <100>;
0440 gpmc,wr-cycle-ns = <100>;
0441 gpmc,access-ns = <50>;
0442 gpmc,page-burst-access-ns = <5>;
0443 gpmc,bus-turnaround-ns = <0>;
0444 gpmc,cycle2cycle-delay-ns = <75>;
0445 gpmc,wr-data-mux-bus-ns = <15>;
0446 gpmc,wr-access-ns = <75>;
0447 gpmc,cycle2cycle-samecsen;
0448 gpmc,cycle2cycle-diffcsen;
0449 vddvario-supply = <®_vcc3>;
0450 vdd33a-supply = <®_vcc3>;
0451 reg-io-width = <4>;
0452 interrupt-parent = <&gpio5>;
0453 interrupts = <1 0x2>;
0454 reg = <7 0 0xff>;
0455 pinctrl-names = "default";
0456 pinctrl-0 = <&lan9221_pins>;
0457 phy-mode = "mii";
0458 };
0459 };
