0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Common Device Tree Source for IGEPv2
0004 *
0005 * Copyright (C) 2014 Javier Martinez Canillas <javier@dowhile0.org>
0006 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
0007 */
0008
0009 #include "omap3-igep.dtsi"
0010 #include "omap-gpmc-smsc9221.dtsi"
0011
0012 / {
0013
0014 leds {
0015 pinctrl-names = "default";
0016 pinctrl-0 = <&leds_pins>;
0017 compatible = "gpio-leds";
0018
0019 boot {
0020 label = "omap3:green:boot";
0021 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
0022 default-state = "on";
0023 };
0024
0025 user0 {
0026 label = "omap3:red:user0";
0027 gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
0028 default-state = "off";
0029 };
0030
0031 user1 {
0032 label = "omap3:red:user1";
0033 gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
0034 default-state = "off";
0035 };
0036
0037 user2 {
0038 label = "omap3:green:user1";
0039 gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>;
0040 };
0041 };
0042
0043 /* HS USB Port 1 Power */
0044 hsusb1_power: hsusb1_power_reg {
0045 compatible = "regulator-fixed";
0046 regulator-name = "hsusb1_vbus";
0047 regulator-min-microvolt = <3300000>;
0048 regulator-max-microvolt = <3300000>;
0049 gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */
0050 startup-delay-us = <70000>;
0051 };
0052
0053 /* HS USB Host PHY on PORT 1 */
0054 hsusb1_phy: hsusb1_phy {
0055 compatible = "usb-nop-xceiv";
0056 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
0057 vcc-supply = <&hsusb1_power>;
0058 #phy-cells = <0>;
0059 };
0060
0061 tfp410: encoder {
0062 compatible = "ti,tfp410";
0063 powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
0064
0065 ports {
0066 #address-cells = <1>;
0067 #size-cells = <0>;
0068
0069 port@0 {
0070 reg = <0>;
0071
0072 tfp410_in: endpoint {
0073 remote-endpoint = <&dpi_out>;
0074 };
0075 };
0076
0077 port@1 {
0078 reg = <1>;
0079
0080 tfp410_out: endpoint {
0081 remote-endpoint = <&dvi_connector_in>;
0082 };
0083 };
0084 };
0085 };
0086
0087 dvi0: connector {
0088 compatible = "dvi-connector";
0089 label = "dvi";
0090
0091 digital;
0092
0093 ddc-i2c-bus = <&i2c3>;
0094
0095 port {
0096 dvi_connector_in: endpoint {
0097 remote-endpoint = <&tfp410_out>;
0098 };
0099 };
0100 };
0101 };
0102
0103 &omap3_pmx_core {
0104 pinctrl-names = "default";
0105 pinctrl-0 = <
0106 &tfp410_pins
0107 &dss_dpi_pins
0108 >;
0109
0110 tfp410_pins: pinmux_tfp410_pins {
0111 pinctrl-single,pins = <
0112 OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
0113 >;
0114 };
0115
0116 dss_dpi_pins: pinmux_dss_dpi_pins {
0117 pinctrl-single,pins = <
0118 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
0119 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
0120 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
0121 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
0122 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
0123 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
0124 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
0125 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
0126 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
0127 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
0128 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
0129 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
0130 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
0131 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
0132 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
0133 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
0134 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
0135 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
0136 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
0137 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
0138 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
0139 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
0140 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
0141 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
0142 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
0143 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
0144 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
0145 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
0146 >;
0147 };
0148
0149 uart2_pins: pinmux_uart2_pins {
0150 pinctrl-single,pins = <
0151 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
0152 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
0153 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
0154 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
0155 >;
0156 };
0157
0158 smsc9221_pins: pinmux_smsc9221_pins {
0159 pinctrl-single,pins = <
0160 OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
0161 >;
0162 };
0163 };
0164
0165 &omap3_pmx_core2 {
0166 pinctrl-names = "default";
0167 pinctrl-0 = <
0168 &hsusbb1_pins
0169 >;
0170
0171 hsusbb1_pins: pinmux_hsusbb1_pins {
0172 pinctrl-single,pins = <
0173 OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
0174 OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
0175 OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */
0176 OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */
0177 OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */
0178 OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */
0179 OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */
0180 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */
0181 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */
0182 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */
0183 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */
0184 OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */
0185 >;
0186 };
0187
0188 leds_pins: pinmux_leds_pins {
0189 pinctrl-single,pins = <
0190 OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
0191 OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
0192 OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
0193 >;
0194 };
0195
0196 mmc1_wp_pins: pinmux_mmc1_cd_pins {
0197 pinctrl-single,pins = <
0198 OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT | MUX_MODE4) /* etk_d15.gpio_29 */
0199 >;
0200 };
0201 };
0202
0203 &i2c3 {
0204 clock-frequency = <100000>;
0205
0206 /*
0207 * Display monitor features are burnt in the EEPROM
0208 * as EDID data.
0209 */
0210 eeprom@50 {
0211 compatible = "ti,eeprom";
0212 reg = <0x50>;
0213 };
0214 };
0215
0216 &gpmc {
0217 ranges = <0 0 0x30000000 0x01000000>, /* CS0: 16MB for NAND */
0218 <5 0 0x2c000000 0x01000000>; /* CS5: 16MB for ethernet */
0219
0220 ethernet@gpmc {
0221 pinctrl-names = "default";
0222 pinctrl-0 = <&smsc9221_pins>;
0223 reg = <5 0 0xff>;
0224 interrupt-parent = <&gpio6>;
0225 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
0226 };
0227 };
0228
0229 &uart2 {
0230 pinctrl-names = "default";
0231 pinctrl-0 = <&uart2_pins>;
0232 };
0233
0234 &usbhshost {
0235 port1-mode = "ehci-phy";
0236 };
0237
0238 &usbhsehci {
0239 phys = <&hsusb1_phy>;
0240 };
0241
0242 &vpll2 {
0243 /* Needed for DSS */
0244 regulator-name = "vdds_dsi";
0245 };
0246
0247 &dss {
0248 status = "okay";
0249
0250 port {
0251 dpi_out: endpoint {
0252 remote-endpoint = <&tfp410_in>;
0253 data-lines = <24>;
0254 };
0255 };
0256 };
0257
0258 &mmc1 {
0259 pinctrl-0 = <&mmc1_pins &mmc1_wp_pins>;
0260 wp-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; /* gpio_29 */
0261 };
