0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Common device tree for IGEP boards based on AM/DM37x
0004 *
0005 * Copyright (C) 2012 Javier Martinez Canillas <javier@dowhile0.org>
0006 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
0007 */
0008 /dts-v1/;
0009
0010 #include "omap36xx.dtsi"
0011
0012 / {
0013 memory@80000000 {
0014 device_type = "memory";
0015 reg = <0x80000000 0x20000000>; /* 512 MB */
0016 };
0017
0018 chosen {
0019 stdout-path = &uart3;
0020 };
0021
0022 sound {
0023 compatible = "ti,omap-twl4030";
0024 ti,model = "igep2";
0025 ti,mcbsp = <&mcbsp2>;
0026 };
0027
0028 vdd33: regulator-vdd33 {
0029 compatible = "regulator-fixed";
0030 regulator-name = "vdd33";
0031 regulator-always-on;
0032 };
0033
0034 };
0035
0036 &omap3_pmx_core {
0037 gpmc_pins: pinmux_gpmc_pins {
0038 pinctrl-single,pins = <
0039 /* OneNAND seems to require PIN_INPUT on clock. */
0040 OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
0041 >;
0042 };
0043
0044 uart1_pins: pinmux_uart1_pins {
0045 pinctrl-single,pins = <
0046 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
0047 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
0048 >;
0049 };
0050
0051 uart3_pins: pinmux_uart3_pins {
0052 pinctrl-single,pins = <
0053 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */
0054 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */
0055 >;
0056 };
0057
0058 mcbsp2_pins: pinmux_mcbsp2_pins {
0059 pinctrl-single,pins = <
0060 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
0061 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
0062 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
0063 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
0064 >;
0065 };
0066
0067 mmc1_pins: pinmux_mmc1_pins {
0068 pinctrl-single,pins = <
0069 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
0070 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
0071 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
0072 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
0073 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
0074 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
0075 >;
0076 };
0077
0078 mmc2_pins: pinmux_mmc2_pins {
0079 pinctrl-single,pins = <
0080 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
0081 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
0082 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
0083 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
0084 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
0085 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
0086 >;
0087 };
0088
0089 i2c1_pins: pinmux_i2c1_pins {
0090 pinctrl-single,pins = <
0091 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
0092 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
0093 >;
0094 };
0095
0096 i2c3_pins: pinmux_i2c3_pins {
0097 pinctrl-single,pins = <
0098 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
0099 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
0100 >;
0101 };
0102 };
0103
0104 &gpmc {
0105 pinctrl-names = "default";
0106 pinctrl-0 = <&gpmc_pins>;
0107
0108 nand@0,0 {
0109 compatible = "ti,omap2-nand";
0110 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
0111 interrupt-parent = <&gpmc>;
0112 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
0113 <1 IRQ_TYPE_NONE>; /* termcount */
0114 linux,mtd-name = "micron,mt29c4g96maz";
0115 nand-bus-width = <16>;
0116 gpmc,device-width = <2>;
0117 ti,nand-ecc-opt = "bch8";
0118
0119 gpmc,sync-clk-ps = <0>;
0120 gpmc,cs-on-ns = <0>;
0121 gpmc,cs-rd-off-ns = <44>;
0122 gpmc,cs-wr-off-ns = <44>;
0123 gpmc,adv-on-ns = <6>;
0124 gpmc,adv-rd-off-ns = <34>;
0125 gpmc,adv-wr-off-ns = <44>;
0126 gpmc,we-off-ns = <40>;
0127 gpmc,oe-off-ns = <54>;
0128 gpmc,access-ns = <64>;
0129 gpmc,rd-cycle-ns = <82>;
0130 gpmc,wr-cycle-ns = <82>;
0131 gpmc,wr-access-ns = <40>;
0132 gpmc,wr-data-mux-bus-ns = <0>;
0133
0134 #address-cells = <1>;
0135 #size-cells = <1>;
0136
0137 status = "okay";
0138 };
0139
0140 onenand@0,0 {
0141 compatible = "ti,omap2-onenand";
0142 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
0143
0144 gpmc,sync-read;
0145 gpmc,sync-write;
0146 gpmc,burst-length = <16>;
0147 gpmc,burst-wrap;
0148 gpmc,burst-read;
0149 gpmc,burst-write;
0150 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
0151 gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
0152 gpmc,cs-on-ns = <0>;
0153 gpmc,cs-rd-off-ns = <96>;
0154 gpmc,cs-wr-off-ns = <96>;
0155 gpmc,adv-on-ns = <0>;
0156 gpmc,adv-rd-off-ns = <12>;
0157 gpmc,adv-wr-off-ns = <12>;
0158 gpmc,oe-on-ns = <18>;
0159 gpmc,oe-off-ns = <96>;
0160 gpmc,we-on-ns = <0>;
0161 gpmc,we-off-ns = <96>;
0162 gpmc,rd-cycle-ns = <114>;
0163 gpmc,wr-cycle-ns = <114>;
0164 gpmc,access-ns = <90>;
0165 gpmc,page-burst-access-ns = <12>;
0166 gpmc,bus-turnaround-ns = <0>;
0167 gpmc,cycle2cycle-delay-ns = <0>;
0168 gpmc,wait-monitoring-ns = <0>;
0169 gpmc,clk-activation-ns = <6>;
0170 gpmc,wr-data-mux-bus-ns = <30>;
0171 gpmc,wr-access-ns = <90>;
0172 gpmc,sync-clk-ps = <12000>;
0173
0174 #address-cells = <1>;
0175 #size-cells = <1>;
0176
0177 status = "disabled";
0178 };
0179 };
0180
0181 &i2c1 {
0182 pinctrl-names = "default";
0183 pinctrl-0 = <&i2c1_pins>;
0184 clock-frequency = <2600000>;
0185
0186 twl: twl@48 {
0187 reg = <0x48>;
0188 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
0189 interrupt-parent = <&intc>;
0190
0191 twl_audio: audio {
0192 compatible = "ti,twl4030-audio";
0193 codec {
0194 };
0195 };
0196 };
0197 };
0198
0199 #include "twl4030.dtsi"
0200 #include "twl4030_omap3.dtsi"
0201
0202 &i2c3 {
0203 pinctrl-names = "default";
0204 pinctrl-0 = <&i2c3_pins>;
0205 };
0206
0207 &mcbsp2 {
0208 pinctrl-names = "default";
0209 pinctrl-0 = <&mcbsp2_pins>;
0210 status = "okay";
0211 };
0212
0213 &mmc1 {
0214 pinctrl-names = "default";
0215 pinctrl-0 = <&mmc1_pins>;
0216 vmmc-supply = <&vmmc1>;
0217 vmmc_aux-supply = <&vsim>;
0218 bus-width = <4>;
0219 cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
0220 };
0221
0222 &mmc3 {
0223 status = "disabled";
0224 };
0225
0226 &uart1 {
0227 pinctrl-names = "default";
0228 pinctrl-0 = <&uart1_pins>;
0229 };
0230
0231 &uart3 {
0232 pinctrl-names = "default";
0233 pinctrl-0 = <&uart3_pins>;
0234 };
0235
0236 &twl_gpio {
0237 ti,use-leds;
0238 };
0239
0240 &usb_otg_hs {
0241 interface-type = <0>;
0242 usb-phy = <&usb2_phy>;
0243 phys = <&usb2_phy>;
0244 phy-names = "usb2-phy";
0245 mode = <3>;
0246 power = <50>;
0247 };
