0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
0004 */
0005 /dts-v1/;
0006
0007 #include "omap34xx.dtsi"
0008 #include "omap3-evm-common.dtsi"
0009 #include "omap3-evm-processor-common.dtsi"
0010
0011 / {
0012 model = "TI OMAP35XX EVM (TMDSEVM3530)";
0013 compatible = "ti,omap3-evm", "ti,omap3430", "ti,omap3";
0014 };
0015
0016 &omap3_pmx_core2 {
0017 pinctrl-names = "default";
0018 pinctrl-0 = <&hsusb2_2_pins>;
0019
0020 ehci_phy_pins: pinmux_ehci_phy_pins {
0021 pinctrl-single,pins = <
0022
0023 /* EHCI PHY reset GPIO etk_d7.gpio_21 */
0024 OMAP3430_CORE2_IOPAD(0x25ea, PIN_OUTPUT | MUX_MODE4)
0025
0026 /* EHCI VBUS etk_d8.gpio_22 */
0027 OMAP3430_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)
0028 >;
0029 };
0030
0031 /* Used by OHCI and EHCI. OHCI won't work without external phy */
0032 hsusb2_2_pins: pinmux_hsusb2_2_pins {
0033 pinctrl-single,pins = <
0034
0035 /* etk_d10.hsusb2_clk */
0036 OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
0037
0038 /* etk_d11.hsusb2_stp */
0039 OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
0040
0041 /* etk_d12.hsusb2_dir */
0042 OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)
0043
0044 /* etk_d13.hsusb2_nxt */
0045 OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)
0046
0047 /* etk_d14.hsusb2_data0 */
0048 OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)
0049
0050 /* etk_d15.hsusb2_data1 */
0051 OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)
0052 >;
0053 };
0054 };
0055
0056 &gpmc {
0057 nand@0,0 {
0058 compatible = "ti,omap2-nand";
0059 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
0060 interrupt-parent = <&gpmc>;
0061 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
0062 <1 IRQ_TYPE_NONE>; /* termcount */
0063 linux,mtd-name = "micron,mt29f2g16abdhc";
0064 nand-bus-width = <16>;
0065 gpmc,device-width = <2>;
0066 ti,nand-ecc-opt = "bch8";
0067
0068 gpmc,sync-clk-ps = <0>;
0069 gpmc,cs-on-ns = <0>;
0070 gpmc,cs-rd-off-ns = <44>;
0071 gpmc,cs-wr-off-ns = <44>;
0072 gpmc,adv-on-ns = <6>;
0073 gpmc,adv-rd-off-ns = <34>;
0074 gpmc,adv-wr-off-ns = <44>;
0075 gpmc,we-off-ns = <40>;
0076 gpmc,oe-off-ns = <54>;
0077 gpmc,access-ns = <64>;
0078 gpmc,rd-cycle-ns = <82>;
0079 gpmc,wr-cycle-ns = <82>;
0080 gpmc,wr-access-ns = <40>;
0081 gpmc,wr-data-mux-bus-ns = <0>;
0082
0083 #address-cells = <1>;
0084 #size-cells = <1>;
0085 };
0086 };
