0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Author: Anil Kumar <anilk4.v@gmail.com>
0004 */
0005
0006 #include <dt-bindings/input/input.h>
0007
0008 #include "omap34xx.dtsi"
0009 / {
0010 memory@80000000 {
0011 device_type = "memory";
0012 reg = <0x80000000 0x10000000>; /* 256 MB */
0013 };
0014
0015 leds {
0016 compatible = "gpio-leds";
0017
0018 heartbeat {
0019 label = "devkit8000::led1";
0020 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* 186 -> LED1 */
0021 default-state = "on";
0022 linux,default-trigger = "heartbeat";
0023 };
0024
0025 mmc {
0026 label = "devkit8000::led2";
0027 gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 -> LED2 */
0028 default-state = "on";
0029 linux,default-trigger = "none";
0030 };
0031
0032 usr {
0033 label = "devkit8000::led3";
0034 gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* 164 -> LED3 */
0035 default-state = "on";
0036 linux,default-trigger = "usr";
0037 };
0038
0039 pmu_stat {
0040 label = "devkit8000::pmu_stat";
0041 gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
0042 };
0043 };
0044
0045 sound {
0046 compatible = "ti,omap-twl4030";
0047 ti,model = "devkit8000";
0048
0049 ti,mcbsp = <&mcbsp2>;
0050 ti,audio-routing =
0051 "Ext Spk", "PREDRIVEL",
0052 "Ext Spk", "PREDRIVER",
0053 "MAINMIC", "Main Mic",
0054 "Main Mic", "Mic Bias 1";
0055 };
0056
0057 gpio_keys {
0058 compatible = "gpio-keys";
0059
0060 user {
0061 label = "user";
0062 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
0063 linux,code = <BTN_EXTRA>;
0064 wakeup-source;
0065 };
0066 };
0067
0068 tfp410: encoder0 {
0069 compatible = "ti,tfp410";
0070 powerdown-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
0071
0072 ports {
0073 #address-cells = <1>;
0074 #size-cells = <0>;
0075
0076 port@0 {
0077 reg = <0>;
0078
0079 tfp410_in: endpoint {
0080 remote-endpoint = <&dpi_dvi_out>;
0081 };
0082 };
0083
0084 port@1 {
0085 reg = <1>;
0086
0087 tfp410_out: endpoint {
0088 remote-endpoint = <&dvi_connector_in>;
0089 };
0090 };
0091 };
0092 };
0093
0094 dvi0: connector0 {
0095 compatible = "dvi-connector";
0096 label = "dvi";
0097
0098 digital;
0099
0100 ddc-i2c-bus = <&i2c2>;
0101
0102 port {
0103 dvi_connector_in: endpoint {
0104 remote-endpoint = <&tfp410_out>;
0105 };
0106 };
0107 };
0108
0109 tv0: connector1 {
0110 compatible = "svideo-connector";
0111 label = "tv";
0112
0113 port {
0114 tv_connector_in: endpoint {
0115 remote-endpoint = <&venc_out>;
0116 };
0117 };
0118 };
0119 };
0120
0121 &i2c1 {
0122 clock-frequency = <2600000>;
0123
0124 twl: twl@48 {
0125 reg = <0x48>;
0126 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
0127
0128 twl_audio: audio {
0129 compatible = "ti,twl4030-audio";
0130 codec {
0131 };
0132 };
0133 };
0134 };
0135
0136 &i2c2 {
0137 clock-frequency = <400000>;
0138 };
0139
0140 &i2c3 {
0141 status = "disabled";
0142 };
0143
0144 #include "twl4030.dtsi"
0145 #include "twl4030_omap3.dtsi"
0146
0147 &mmc1 {
0148 vmmc-supply = <&vmmc1>;
0149 vqmmc-supply = <&vsim>;
0150 bus-width = <8>;
0151 };
0152
0153 &mmc2 {
0154 status = "disabled";
0155 };
0156
0157 &mmc3 {
0158 status = "disabled";
0159 };
0160
0161 /* Unusable as clockevent because if unreliable oscillator, allow to idle */
0162 &timer1_target {
0163 /delete-property/ti,no-reset-on-init;
0164 /delete-property/ti,no-idle;
0165 timer@0 {
0166 /delete-property/ti,timer-alwon;
0167 };
0168 };
0169
0170 /* Preferred timer for clockevent */
0171 &timer12_target {
0172 ti,no-reset-on-init;
0173 ti,no-idle;
0174 timer@0 {
0175 /* Always clocked by secure_32k_fck */
0176 };
0177 };
0178
0179 &twl_gpio {
0180 ti,use-leds;
0181 /*
0182 * pulldowns:
0183 * BIT(1), BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
0184 * BIT(15), BIT(16), BIT(17)
0185 */
0186 ti,pulldowns = <0x03a1c6>;
0187 };
0188
0189 &twl_keypad {
0190 linux,keymap = <MATRIX_KEY(0, 0, KEY_1)
0191 MATRIX_KEY(1, 0, KEY_2)
0192 MATRIX_KEY(2, 0, KEY_3)
0193 MATRIX_KEY(0, 1, KEY_4)
0194 MATRIX_KEY(1, 1, KEY_5)
0195 MATRIX_KEY(2, 1, KEY_6)
0196 MATRIX_KEY(3, 1, KEY_F5)
0197 MATRIX_KEY(0, 2, KEY_7)
0198 MATRIX_KEY(1, 2, KEY_8)
0199 MATRIX_KEY(2, 2, KEY_9)
0200 MATRIX_KEY(3, 2, KEY_F6)
0201 MATRIX_KEY(0, 3, KEY_F7)
0202 MATRIX_KEY(1, 3, KEY_0)
0203 MATRIX_KEY(2, 3, KEY_F8)
0204 MATRIX_KEY(4, 5, KEY_RESERVED)
0205 MATRIX_KEY(4, 4, KEY_VOLUMEUP)
0206 MATRIX_KEY(5, 5, KEY_VOLUMEDOWN)
0207 >;
0208 };
0209
0210 &wdt2 {
0211 status = "disabled";
0212 };
0213
0214 &mcbsp2 {
0215 status = "okay";
0216 };
0217
0218 &gpmc {
0219 ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
0220 6 0 0x2c000000 0x1000000>; /* CS6: 16MB for DM9000 */
0221
0222 nand@0,0 {
0223 compatible = "ti,omap2-nand";
0224 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
0225 interrupt-parent = <&gpmc>;
0226 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
0227 <1 IRQ_TYPE_NONE>; /* termcount */
0228 nand-bus-width = <16>;
0229 gpmc,device-width = <2>;
0230 ti,nand-ecc-opt = "sw";
0231
0232 gpmc,sync-clk-ps = <0>;
0233 gpmc,cs-on-ns = <0>;
0234 gpmc,cs-rd-off-ns = <44>;
0235 gpmc,cs-wr-off-ns = <44>;
0236 gpmc,adv-on-ns = <6>;
0237 gpmc,adv-rd-off-ns = <34>;
0238 gpmc,adv-wr-off-ns = <44>;
0239 gpmc,we-off-ns = <40>;
0240 gpmc,oe-off-ns = <54>;
0241 gpmc,access-ns = <64>;
0242 gpmc,rd-cycle-ns = <82>;
0243 gpmc,wr-cycle-ns = <82>;
0244 gpmc,wr-access-ns = <40>;
0245 gpmc,wr-data-mux-bus-ns = <0>;
0246
0247 #address-cells = <1>;
0248 #size-cells = <1>;
0249
0250 x-loader@0 {
0251 label = "X-Loader";
0252 reg = <0 0x80000>;
0253 };
0254
0255 bootloaders@80000 {
0256 label = "U-Boot";
0257 reg = <0x80000 0x1e0000>;
0258 };
0259
0260 bootloaders_env@260000 {
0261 label = "U-Boot Env";
0262 reg = <0x260000 0x20000>;
0263 };
0264
0265 kernel@280000 {
0266 label = "Kernel";
0267 reg = <0x280000 0x400000>;
0268 };
0269
0270 filesystem@680000 {
0271 label = "File System";
0272 reg = <0x680000 0xf980000>;
0273 };
0274 };
0275
0276 ethernet@6,0 {
0277 compatible = "davicom,dm9000";
0278 reg = <6 0x000 2
0279 6 0x400 2>; /* CS6, offset 0 and 0x400, IO size 2 */
0280 bank-width = <2>;
0281 interrupt-parent = <&gpio1>;
0282 interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
0283 davicom,no-eeprom;
0284
0285 gpmc,mux-add-data = <0>;
0286 gpmc,device-width = <1>;
0287 gpmc,wait-pin = <0>;
0288 gpmc,cycle2cycle-samecsen;
0289 gpmc,cycle2cycle-diffcsen;
0290
0291 gpmc,cs-on-ns = <6>;
0292 gpmc,cs-rd-off-ns = <180>;
0293 gpmc,cs-wr-off-ns = <180>;
0294 gpmc,adv-on-ns = <0>;
0295 gpmc,adv-rd-off-ns = <18>;
0296 gpmc,adv-wr-off-ns = <48>;
0297 gpmc,oe-on-ns = <54>;
0298 gpmc,oe-off-ns = <168>;
0299 gpmc,we-on-ns = <54>;
0300 gpmc,we-off-ns = <168>;
0301 gpmc,rd-cycle-ns = <186>;
0302 gpmc,wr-cycle-ns = <186>;
0303 gpmc,access-ns = <144>;
0304 gpmc,page-burst-access-ns = <24>;
0305 gpmc,bus-turnaround-ns = <90>;
0306 gpmc,cycle2cycle-delay-ns = <90>;
0307 gpmc,wait-monitoring-ns = <0>;
0308 gpmc,clk-activation-ns = <0>;
0309 gpmc,wr-data-mux-bus-ns = <0>;
0310 gpmc,wr-access-ns = <0>;
0311 };
0312 };
0313
0314 &omap3_pmx_core {
0315 dss_dpi_pins: pinmux_dss_dpi_pins {
0316 pinctrl-single,pins = <
0317 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
0318 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
0319 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
0320 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
0321 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
0322 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
0323 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
0324 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
0325 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
0326 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
0327 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
0328 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
0329 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
0330 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
0331 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
0332 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
0333 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
0334 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
0335 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
0336 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
0337 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
0338 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
0339 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
0340 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
0341 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
0342 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
0343 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
0344 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
0345 >;
0346 };
0347 };
0348
0349 &vpll1 {
0350 /* Needed for DSS */
0351 regulator-name = "vdds_dsi";
0352
0353 regulator-min-microvolt = <1800000>;
0354 regulator-max-microvolt = <1800000>;
0355 };
0356
0357 &dss {
0358 status = "okay";
0359
0360 pinctrl-names = "default";
0361 pinctrl-0 = <&dss_dpi_pins>;
0362
0363 vdds_dsi-supply = <&vpll1>;
0364 vdda_dac-supply = <&vdac>;
0365
0366 port {
0367 #address-cells = <1>;
0368 #size-cells = <0>;
0369 dpi_dvi_out: endpoint@0 {
0370 reg = <0>;
0371 remote-endpoint = <&tfp410_in>;
0372 data-lines = <24>;
0373 };
0374
0375 endpoint@1 {
0376 reg = <1>;
0377 };
0378 };
0379 };
0380
0381 &venc {
0382 status = "okay";
0383
0384 vdda-supply = <&vdac>;
0385
0386 port {
0387 venc_out: endpoint {
0388 remote-endpoint = <&tv_connector_in>;
0389 ti,channels = <2>;
0390 };
0391 };
0392 };
