0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Common support for CompuLab CM-T3x CoMs
0004 */
0005
0006 / {
0007
0008 memory@80000000 {
0009 device_type = "memory";
0010 reg = <0x80000000 0x10000000>; /* 256 MB */
0011 };
0012
0013 leds {
0014 compatible = "gpio-leds";
0015 pinctrl-names = "default";
0016 pinctrl-0 = <&green_led_pins>;
0017 ledb {
0018 label = "cm-t3x:green";
0019 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* gpio186 */
0020 linux,default-trigger = "heartbeat";
0021 };
0022 };
0023
0024 /* HS USB Port 1 Power */
0025 hsusb1_power: hsusb1_power_reg {
0026 compatible = "regulator-fixed";
0027 regulator-name = "hsusb1_vbus";
0028 regulator-min-microvolt = <3300000>;
0029 regulator-max-microvolt = <3300000>;
0030 startup-delay-us = <70000>;
0031 };
0032
0033 /* HS USB Port 2 Power */
0034 hsusb2_power: hsusb2_power_reg {
0035 compatible = "regulator-fixed";
0036 regulator-name = "hsusb2_vbus";
0037 regulator-min-microvolt = <3300000>;
0038 regulator-max-microvolt = <3300000>;
0039 startup-delay-us = <70000>;
0040 };
0041
0042 /* HS USB Host PHY on PORT 1 */
0043 hsusb1_phy: hsusb1_phy {
0044 compatible = "usb-nop-xceiv";
0045 vcc-supply = <&hsusb1_power>;
0046 #phy-cells = <0>;
0047 };
0048
0049 /* HS USB Host PHY on PORT 2 */
0050 hsusb2_phy: hsusb2_phy {
0051 compatible = "usb-nop-xceiv";
0052 vcc-supply = <&hsusb2_power>;
0053 #phy-cells = <0>;
0054 };
0055
0056 ads7846reg: ads7846-reg {
0057 compatible = "regulator-fixed";
0058 regulator-name = "ads7846-reg";
0059 regulator-min-microvolt = <3300000>;
0060 regulator-max-microvolt = <3300000>;
0061 };
0062
0063 tv0: svideo-connector {
0064 compatible = "svideo-connector";
0065 label = "tv";
0066
0067 port {
0068 tv_connector_in: endpoint {
0069 remote-endpoint = <&venc_out>;
0070 };
0071 };
0072 };
0073 };
0074
0075 &omap3_pmx_core {
0076
0077 uart3_pins: pinmux_uart3_pins {
0078 pinctrl-single,pins = <
0079 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
0080 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
0081 >;
0082 };
0083
0084 mmc1_pins: pinmux_mmc1_pins {
0085 pinctrl-single,pins = <
0086 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
0087 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
0088 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
0089 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
0090 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
0091 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
0092 >;
0093 };
0094
0095 green_led_pins: pinmux_green_led_pins {
0096 pinctrl-single,pins = <
0097 OMAP3_CORE1_IOPAD(0x21e2, PIN_OUTPUT | MUX_MODE4) /* sys_clkout2.gpio_186 */
0098 >;
0099 };
0100
0101 dss_dpi_pins_common: pinmux_dss_dpi_pins_common {
0102 pinctrl-single,pins = <
0103 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
0104 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
0105 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
0106 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
0107
0108 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
0109 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
0110 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
0111 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
0112 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
0113 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
0114 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
0115 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
0116 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
0117 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
0118 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
0119 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
0120 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
0121 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
0122 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
0123 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
0124 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
0125 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
0126 >;
0127 };
0128
0129 dss_dpi_pins_cm_t35x: pinmux_dss_dpi_pins_cm_t35x {
0130 pinctrl-single,pins = <
0131 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
0132 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
0133 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
0134 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
0135 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
0136 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
0137 >;
0138 };
0139
0140 ads7846_pins: pinmux_ads7846_pins {
0141 pinctrl-single,pins = <
0142 OMAP3_CORE1_IOPAD(0x20ba, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs6.gpio_57 */
0143 >;
0144 };
0145
0146 mcspi1_pins: pinmux_mcspi1_pins {
0147 pinctrl-single,pins = <
0148 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk */
0149 OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0) /* mcspi1_simo */
0150 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0) /* mcspi1_somi */
0151 OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi1_cs0 */
0152 >;
0153 };
0154
0155 i2c1_pins: pinmux_i2c1_pins {
0156 pinctrl-single,pins = <
0157 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
0158 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
0159 >;
0160 };
0161
0162 mcbsp2_pins: pinmux_mcbsp2_pins {
0163 pinctrl-single,pins = <
0164 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
0165 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
0166 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
0167 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
0168 >;
0169 };
0170 };
0171
0172 &uart3 {
0173 pinctrl-names = "default";
0174 pinctrl-0 = <&uart3_pins>;
0175 };
0176
0177 &mmc1 {
0178 pinctrl-names = "default";
0179 pinctrl-0 = <&mmc1_pins>;
0180 bus-width = <4>;
0181 };
0182
0183 &mmc3 {
0184 status = "disabled";
0185 };
0186
0187 &i2c1 {
0188 pinctrl-names = "default";
0189 pinctrl-0 = <&i2c1_pins>;
0190
0191 clock-frequency = <400000>;
0192
0193 at24@50 {
0194 compatible = "atmel,24c02";
0195 pagesize = <16>;
0196 reg = <0x50>;
0197 };
0198 };
0199
0200 &i2c3 {
0201 clock-frequency = <400000>;
0202 };
0203
0204 &usbhshost {
0205 port1-mode = "ehci-phy";
0206 port2-mode = "ehci-phy";
0207 };
0208
0209 &usbhsehci {
0210 phys = <&hsusb1_phy &hsusb2_phy>;
0211 };
0212
0213 &mcspi1 {
0214 pinctrl-names = "default";
0215 pinctrl-0 = <&mcspi1_pins>;
0216
0217 /* touch controller */
0218 ads7846@0 {
0219 pinctrl-names = "default";
0220 pinctrl-0 = <&ads7846_pins>;
0221
0222 compatible = "ti,ads7846";
0223 vcc-supply = <&ads7846reg>;
0224
0225 reg = <0>; /* CS0 */
0226 spi-max-frequency = <1500000>;
0227
0228 interrupt-parent = <&gpio2>;
0229 interrupts = <25 0>; /* gpio_57 */
0230 pendown-gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
0231
0232 ti,x-min = /bits/ 16 <0x0>;
0233 ti,x-max = /bits/ 16 <0x0fff>;
0234 ti,y-min = /bits/ 16 <0x0>;
0235 ti,y-max = /bits/ 16 <0x0fff>;
0236
0237 ti,x-plate-ohms = /bits/ 16 <180>;
0238 ti,pressure-max = /bits/ 16 <255>;
0239
0240 ti,debounce-max = /bits/ 16 <30>;
0241 ti,debounce-tol = /bits/ 16 <10>;
0242 ti,debounce-rep = /bits/ 16 <1>;
0243
0244 wakeup-source;
0245 };
0246 };
0247
0248 &venc {
0249 status = "okay";
0250
0251 port {
0252 venc_out: endpoint {
0253 remote-endpoint = <&tv_connector_in>;
0254 ti,channels = <2>;
0255 };
0256 };
0257 };
0258
0259 &mcbsp2 {
0260 status = "okay";
0261
0262 pinctrl-names = "default";
0263 pinctrl-0 = <&mcbsp2_pins>;
0264 };
0265
0266 &gpmc {
0267 ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
0268
0269 nand@0,0 {
0270 compatible = "ti,omap2-nand";
0271 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
0272 interrupt-parent = <&gpmc>;
0273 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
0274 <1 IRQ_TYPE_NONE>; /* termcount */
0275 nand-bus-width = <8>;
0276 gpmc,device-width = <1>;
0277 ti,nand-ecc-opt = "sw";
0278
0279 gpmc,cs-on-ns = <0>;
0280 gpmc,cs-rd-off-ns = <120>;
0281 gpmc,cs-wr-off-ns = <120>;
0282
0283 gpmc,adv-on-ns = <0>;
0284 gpmc,adv-rd-off-ns = <120>;
0285 gpmc,adv-wr-off-ns = <120>;
0286
0287 gpmc,we-on-ns = <6>;
0288 gpmc,we-off-ns = <90>;
0289
0290 gpmc,oe-on-ns = <6>;
0291 gpmc,oe-off-ns = <90>;
0292
0293 gpmc,page-burst-access-ns = <6>;
0294 gpmc,access-ns = <72>;
0295 gpmc,cycle2cycle-delay-ns = <60>;
0296
0297 gpmc,rd-cycle-ns = <120>;
0298 gpmc,wr-cycle-ns = <120>;
0299 gpmc,wr-access-ns = <186>;
0300 gpmc,wr-data-mux-bus-ns = <90>;
0301
0302 #address-cells = <1>;
0303 #size-cells = <1>;
0304
0305 partition@0 {
0306 label = "xloader";
0307 reg = <0 0x80000>;
0308 };
0309 partition@80000 {
0310 label = "uboot";
0311 reg = <0x80000 0x1e0000>;
0312 };
0313 partition@260000 {
0314 label = "uboot environment";
0315 reg = <0x260000 0x40000>;
0316 };
0317 partition@2a0000 {
0318 label = "linux";
0319 reg = <0x2a0000 0x400000>;
0320 };
0321 partition@6a0000 {
0322 label = "rootfs";
0323 reg = <0x6a0000 0x1f880000>;
0324 };
0325 };
0326 };
