0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
0004 */
0005 /dts-v1/;
0006
0007 #include "omap34xx.dtsi"
0008
0009 / {
0010 model = "TI OMAP3 BeagleBoard";
0011 compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3";
0012
0013 cpus {
0014 cpu@0 {
0015 cpu0-supply = <&vcc>;
0016 };
0017 };
0018
0019 memory@80000000 {
0020 device_type = "memory";
0021 reg = <0x80000000 0x10000000>; /* 256 MB */
0022 };
0023
0024 aliases {
0025 display0 = &dvi0;
0026 display1 = &tv0;
0027 };
0028
0029 leds {
0030 compatible = "gpio-leds";
0031 pmu_stat {
0032 label = "beagleboard::pmu_stat";
0033 gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
0034 };
0035
0036 heartbeat {
0037 label = "beagleboard::usr0";
0038 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
0039 linux,default-trigger = "heartbeat";
0040 };
0041
0042 mmc {
0043 label = "beagleboard::usr1";
0044 gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
0045 linux,default-trigger = "mmc0";
0046 };
0047 };
0048
0049 /* HS USB Port 2 Power */
0050 hsusb2_power: hsusb2_power_reg {
0051 compatible = "regulator-fixed";
0052 regulator-name = "hsusb2_vbus";
0053 regulator-min-microvolt = <3300000>;
0054 regulator-max-microvolt = <3300000>;
0055 gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
0056 startup-delay-us = <70000>;
0057 };
0058
0059 /* HS USB Host PHY on PORT 2 */
0060 hsusb2_phy: hsusb2_phy {
0061 compatible = "usb-nop-xceiv";
0062 reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
0063 vcc-supply = <&hsusb2_power>;
0064 #phy-cells = <0>;
0065 };
0066
0067 sound {
0068 compatible = "ti,omap-twl4030";
0069 ti,model = "omap3beagle";
0070
0071 ti,mcbsp = <&mcbsp2>;
0072 };
0073
0074 gpio_keys {
0075 compatible = "gpio-keys";
0076
0077 user {
0078 label = "user";
0079 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
0080 linux,code = <0x114>;
0081 wakeup-source;
0082 };
0083
0084 };
0085
0086 tfp410: encoder0 {
0087 compatible = "ti,tfp410";
0088 powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
0089
0090 pinctrl-names = "default";
0091 pinctrl-0 = <&tfp410_pins>;
0092
0093 ports {
0094 #address-cells = <1>;
0095 #size-cells = <0>;
0096
0097 port@0 {
0098 reg = <0>;
0099
0100 tfp410_in: endpoint {
0101 remote-endpoint = <&dpi_out>;
0102 };
0103 };
0104
0105 port@1 {
0106 reg = <1>;
0107
0108 tfp410_out: endpoint {
0109 remote-endpoint = <&dvi_connector_in>;
0110 };
0111 };
0112 };
0113 };
0114
0115 dvi0: connector0 {
0116 compatible = "dvi-connector";
0117 label = "dvi";
0118
0119 digital;
0120
0121 ddc-i2c-bus = <&i2c3>;
0122
0123 port {
0124 dvi_connector_in: endpoint {
0125 remote-endpoint = <&tfp410_out>;
0126 };
0127 };
0128 };
0129
0130 tv0: connector1 {
0131 compatible = "svideo-connector";
0132 label = "tv";
0133
0134 port {
0135 tv_connector_in: endpoint {
0136 remote-endpoint = <&venc_out>;
0137 };
0138 };
0139 };
0140
0141 etb@540000000 {
0142 compatible = "arm,coresight-etb10", "arm,primecell";
0143 reg = <0x5401b000 0x1000>;
0144
0145 clocks = <&emu_src_ck>;
0146 clock-names = "apb_pclk";
0147 in-ports {
0148 port {
0149 etb_in: endpoint {
0150 remote-endpoint = <&etm_out>;
0151 };
0152 };
0153 };
0154 };
0155
0156 etm@54010000 {
0157 compatible = "arm,coresight-etm3x", "arm,primecell";
0158 reg = <0x54010000 0x1000>;
0159
0160 clocks = <&emu_src_ck>;
0161 clock-names = "apb_pclk";
0162 out-ports {
0163 port {
0164 etm_out: endpoint {
0165 remote-endpoint = <&etb_in>;
0166 };
0167 };
0168 };
0169 };
0170 };
0171
0172 &omap3_pmx_wkup {
0173 gpio1_pins: pinmux_gpio1_pins {
0174 pinctrl-single,pins = <
0175 OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
0176 >;
0177 };
0178 };
0179
0180 &omap3_pmx_core {
0181 pinctrl-names = "default";
0182 pinctrl-0 = <
0183 &hsusb2_pins
0184 >;
0185
0186 hsusb2_pins: pinmux_hsusb2_pins {
0187 pinctrl-single,pins = <
0188 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
0189 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
0190 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
0191 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
0192 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
0193 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
0194 >;
0195 };
0196
0197 uart3_pins: pinmux_uart3_pins {
0198 pinctrl-single,pins = <
0199 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
0200 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
0201 >;
0202 };
0203
0204 tfp410_pins: pinmux_tfp410_pins {
0205 pinctrl-single,pins = <
0206 OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
0207 >;
0208 };
0209
0210 dss_dpi_pins: pinmux_dss_dpi_pins {
0211 pinctrl-single,pins = <
0212 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
0213 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
0214 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
0215 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
0216 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
0217 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
0218 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
0219 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
0220 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
0221 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
0222 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
0223 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
0224 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
0225 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
0226 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
0227 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
0228 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
0229 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
0230 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
0231 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
0232 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
0233 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
0234 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
0235 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
0236 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
0237 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
0238 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
0239 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
0240 >;
0241 };
0242 };
0243
0244 &omap3_pmx_core2 {
0245 pinctrl-names = "default";
0246 pinctrl-0 = <
0247 &hsusb2_2_pins
0248 >;
0249
0250 hsusb2_2_pins: pinmux_hsusb2_2_pins {
0251 pinctrl-single,pins = <
0252 OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
0253 OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
0254 OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
0255 OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
0256 OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
0257 OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
0258 >;
0259 };
0260 };
0261
0262 &i2c1 {
0263 clock-frequency = <2600000>;
0264
0265 twl: twl@48 {
0266 reg = <0x48>;
0267 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
0268 interrupt-parent = <&intc>;
0269
0270 twl_audio: audio {
0271 compatible = "ti,twl4030-audio";
0272 codec {
0273 };
0274 };
0275 };
0276 };
0277
0278 #include "twl4030.dtsi"
0279 #include "twl4030_omap3.dtsi"
0280
0281 &i2c3 {
0282 clock-frequency = <100000>;
0283 };
0284
0285 &mmc1 {
0286 vmmc-supply = <&vmmc1>;
0287 vqmmc-supply = <&vsim>;
0288 bus-width = <8>;
0289 };
0290
0291 &mmc2 {
0292 status = "disabled";
0293 };
0294
0295 &mmc3 {
0296 status = "disabled";
0297 };
0298
0299 &usbhshost {
0300 port2-mode = "ehci-phy";
0301 };
0302
0303 &usbhsehci {
0304 phys = <0 &hsusb2_phy>;
0305 };
0306
0307 &twl_gpio {
0308 ti,use-leds;
0309 /* pullups: BIT(1) */
0310 ti,pullups = <0x000002>;
0311 /*
0312 * pulldowns:
0313 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
0314 * BIT(15), BIT(16), BIT(17)
0315 */
0316 ti,pulldowns = <0x03a1c4>;
0317 };
0318
0319 &uart3 {
0320 pinctrl-names = "default";
0321 pinctrl-0 = <&uart3_pins>;
0322 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
0323 };
0324
0325 &gpio1 {
0326 pinctrl-names = "default";
0327 pinctrl-0 = <&gpio1_pins>;
0328 };
0329
0330 &usb_otg_hs {
0331 interface-type = <0>;
0332 usb-phy = <&usb2_phy>;
0333 phys = <&usb2_phy>;
0334 phy-names = "usb2-phy";
0335 mode = <3>;
0336 power = <50>;
0337 };
0338
0339 &vaux2 {
0340 regulator-name = "vdd_ehci";
0341 regulator-min-microvolt = <1800000>;
0342 regulator-max-microvolt = <1800000>;
0343 regulator-always-on;
0344 };
0345
0346 &mcbsp2 {
0347 status = "okay";
0348 };
0349
0350 /* Needed to power the DPI pins */
0351 &vpll2 {
0352 regulator-always-on;
0353 };
0354
0355 &dss {
0356 status = "okay";
0357
0358 pinctrl-names = "default";
0359 pinctrl-0 = <&dss_dpi_pins>;
0360
0361 port {
0362 dpi_out: endpoint {
0363 remote-endpoint = <&tfp410_in>;
0364 data-lines = <24>;
0365 };
0366 };
0367 };
0368
0369 &venc {
0370 status = "okay";
0371
0372 vdda-supply = <&vdac>;
0373
0374 port {
0375 venc_out: endpoint {
0376 remote-endpoint = <&tv_connector_in>;
0377 ti,channels = <2>;
0378 };
0379 };
0380 };
0381
0382 &gpmc {
0383 status = "okay";
0384 ranges = <0 0 0x30000000 0x1000000>; /* CS0 space, 16MB */
0385
0386 /* Chip select 0 */
0387 nand@0,0 {
0388 compatible = "ti,omap2-nand";
0389 reg = <0 0 4>; /* NAND I/O window, 4 bytes */
0390 interrupt-parent = <&gpmc>;
0391 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
0392 <1 IRQ_TYPE_NONE>; /* termcount */
0393 ti,nand-ecc-opt = "ham1";
0394 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
0395 nand-bus-width = <16>;
0396 #address-cells = <1>;
0397 #size-cells = <1>;
0398
0399 gpmc,device-width = <2>;
0400 gpmc,cs-on-ns = <0>;
0401 gpmc,cs-rd-off-ns = <36>;
0402 gpmc,cs-wr-off-ns = <36>;
0403 gpmc,adv-on-ns = <6>;
0404 gpmc,adv-rd-off-ns = <24>;
0405 gpmc,adv-wr-off-ns = <36>;
0406 gpmc,oe-on-ns = <6>;
0407 gpmc,oe-off-ns = <48>;
0408 gpmc,we-on-ns = <6>;
0409 gpmc,we-off-ns = <30>;
0410 gpmc,rd-cycle-ns = <72>;
0411 gpmc,wr-cycle-ns = <72>;
0412 gpmc,access-ns = <54>;
0413 gpmc,wr-access-ns = <30>;
0414
0415 partition@0 {
0416 label = "X-Loader";
0417 reg = <0 0x80000>;
0418 };
0419 partition@80000 {
0420 label = "U-Boot";
0421 reg = <0x80000 0x1e0000>;
0422 };
0423 partition@1c0000 {
0424 label = "U-Boot Env";
0425 reg = <0x260000 0x20000>;
0426 };
0427 partition@280000 {
0428 label = "Kernel";
0429 reg = <0x280000 0x400000>;
0430 };
0431 partition@780000 {
0432 label = "Filesystem";
0433 reg = <0x680000 0xf980000>;
0434 };
0435 };
0436 };
