0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Device Tree Source for OMAP2420 SoC
0004 *
0005 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
0006 */
0007
0008 #include "omap2.dtsi"
0009
0010 / {
0011 compatible = "ti,omap2420", "ti,omap2";
0012
0013 ocp {
0014 l4: l4@48000000 {
0015 compatible = "ti,omap2-l4", "simple-bus";
0016 #address-cells = <1>;
0017 #size-cells = <1>;
0018 ranges = <0 0x48000000 0x100000>;
0019
0020 prcm: prcm@8000 {
0021 compatible = "ti,omap2-prcm";
0022 reg = <0x8000 0x1000>;
0023
0024 prcm_clocks: clocks {
0025 #address-cells = <1>;
0026 #size-cells = <0>;
0027 };
0028
0029 prcm_clockdomains: clockdomains {
0030 };
0031 };
0032
0033 scm: scm@0 {
0034 compatible = "ti,omap2-scm", "simple-bus";
0035 reg = <0x0 0x1000>;
0036 #address-cells = <1>;
0037 #size-cells = <1>;
0038 #pinctrl-cells = <1>;
0039 ranges = <0 0x0 0x1000>;
0040
0041 omap2420_pmx: pinmux@30 {
0042 compatible = "ti,omap2420-padconf",
0043 "pinctrl-single";
0044 reg = <0x30 0x0113>;
0045 #address-cells = <1>;
0046 #size-cells = <0>;
0047 #pinctrl-cells = <1>;
0048 pinctrl-single,register-width = <8>;
0049 pinctrl-single,function-mask = <0x3f>;
0050 };
0051
0052 scm_conf: scm_conf@270 {
0053 compatible = "syscon";
0054 reg = <0x270 0x100>;
0055 #address-cells = <1>;
0056 #size-cells = <1>;
0057
0058 scm_clocks: clocks {
0059 #address-cells = <1>;
0060 #size-cells = <0>;
0061 };
0062 };
0063
0064 scm_clockdomains: clockdomains {
0065 };
0066 };
0067
0068 target-module@4000 {
0069 compatible = "ti,sysc-omap2", "ti,sysc";
0070 reg = <0x4000 0x4>,
0071 <0x4004 0x4>;
0072 reg-names = "rev", "sysc";
0073 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0074 <SYSC_IDLE_NO>;
0075 clocks = <&func_32k_ck>;
0076 clock-names = "fck";
0077 #address-cells = <1>;
0078 #size-cells = <1>;
0079 ranges = <0x0 0x4000 0x1000>;
0080
0081 counter32k: counter@0 {
0082 compatible = "ti,omap-counter32k";
0083 reg = <0 0x20>;
0084 };
0085 };
0086 };
0087
0088 gpio1: gpio@48018000 {
0089 compatible = "ti,omap2-gpio";
0090 reg = <0x48018000 0x200>;
0091 interrupts = <29>;
0092 ti,hwmods = "gpio1";
0093 ti,gpio-always-on;
0094 #gpio-cells = <2>;
0095 gpio-controller;
0096 #interrupt-cells = <2>;
0097 interrupt-controller;
0098 };
0099
0100 gpio2: gpio@4801a000 {
0101 compatible = "ti,omap2-gpio";
0102 reg = <0x4801a000 0x200>;
0103 interrupts = <30>;
0104 ti,hwmods = "gpio2";
0105 ti,gpio-always-on;
0106 #gpio-cells = <2>;
0107 gpio-controller;
0108 #interrupt-cells = <2>;
0109 interrupt-controller;
0110 };
0111
0112 gpio3: gpio@4801c000 {
0113 compatible = "ti,omap2-gpio";
0114 reg = <0x4801c000 0x200>;
0115 interrupts = <31>;
0116 ti,hwmods = "gpio3";
0117 ti,gpio-always-on;
0118 #gpio-cells = <2>;
0119 gpio-controller;
0120 #interrupt-cells = <2>;
0121 interrupt-controller;
0122 };
0123
0124 gpio4: gpio@4801e000 {
0125 compatible = "ti,omap2-gpio";
0126 reg = <0x4801e000 0x200>;
0127 interrupts = <32>;
0128 ti,hwmods = "gpio4";
0129 ti,gpio-always-on;
0130 #gpio-cells = <2>;
0131 gpio-controller;
0132 #interrupt-cells = <2>;
0133 interrupt-controller;
0134 };
0135
0136 gpmc: gpmc@6800a000 {
0137 compatible = "ti,omap2420-gpmc";
0138 reg = <0x6800a000 0x1000>;
0139 #address-cells = <2>;
0140 #size-cells = <1>;
0141 interrupts = <20>;
0142 gpmc,num-cs = <8>;
0143 gpmc,num-waitpins = <4>;
0144 ti,hwmods = "gpmc";
0145 interrupt-controller;
0146 #interrupt-cells = <2>;
0147 gpio-controller;
0148 #gpio-cells = <2>;
0149 };
0150
0151 mcbsp1: mcbsp@48074000 {
0152 compatible = "ti,omap2420-mcbsp";
0153 reg = <0x48074000 0xff>;
0154 reg-names = "mpu";
0155 interrupts = <59>, /* TX interrupt */
0156 <60>; /* RX interrupt */
0157 interrupt-names = "tx", "rx";
0158 ti,hwmods = "mcbsp1";
0159 dmas = <&sdma 31>,
0160 <&sdma 32>;
0161 dma-names = "tx", "rx";
0162 status = "disabled";
0163 };
0164
0165 mcbsp2: mcbsp@48076000 {
0166 compatible = "ti,omap2420-mcbsp";
0167 reg = <0x48076000 0xff>;
0168 reg-names = "mpu";
0169 interrupts = <62>, /* TX interrupt */
0170 <63>; /* RX interrupt */
0171 interrupt-names = "tx", "rx";
0172 ti,hwmods = "mcbsp2";
0173 dmas = <&sdma 33>,
0174 <&sdma 34>;
0175 dma-names = "tx", "rx";
0176 status = "disabled";
0177 };
0178
0179 msdi1: mmc@4809c000 {
0180 compatible = "ti,omap2420-mmc";
0181 ti,hwmods = "msdi1";
0182 reg = <0x4809c000 0x80>;
0183 interrupts = <83>;
0184 dmas = <&sdma 61 &sdma 62>;
0185 dma-names = "tx", "rx";
0186 };
0187
0188 mailbox: mailbox@48094000 {
0189 compatible = "ti,omap2-mailbox";
0190 reg = <0x48094000 0x200>;
0191 interrupts = <26>, <34>;
0192 ti,hwmods = "mailbox";
0193 #mbox-cells = <1>;
0194 ti,mbox-num-users = <4>;
0195 ti,mbox-num-fifos = <6>;
0196 mbox_dsp: mbox-dsp {
0197 ti,mbox-tx = <0 0 0>;
0198 ti,mbox-rx = <1 0 0>;
0199 };
0200 mbox_iva: mbox-iva {
0201 ti,mbox-tx = <2 1 3>;
0202 ti,mbox-rx = <3 1 3>;
0203 };
0204 };
0205
0206 timer1_target: target-module@48028000 {
0207 compatible = "ti,sysc-omap2-timer", "ti,sysc";
0208 reg = <0x48028000 0x4>,
0209 <0x48028010 0x4>,
0210 <0x48028014 0x4>;
0211 reg-names = "rev", "sysc", "syss";
0212 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
0213 SYSC_OMAP2_EMUFREE |
0214 SYSC_OMAP2_ENAWAKEUP |
0215 SYSC_OMAP2_SOFTRESET |
0216 SYSC_OMAP2_AUTOIDLE)>;
0217 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0218 <SYSC_IDLE_NO>,
0219 <SYSC_IDLE_SMART>;
0220 ti,syss-mask = <1>;
0221 clocks = <&gpt1_fck>, <&gpt1_ick>;
0222 clock-names = "fck", "ick";
0223 #address-cells = <1>;
0224 #size-cells = <1>;
0225 ranges = <0x0 0x48028000 0x1000>;
0226
0227 timer1: timer@0 {
0228 compatible = "ti,omap2420-timer";
0229 reg = <0 0x400>;
0230 interrupts = <37>;
0231 ti,timer-alwon;
0232 };
0233 };
0234
0235 wd_timer2: wdt@48022000 {
0236 compatible = "ti,omap2-wdt";
0237 ti,hwmods = "wd_timer2";
0238 reg = <0x48022000 0x80>;
0239 };
0240 };
0241 };
0242
0243 &i2c1 {
0244 compatible = "ti,omap2420-i2c";
0245 };
0246
0247 &i2c2 {
0248 compatible = "ti,omap2420-i2c";
0249 };
0250
0251 #include "omap24xx-clocks.dtsi"
0252 #include "omap2420-clocks.dtsi"
0253
0254 /* Preferred always-on timer for clockevent */
0255 &timer1_target {
0256 ti,no-reset-on-init;
0257 ti,no-idle;
0258 timer@0 {
0259 assigned-clocks = <&gpt1_fck>;
0260 assigned-clock-parents = <&func_32k_ck>;
0261 };
0262 };
