OSCL-LXR |
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0001 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 // Copyright 2021 Jonathan Neuschäfer
0003
0004 #include <dt-bindings/interrupt-controller/irq.h>
0005
0006 / {
0007 compatible = "nuvoton,wpcm450";
0008 #address-cells = <1>;
0009 #size-cells = <1>;
0010
0011 aliases {
0012 gpio0 = &gpio0;
0013 gpio1 = &gpio1;
0014 gpio2 = &gpio2;
0015 gpio3 = &gpio3;
0016 gpio4 = &gpio4;
0017 gpio5 = &gpio5;
0018 gpio6 = &gpio6;
0019 gpio7 = &gpio7;
0020 };
0021
0022 cpus {
0023 #address-cells = <1>;
0024 #size-cells = <0>;
0025
0026 cpu@0 {
0027 compatible = "arm,arm926ej-s";
0028 device_type = "cpu";
0029 reg = <0>;
0030 };
0031 };
0032
0033 clk24m: clock-24mhz {
0034 /* 24 MHz dummy clock */
0035 compatible = "fixed-clock";
0036 clock-frequency = <24000000>;
0037 #clock-cells = <0>;
0038 };
0039
0040 soc {
0041 compatible = "simple-bus";
0042 #address-cells = <1>;
0043 #size-cells = <1>;
0044 interrupt-parent = <&aic>;
0045 ranges;
0046
0047 gcr: syscon@b0000000 {
0048 compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd";
0049 reg = <0xb0000000 0x200>;
0050 };
0051
0052 serial0: serial@b8000000 {
0053 compatible = "nuvoton,wpcm450-uart";
0054 reg = <0xb8000000 0x20>;
0055 reg-shift = <2>;
0056 interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
0057 clocks = <&clk24m>;
0058 pinctrl-names = "default";
0059 pinctrl-0 = <&bsp_pins>;
0060 status = "disabled";
0061 };
0062
0063 serial1: serial@b8000100 {
0064 compatible = "nuvoton,wpcm450-uart";
0065 reg = <0xb8000100 0x20>;
0066 reg-shift = <2>;
0067 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
0068 clocks = <&clk24m>;
0069 status = "disabled";
0070 };
0071
0072 timer0: timer@b8001000 {
0073 compatible = "nuvoton,wpcm450-timer";
0074 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
0075 reg = <0xb8001000 0x1c>;
0076 clocks = <&clk24m>;
0077 };
0078
0079 watchdog0: watchdog@b800101c {
0080 compatible = "nuvoton,wpcm450-wdt";
0081 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
0082 reg = <0xb800101c 0x4>;
0083 clocks = <&clk24m>;
0084 status = "disabled";
0085 };
0086
0087 aic: interrupt-controller@b8002000 {
0088 compatible = "nuvoton,wpcm450-aic";
0089 reg = <0xb8002000 0x1000>;
0090 interrupt-controller;
0091 #interrupt-cells = <2>;
0092 };
0093
0094 pinctrl: pinctrl@b8003000 {
0095 compatible = "nuvoton,wpcm450-pinctrl";
0096 reg = <0xb8003000 0x1000>;
0097 #address-cells = <1>;
0098 #size-cells = <0>;
0099
0100 gpio0: gpio@0 {
0101 reg = <0>;
0102 gpio-controller;
0103 #gpio-cells = <2>;
0104 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>,
0105 <3 IRQ_TYPE_LEVEL_HIGH>,
0106 <4 IRQ_TYPE_LEVEL_HIGH>;
0107 interrupt-controller;
0108 };
0109
0110 gpio1: gpio@1 {
0111 reg = <1>;
0112 gpio-controller;
0113 #gpio-cells = <2>;
0114 interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
0115 interrupt-controller;
0116 };
0117
0118 gpio2: gpio@2 {
0119 reg = <2>;
0120 gpio-controller;
0121 #gpio-cells = <2>;
0122 };
0123
0124 gpio3: gpio@3 {
0125 reg = <3>;
0126 gpio-controller;
0127 #gpio-cells = <2>;
0128 };
0129
0130 gpio4: gpio@4 {
0131 reg = <4>;
0132 gpio-controller;
0133 #gpio-cells = <2>;
0134 };
0135
0136 gpio5: gpio@5 {
0137 reg = <5>;
0138 gpio-controller;
0139 #gpio-cells = <2>;
0140 };
0141
0142 gpio6: gpio@6 {
0143 reg = <6>;
0144 gpio-controller;
0145 #gpio-cells = <2>;
0146 };
0147
0148 gpio7: gpio@7 {
0149 reg = <7>;
0150 gpio-controller;
0151 #gpio-cells = <2>;
0152 };
0153
0154 smb3_pins: mux-smb3 {
0155 groups = "smb3";
0156 function = "smb3";
0157 };
0158
0159 smb4_pins: mux-smb4 {
0160 groups = "smb4";
0161 function = "smb4";
0162 };
0163
0164 smb5_pins: mux-smb5 {
0165 groups = "smb5";
0166 function = "smb5";
0167 };
0168
0169 scs1_pins: mux-scs1 {
0170 groups = "scs1";
0171 function = "scs1";
0172 };
0173
0174 scs2_pins: mux-scs2 {
0175 groups = "scs2";
0176 function = "scs2";
0177 };
0178
0179 scs3_pins: mux-scs3 {
0180 groups = "scs3";
0181 function = "scs3";
0182 };
0183
0184 smb0_pins: mux-smb0 {
0185 groups = "smb0";
0186 function = "smb0";
0187 };
0188
0189 smb1_pins: mux-smb1 {
0190 groups = "smb1";
0191 function = "smb1";
0192 };
0193
0194 smb2_pins: mux-smb2 {
0195 groups = "smb2";
0196 function = "smb2";
0197 };
0198
0199 bsp_pins: mux-bsp {
0200 groups = "bsp";
0201 function = "bsp";
0202 };
0203
0204 hsp1_pins: mux-hsp1 {
0205 groups = "hsp1";
0206 function = "hsp1";
0207 };
0208
0209 hsp2_pins: mux-hsp2 {
0210 groups = "hsp2";
0211 function = "hsp2";
0212 };
0213
0214 r1err_pins: mux-r1err {
0215 groups = "r1err";
0216 function = "r1err";
0217 };
0218
0219 r1md_pins: mux-r1md {
0220 groups = "r1md";
0221 function = "r1md";
0222 };
0223
0224 rmii2_pins: mux-rmii2 {
0225 groups = "rmii2";
0226 function = "rmii2";
0227 };
0228
0229 r2err_pins: mux-r2err {
0230 groups = "r2err";
0231 function = "r2err";
0232 };
0233
0234 r2md_pins: mux-r2md {
0235 groups = "r2md";
0236 function = "r2md";
0237 };
0238
0239 kbcc_pins: mux-kbcc {
0240 groups = "kbcc";
0241 function = "kbcc";
0242 };
0243
0244 dvo0_pins: mux-dvo0 {
0245 groups = "dvo";
0246 function = "dvo0";
0247 };
0248
0249 dvo3_pins: mux-dvo3 {
0250 groups = "dvo";
0251 function = "dvo3";
0252 };
0253
0254 clko_pins: mux-clko {
0255 groups = "clko";
0256 function = "clko";
0257 };
0258
0259 smi_pins: mux-smi {
0260 groups = "smi";
0261 function = "smi";
0262 };
0263
0264 uinc_pins: mux-uinc {
0265 groups = "uinc";
0266 function = "uinc";
0267 };
0268
0269 gspi_pins: mux-gspi {
0270 groups = "gspi";
0271 function = "gspi";
0272 };
0273
0274 mben_pins: mux-mben {
0275 groups = "mben";
0276 function = "mben";
0277 };
0278
0279 xcs2_pins: mux-xcs2 {
0280 groups = "xcs2";
0281 function = "xcs2";
0282 };
0283
0284 xcs1_pins: mux-xcs1 {
0285 groups = "xcs1";
0286 function = "xcs1";
0287 };
0288
0289 sdio_pins: mux-sdio {
0290 groups = "sdio";
0291 function = "sdio";
0292 };
0293
0294 sspi_pins: mux-sspi {
0295 groups = "sspi";
0296 function = "sspi";
0297 };
0298
0299 fi0_pins: mux-fi0 {
0300 groups = "fi0";
0301 function = "fi0";
0302 };
0303
0304 fi1_pins: mux-fi1 {
0305 groups = "fi1";
0306 function = "fi1";
0307 };
0308
0309 fi2_pins: mux-fi2 {
0310 groups = "fi2";
0311 function = "fi2";
0312 };
0313
0314 fi3_pins: mux-fi3 {
0315 groups = "fi3";
0316 function = "fi3";
0317 };
0318
0319 fi4_pins: mux-fi4 {
0320 groups = "fi4";
0321 function = "fi4";
0322 };
0323
0324 fi5_pins: mux-fi5 {
0325 groups = "fi5";
0326 function = "fi5";
0327 };
0328
0329 fi6_pins: mux-fi6 {
0330 groups = "fi6";
0331 function = "fi6";
0332 };
0333
0334 fi7_pins: mux-fi7 {
0335 groups = "fi7";
0336 function = "fi7";
0337 };
0338
0339 fi8_pins: mux-fi8 {
0340 groups = "fi8";
0341 function = "fi8";
0342 };
0343
0344 fi9_pins: mux-fi9 {
0345 groups = "fi9";
0346 function = "fi9";
0347 };
0348
0349 fi10_pins: mux-fi10 {
0350 groups = "fi10";
0351 function = "fi10";
0352 };
0353
0354 fi11_pins: mux-fi11 {
0355 groups = "fi11";
0356 function = "fi11";
0357 };
0358
0359 fi12_pins: mux-fi12 {
0360 groups = "fi12";
0361 function = "fi12";
0362 };
0363
0364 fi13_pins: mux-fi13 {
0365 groups = "fi13";
0366 function = "fi13";
0367 };
0368
0369 fi14_pins: mux-fi14 {
0370 groups = "fi14";
0371 function = "fi14";
0372 };
0373
0374 fi15_pins: mux-fi15 {
0375 groups = "fi15";
0376 function = "fi15";
0377 };
0378
0379 pwm0_pins: mux-pwm0 {
0380 groups = "pwm0";
0381 function = "pwm0";
0382 };
0383
0384 pwm1_pins: mux-pwm1 {
0385 groups = "pwm1";
0386 function = "pwm1";
0387 };
0388
0389 pwm2_pins: mux-pwm2 {
0390 groups = "pwm2";
0391 function = "pwm2";
0392 };
0393
0394 pwm3_pins: mux-pwm3 {
0395 groups = "pwm3";
0396 function = "pwm3";
0397 };
0398
0399 pwm4_pins: mux-pwm4 {
0400 groups = "pwm4";
0401 function = "pwm4";
0402 };
0403
0404 pwm5_pins: mux-pwm5 {
0405 groups = "pwm5";
0406 function = "pwm5";
0407 };
0408
0409 pwm6_pins: mux-pwm6 {
0410 groups = "pwm6";
0411 function = "pwm6";
0412 };
0413
0414 pwm7_pins: mux-pwm7 {
0415 groups = "pwm7";
0416 function = "pwm7";
0417 };
0418
0419 hg0_pins: mux-hg0 {
0420 groups = "hg0";
0421 function = "hg0";
0422 };
0423
0424 hg1_pins: mux-hg1 {
0425 groups = "hg1";
0426 function = "hg1";
0427 };
0428
0429 hg2_pins: mux-hg2 {
0430 groups = "hg2";
0431 function = "hg2";
0432 };
0433
0434 hg3_pins: mux-hg3 {
0435 groups = "hg3";
0436 function = "hg3";
0437 };
0438
0439 hg4_pins: mux-hg4 {
0440 groups = "hg4";
0441 function = "hg4";
0442 };
0443
0444 hg5_pins: mux-hg5 {
0445 groups = "hg5";
0446 function = "hg5";
0447 };
0448
0449 hg6_pins: mux-hg6 {
0450 groups = "hg6";
0451 function = "hg6";
0452 };
0453
0454 hg7_pins: mux-hg7 {
0455 groups = "hg7";
0456 function = "hg7";
0457 };
0458 };
0459 };
0460 };
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