boot/dts/nuvoton-npcm730.dtsi

0001 // SPDX-License-Identifier: GPL-2.0
0002 // Copyright (c) 2020 Nuvoton Technology
0003
0004 #include "nuvoton-common-npcm7xx.dtsi"
0005
0006 / {
0007         #address-cells = <1>;
0008         #size-cells = <1>;
0009         interrupt-parent = <&gic>;
0010
0011         cpus {
0012                 #address-cells = <1>;
0013                 #size-cells = <0>;
0014                 enable-method = "nuvoton,npcm750-smp";
0015
0016                 cpu@0 {
0017                         device_type = "cpu";
0018                         compatible = "arm,cortex-a9";
0019                         clocks = <&clk NPCM7XX_CLK_CPU>;
0020                         clock-names = "clk_cpu";
0021                         reg = <0>;
0022                         next-level-cache = <&l2>;
0023                 };
0024
0025                 cpu@1 {
0026                         device_type = "cpu";
0027                         compatible = "arm,cortex-a9";
0028                         clocks = <&clk NPCM7XX_CLK_CPU>;
0029                         clock-names = "clk_cpu";
0030                         reg = <1>;
0031                         next-level-cache = <&l2>;
0032                 };
0033         };
0034
0035         soc {
0036                 timer@3fe600 {
0037                         compatible = "arm,cortex-a9-twd-timer";
0038                         reg = <0x3fe600 0x20>;
0039                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
0040                                                   IRQ_TYPE_LEVEL_HIGH)>;
0041                         clocks = <&clk NPCM7XX_CLK_AHB>;
0042                 };
0043         };
0044 };