0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * linux/arch/arm/boot/nspire-classic.dts
0004 *
0005 * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
0006 */
0007
0008 /include/ "nspire.dtsi"
0009
0010 &lcd {
0011 port {
0012 clcd_pads: endpoint {
0013 remote-endpoint = <&panel_in>;
0014 };
0015 };
0016 };
0017
0018 &fast_timer {
0019 /* compatible = "lsi,zevio-timer"; */
0020 reg = <0x90010000 0x1000>, <0x900a0010 0x8>;
0021 };
0022
0023 &uart {
0024 compatible = "ns16550";
0025 reg-shift = <2>;
0026 reg-io-width = <4>;
0027 clocks = <&apb_pclk>;
0028 no-loopback-test;
0029 };
0030
0031 &timer0 {
0032 /* compatible = "lsi,zevio-timer"; */
0033 reg = <0x900c0000 0x1000>, <0x900a0018 0x8>;
0034 };
0035
0036 &timer1 {
0037 compatible = "lsi,zevio-timer";
0038 reg = <0x900d0000 0x1000>, <0x900a0020 0x8>;
0039 };
0040
0041 &keypad {
0042 active-low;
0043
0044 };
0045
0046 &base_clk {
0047 compatible = "lsi,nspire-classic-clock";
0048 };
0049
0050 &ahb_clk {
0051 compatible = "lsi,nspire-classic-ahb-divider";
0052 };
0053
0054
0055 &vbus_reg {
0056 gpio = <&gpio 5 0>;
0057 };
0058
0059 / {
0060 memory {
0061 device_type = "memory";
0062 reg = <0x10000000 0x2000000>; /* 32 MB */
0063 };
0064
0065 ahb {
0066 #address-cells = <1>;
0067 #size-cells = <1>;
0068
0069 intc: interrupt-controller@dc000000 {
0070 compatible = "lsi,zevio-intc";
0071 interrupt-controller;
0072 reg = <0xdc000000 0x1000>;
0073 #interrupt-cells = <1>;
0074 };
0075 };
0076
0077 panel {
0078 compatible = "ti,nspire-classic-lcd-panel";
0079 port {
0080 panel_in: endpoint {
0081 remote-endpoint = <&clcd_pads>;
0082 };
0083 };
0084 };
0085 chosen {
0086 bootargs = "debug earlyprintk console=tty0 console=ttyS0,115200n8 root=/dev/ram0";
0087 };
0088 };