0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Copyright (c) 2017-2018 MediaTek Inc.
0004 * Author: Sean Wang <sean.wang@mediatek.com>
0005 *
0006 */
0007
0008 /dts-v1/;
0009 #include <dt-bindings/input/input.h>
0010 #include "mt7623a.dtsi"
0011 #include "mt6323.dtsi"
0012
0013 / {
0014 model = "MediaTek MT7623A with eMMC reference board";
0015 compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623";
0016
0017 aliases {
0018 serial2 = &uart2;
0019 };
0020
0021 chosen {
0022 stdout-path = "serial2:115200n8";
0023 };
0024
0025 cpus {
0026 cpu@0 {
0027 proc-supply = <&mt6323_vproc_reg>;
0028 };
0029
0030 cpu@1 {
0031 proc-supply = <&mt6323_vproc_reg>;
0032 };
0033
0034 cpu@2 {
0035 proc-supply = <&mt6323_vproc_reg>;
0036 };
0037
0038 cpu@3 {
0039 proc-supply = <&mt6323_vproc_reg>;
0040 };
0041 };
0042
0043 gpio-keys {
0044 compatible = "gpio-keys";
0045 pinctrl-names = "default";
0046 pinctrl-0 = <&key_pins_a>;
0047
0048 button-factory {
0049 label = "factory";
0050 linux,code = <BTN_0>;
0051 gpios = <&pio 256 GPIO_ACTIVE_LOW>;
0052 };
0053
0054 button-wps {
0055 label = "wps";
0056 linux,code = <KEY_WPS_BUTTON>;
0057 gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
0058 };
0059 };
0060
0061 memory@80000000 {
0062 device_type = "memory";
0063 reg = <0 0x80000000 0 0x20000000>;
0064 };
0065
0066 reg_1p8v: regulator-1p8v {
0067 compatible = "regulator-fixed";
0068 regulator-name = "fixed-1.8V";
0069 regulator-min-microvolt = <1800000>;
0070 regulator-max-microvolt = <1800000>;
0071 regulator-boot-on;
0072 regulator-always-on;
0073 };
0074
0075 reg_3p3v: regulator-3p3v {
0076 compatible = "regulator-fixed";
0077 regulator-name = "fixed-3.3V";
0078 regulator-min-microvolt = <3300000>;
0079 regulator-max-microvolt = <3300000>;
0080 regulator-boot-on;
0081 regulator-always-on;
0082 };
0083
0084 reg_5v: regulator-5v {
0085 compatible = "regulator-fixed";
0086 regulator-name = "fixed-5V";
0087 regulator-min-microvolt = <5000000>;
0088 regulator-max-microvolt = <5000000>;
0089 regulator-boot-on;
0090 regulator-always-on;
0091 };
0092
0093 sound {
0094 compatible = "mediatek,mt2701-wm8960-machine";
0095 mediatek,platform = <&afe>;
0096 audio-routing =
0097 "Headphone", "HP_L",
0098 "Headphone", "HP_R",
0099 "LINPUT1", "AMIC",
0100 "RINPUT1", "AMIC";
0101 mediatek,audio-codec = <&wm8960>;
0102 pinctrl-names = "default";
0103 pinctrl-0 = <&i2s0_pins_a>;
0104 };
0105 };
0106
0107 &btif {
0108 status = "okay";
0109 };
0110
0111 &crypto {
0112 status = "okay";
0113 };
0114
0115 ð {
0116 status = "okay";
0117
0118 gmac0: mac@0 {
0119 compatible = "mediatek,eth-mac";
0120 reg = <0>;
0121 phy-mode = "trgmii";
0122
0123 fixed-link {
0124 speed = <1000>;
0125 full-duplex;
0126 pause;
0127 };
0128 };
0129
0130 mdio-bus {
0131 #address-cells = <1>;
0132 #size-cells = <0>;
0133
0134 switch@0 {
0135 compatible = "mediatek,mt7530";
0136 reg = <0>;
0137 mediatek,mcm;
0138 resets = <ðsys MT2701_ETHSYS_MCM_RST>;
0139 reset-names = "mcm";
0140 core-supply = <&mt6323_vpa_reg>;
0141 io-supply = <&mt6323_vemc3v3_reg>;
0142
0143 ports {
0144 #address-cells = <1>;
0145 #size-cells = <0>;
0146
0147 port@0 {
0148 reg = <0>;
0149 label = "lan0";
0150 };
0151
0152 port@1 {
0153 reg = <1>;
0154 label = "lan1";
0155 };
0156
0157 port@2 {
0158 reg = <2>;
0159 label = "lan2";
0160 };
0161
0162 port@3 {
0163 reg = <3>;
0164 label = "lan3";
0165 };
0166
0167 port@4 {
0168 reg = <4>;
0169 label = "wan";
0170 };
0171
0172 port@6 {
0173 reg = <6>;
0174 label = "cpu";
0175 ethernet = <&gmac0>;
0176 phy-mode = "trgmii";
0177
0178 fixed-link {
0179 speed = <1000>;
0180 full-duplex;
0181 };
0182 };
0183 };
0184 };
0185 };
0186 };
0187
0188 &i2c0 {
0189 pinctrl-names = "default";
0190 pinctrl-0 = <&i2c0_pins_a>;
0191 status = "okay";
0192 };
0193
0194 &i2c1 {
0195 pinctrl-names = "default";
0196 pinctrl-0 = <&i2c1_pins_b>;
0197 status = "okay";
0198
0199 wm8960: wm8960@1a {
0200 compatible = "wlf,wm8960";
0201 reg = <0x1a>;
0202 };
0203 };
0204
0205 &i2c2 {
0206 pinctrl-names = "default";
0207 pinctrl-0 = <&i2c2_pins_b>;
0208 status = "okay";
0209 };
0210
0211 &mmc0 {
0212 pinctrl-names = "default", "state_uhs";
0213 pinctrl-0 = <&mmc0_pins_default>;
0214 pinctrl-1 = <&mmc0_pins_uhs>;
0215 status = "okay";
0216 bus-width = <8>;
0217 max-frequency = <50000000>;
0218 cap-mmc-highspeed;
0219 vmmc-supply = <®_3p3v>;
0220 vqmmc-supply = <®_1p8v>;
0221 non-removable;
0222 };
0223
0224 &mmc1 {
0225 pinctrl-names = "default", "state_uhs";
0226 pinctrl-0 = <&mmc1_pins_default>;
0227 pinctrl-1 = <&mmc1_pins_uhs>;
0228 status = "okay";
0229 bus-width = <4>;
0230 max-frequency = <50000000>;
0231 cap-sd-highspeed;
0232 cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
0233 vmmc-supply = <®_3p3v>;
0234 vqmmc-supply = <®_3p3v>;
0235 };
0236
0237 &pcie {
0238 pinctrl-names = "default";
0239 pinctrl-0 = <&pcie_default>;
0240 status = "okay";
0241
0242 pcie@0,0 {
0243 status = "okay";
0244 };
0245
0246 pcie@1,0 {
0247 status = "okay";
0248 };
0249 };
0250
0251 &pcie0_phy {
0252 status = "okay";
0253 };
0254
0255 &pcie1_phy {
0256 status = "okay";
0257 };
0258
0259 &pwm {
0260 pinctrl-names = "default";
0261 pinctrl-0 = <&pwm_pins_a>;
0262 status = "okay";
0263 };
0264
0265 &spi0 {
0266 pinctrl-names = "default";
0267 pinctrl-0 = <&spi0_pins_a>;
0268 status = "okay";
0269 };
0270
0271 &spi1 {
0272 pinctrl-names = "default";
0273 pinctrl-0 = <&spi1_pins_a>;
0274 status = "okay";
0275 };
0276
0277 &uart2 {
0278 pinctrl-names = "default";
0279 pinctrl-0 = <&uart2_pins_b>;
0280 status = "okay";
0281 };
0282
0283 &usb1 {
0284 vusb33-supply = <®_3p3v>;
0285 vbus-supply = <®_5v>;
0286 status = "okay";
0287 };
0288
0289 &u3phy1 {
0290 status = "okay";
0291 };