0001 // SPDX-License-Identifier: GPL-2.0-only
0002
0003 #include <dt-bindings/input/input.h>
0004
0005 / {
0006 cpus {
0007 cpu@0 {
0008 cpu0-supply = <&vcc>;
0009 };
0010 };
0011
0012 memory@80000000 {
0013 device_type = "memory";
0014 reg = <0x80000000 0>;
0015 };
0016
0017 wl12xx_vmmc: wl12xx_vmmc {
0018 compatible = "regulator-fixed";
0019 regulator-name = "vwl1271";
0020 regulator-min-microvolt = <1800000>;
0021 regulator-max-microvolt = <1800000>;
0022 gpio = <&gpio1 3 0>; /* gpio_3 */
0023 startup-delay-us = <70000>;
0024 enable-active-high;
0025 vin-supply = <&vaux3>;
0026 };
0027
0028 /* HS USB Host PHY on PORT 1 */
0029 hsusb2_phy: hsusb2_phy {
0030 pinctrl-names = "default";
0031 pinctrl-0 = <&hsusb2_reset_pin>;
0032 compatible = "usb-nop-xceiv";
0033 reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
0034 #phy-cells = <0>;
0035 };
0036
0037 /* fixed 26MHz oscillator */
0038 hfclk_26m: oscillator {
0039 #clock-cells = <0>;
0040 compatible = "fixed-clock";
0041 clock-frequency = <26000000>;
0042 };
0043 };
0044
0045 &gpmc {
0046 ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
0047
0048 nand@0,0 {
0049 compatible = "ti,omap2-nand";
0050 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
0051 interrupt-parent = <&gpmc>;
0052 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
0053 <1 IRQ_TYPE_NONE>; /* termcount */
0054 linux,mtd-name = "micron,mt29f4g16abbda3w";
0055 nand-bus-width = <16>;
0056 ti,nand-ecc-opt = "bch8";
0057 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
0058 gpmc,sync-clk-ps = <0>;
0059 gpmc,cs-on-ns = <0>;
0060 gpmc,cs-rd-off-ns = <44>;
0061 gpmc,cs-wr-off-ns = <44>;
0062 gpmc,adv-on-ns = <6>;
0063 gpmc,adv-rd-off-ns = <34>;
0064 gpmc,adv-wr-off-ns = <44>;
0065 gpmc,we-off-ns = <40>;
0066 gpmc,oe-off-ns = <54>;
0067 gpmc,access-ns = <64>;
0068 gpmc,rd-cycle-ns = <82>;
0069 gpmc,wr-cycle-ns = <82>;
0070 gpmc,wr-access-ns = <40>;
0071 gpmc,wr-data-mux-bus-ns = <0>;
0072 gpmc,device-width = <2>;
0073 #address-cells = <1>;
0074 #size-cells = <1>;
0075 };
0076 };
0077
0078 &i2c1 {
0079 pinctrl-names = "default";
0080 pinctrl-0 = <&i2c1_pins>;
0081 clock-frequency = <2600000>;
0082
0083 twl: twl@48 {
0084 reg = <0x48>;
0085 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
0086 interrupt-parent = <&intc>;
0087 clocks = <&hfclk_26m>;
0088 clock-names = "fck";
0089 twl_audio: audio {
0090 compatible = "ti,twl4030-audio";
0091 codec {
0092 ti,hs_extmute_gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
0093 };
0094 };
0095 };
0096 };
0097
0098 &i2c2 {
0099 pinctrl-names = "default";
0100 pinctrl-0 = <&i2c2_pins>;
0101 clock-frequency = <400000>;
0102 };
0103
0104 &i2c3 {
0105 pinctrl-names = "default";
0106 pinctrl-0 = <&i2c3_pins>;
0107 clock-frequency = <400000>;
0108
0109 touchscreen: tsc2004@48 {
0110 compatible = "ti,tsc2004";
0111 reg = <0x48>;
0112 vio-supply = <&vaux1>;
0113 pinctrl-names = "default";
0114 pinctrl-0 = <&tsc2004_pins>;
0115 interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
0116
0117 touchscreen-fuzz-x = <4>;
0118 touchscreen-fuzz-y = <7>;
0119 touchscreen-fuzz-pressure = <2>;
0120 touchscreen-size-x = <4096>;
0121 touchscreen-size-y = <4096>;
0122 touchscreen-max-pressure = <2048>;
0123
0124 ti,x-plate-ohms = <280>;
0125 ti,esd-recovery-timeout-ms = <8000>;
0126 };
0127 };
0128
0129 &mmc3 {
0130 interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
0131 pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
0132 pinctrl-names = "default";
0133 vmmc-supply = <&wl12xx_vmmc>;
0134 non-removable;
0135 bus-width = <4>;
0136 cap-power-off-card;
0137 #address-cells = <1>;
0138 #size-cells = <0>;
0139 wlcore: wlcore@2 {
0140 compatible = "ti,wl1273";
0141 reg = <2>;
0142 interrupt-parent = <&gpio1>;
0143 interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 2 */
0144 ref-clock-frequency = <26000000>;
0145 };
0146 };
0147
0148 &usbhshost {
0149 pinctrl-names = "default";
0150 pinctrl-0 = <&hsusb2_pins>;
0151 port2-mode = "ehci-phy";
0152 };
0153
0154 &usbhsehci {
0155 phys = <0 &hsusb2_phy>;
0156 };
0157
0158 &omap3_pmx_core {
0159
0160 mmc3_pins: pinmux_mm3_pins {
0161 pinctrl-single,pins = <
0162 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
0163 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
0164 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
0165 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
0166 OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
0167 OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
0168 >;
0169 };
0170 mcbsp2_pins: pinmux_mcbsp2_pins {
0171 pinctrl-single,pins = <
0172 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
0173 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
0174 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
0175 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
0176 >;
0177 };
0178 uart2_pins: pinmux_uart2_pins {
0179 pinctrl-single,pins = <
0180 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
0181 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
0182 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
0183 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
0184 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
0185 >;
0186 };
0187 mcspi1_pins: pinmux_mcspi1_pins {
0188 pinctrl-single,pins = <
0189 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
0190 OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
0191 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
0192 OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
0193 >;
0194 };
0195
0196 hsusb2_pins: pinmux_hsusb2_pins {
0197 pinctrl-single,pins = <
0198 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
0199 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
0200 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
0201 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
0202 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
0203 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
0204 >;
0205 };
0206
0207 hsusb_otg_pins: pinmux_hsusb_otg_pins {
0208 pinctrl-single,pins = <
0209 OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
0210 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
0211 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
0212 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
0213 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
0214 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
0215 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
0216 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
0217 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
0218 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
0219 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
0220 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
0221 >;
0222 };
0223
0224 i2c1_pins: pinmux_i2c1_pins {
0225 pinctrl-single,pins = <
0226 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
0227 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
0228 OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */
0229 >;
0230 };
0231
0232 i2c2_pins: pinmux_i2c2_pins {
0233 pinctrl-single,pins = <
0234 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
0235 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
0236 >;
0237 };
0238
0239 i2c3_pins: pinmux_i2c3_pins {
0240 pinctrl-single,pins = <
0241 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
0242 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
0243 >;
0244 };
0245
0246 tsc2004_pins: pinmux_tsc2004_pins {
0247 pinctrl-single,pins = <
0248 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4) /* mcbsp4_dr.gpio_153 */
0249 >;
0250 };
0251 };
0252
0253 &omap3_pmx_wkup {
0254
0255 hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
0256 pinctrl-single,pins = <
0257 OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
0258 >;
0259 };
0260 wl127x_gpio: pinmux_wl127x_gpio_pin {
0261 pinctrl-single,pins = <
0262 OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT | MUX_MODE4) /* sys_boot0.gpio_2 */
0263 OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
0264 >;
0265 };
0266 };
0267
0268 &uart2 {
0269 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
0270 pinctrl-names = "default";
0271 pinctrl-0 = <&uart2_pins>;
0272 };
0273
0274 &mcspi1 {
0275 pinctrl-names = "default";
0276 pinctrl-0 = <&mcspi1_pins>;
0277 };
0278
0279 #include "twl4030.dtsi"
0280 #include "twl4030_omap3.dtsi"
0281
0282 &vaux3 {
0283 regulator-min-microvolt = <2800000>;
0284 regulator-max-microvolt = <2800000>;
0285 };
0286
0287 &twl {
0288 twl_power: power {
0289 compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
0290 ti,use_poweroff;
0291 };
0292 };
0293
0294 &twl_gpio {
0295 ti,use-leds;
0296 };
