0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree file for LaCie 2Big NAS
0004 *
0005 * Copyright (C) 2015 Seagate
0006 *
0007 * Author: Simon Guinot <simon.guinot@sequanux.org>
0008 *
0009 */
0010
0011 /dts-v1/;
0012
0013 #include "kirkwood-netxbig.dtsi"
0014
0015 / {
0016 model = "LaCie 2Big NAS";
0017 compatible = "lacie,nas2big", "lacie,netxbig", "marvell,kirkwood-88f6282", "marvell,kirkwood";
0018
0019 memory {
0020 device_type = "memory";
0021 reg = <0x00000000 0x10000000>;
0022 };
0023
0024 chosen {
0025 bootargs = "console=ttyS0,115200n8";
0026 stdout-path = &uart0;
0027 };
0028
0029 ocp@f1000000 {
0030 rtc@10300 {
0031 /* The on-chip RTC is not powered (no supercap). */
0032 status = "disabled";
0033 };
0034 spi@10600 {
0035 /*
0036 * A NAND flash is used instead of an SPI flash for
0037 * the other netxbig-compatible boards.
0038 */
0039 status = "disabled";
0040 };
0041 };
0042
0043 fan {
0044 /*
0045 * An I2C fan controller (GMT G762) is used but alarm is
0046 * wired to a separate GPIO.
0047 */
0048 compatible = "gpio-fan";
0049 alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
0050 };
0051
0052 regulators: regulators {
0053 status = "okay";
0054 compatible = "simple-bus";
0055 #address-cells = <1>;
0056 #size-cells = <0>;
0057 pinctrl-names = "default";
0058
0059 regulator@2 {
0060 compatible = "regulator-fixed";
0061 reg = <2>;
0062 regulator-name = "hdd1power";
0063 regulator-min-microvolt = <5000000>;
0064 regulator-max-microvolt = <5000000>;
0065 enable-active-high;
0066 regulator-always-on;
0067 regulator-boot-on;
0068 gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
0069 };
0070 clocks {
0071 g762_clk: g762-oscillator {
0072 compatible = "fixed-clock";
0073 #clock-cells = <0>;
0074 clock-frequency = <32768>;
0075 };
0076 };
0077 };
0078 };
0079
0080 &mdio {
0081 status = "okay";
0082
0083 ethphy0: ethernet-phy@0 {
0084 reg = <0>;
0085 };
0086 };
0087
0088 &i2c0 {
0089 status = "okay";
0090
0091 /*
0092 * An external I2C RTC (Dallas DS1337S+) is used. This allows
0093 * to power-up the board on an RTC alarm. The external RTC can
0094 * be kept powered, even when the SoC is off.
0095 */
0096 rtc@68 {
0097 compatible = "dallas,ds1307";
0098 reg = <0x68>;
0099 interrupts = <43>;
0100 };
0101 g762@3e {
0102 compatible = "gmt,g762";
0103 reg = <0x3e>;
0104 clocks = <&g762_clk>;
0105 };
0106 };
0107
0108 &nand {
0109 chip-delay = <50>;
0110 status = "okay";
0111
0112 partition@0 {
0113 label = "U-Boot";
0114 reg = <0x0 0x100000>;
0115 };
0116
0117 partition@100000 {
0118 label = "uImage";
0119 reg = <0x100000 0x1000000>;
0120 };
0121
0122 partition@1100000 {
0123 label = "root";
0124 reg = <0x1100000 0x8000000>;
0125 };
0126
0127 partition@9100000 {
0128 label = "unused";
0129 reg = <0x9100000 0x6f00000>;
0130 };
0131 };
0132
0133 &pciec {
0134 status = "okay";
0135 };
0136
0137 &pcie0 {
0138 status = "okay";
0139 };
