0001 // SPDX-License-Identifier: GPL-2.0
0002 / {
0003 mbus@f1000000 {
0004 pciec: pcie@82000000 {
0005 compatible = "marvell,kirkwood-pcie";
0006 status = "disabled";
0007 device_type = "pci";
0008
0009 #address-cells = <3>;
0010 #size-cells = <2>;
0011
0012 bus-range = <0x00 0xff>;
0013
0014 ranges =
0015 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
0016 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
0017 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
0018 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
0019 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
0020 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
0021 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>;
0022
0023 pcie0: pcie@1,0 {
0024 device_type = "pci";
0025 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
0026 reg = <0x0800 0 0 0 0>;
0027 #address-cells = <3>;
0028 #size-cells = <2>;
0029 #interrupt-cells = <1>;
0030 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0031 0x81000000 0 0 0x81000000 0x1 0 1 0>;
0032 bus-range = <0x00 0xff>;
0033 interrupt-map-mask = <0 0 0 0>;
0034 interrupt-map = <0 0 0 0 &intc 9>;
0035 marvell,pcie-port = <0>;
0036 marvell,pcie-lane = <0>;
0037 clocks = <&gate_clk 2>;
0038 status = "disabled";
0039 };
0040
0041 pcie1: pcie@2,0 {
0042 device_type = "pci";
0043 assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
0044 reg = <0x1000 0 0 0 0>;
0045 #address-cells = <3>;
0046 #size-cells = <2>;
0047 #interrupt-cells = <1>;
0048 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0049 0x81000000 0 0 0x81000000 0x2 0 1 0>;
0050 bus-range = <0x00 0xff>;
0051 interrupt-map-mask = <0 0 0 0>;
0052 interrupt-map = <0 0 0 0 &intc 10>;
0053 marvell,pcie-port = <1>;
0054 marvell,pcie-lane = <0>;
0055 clocks = <&gate_clk 18>;
0056 status = "disabled";
0057 };
0058 };
0059 };
0060 ocp@f1000000 {
0061
0062 pinctrl: pin-controller@10000 {
0063 compatible = "marvell,88f6282-pinctrl";
0064
0065 pmx_sata0: pmx-sata0 {
0066 marvell,pins = "mpp5", "mpp21", "mpp23";
0067 marvell,function = "sata0";
0068 };
0069 pmx_sata1: pmx-sata1 {
0070 marvell,pins = "mpp4", "mpp20", "mpp22";
0071 marvell,function = "sata1";
0072 };
0073
0074 /*
0075 * Default I2C1 pinctrl setting on mpp36/mpp37,
0076 * overwrite marvell,pins on board level if required.
0077 */
0078 pmx_twsi1: pmx-twsi1 {
0079 marvell,pins = "mpp36", "mpp37";
0080 marvell,function = "twsi1";
0081 };
0082
0083 pmx_sdio: pmx-sdio {
0084 marvell,pins = "mpp12", "mpp13", "mpp14",
0085 "mpp15", "mpp16", "mpp17";
0086 marvell,function = "sdio";
0087 };
0088 };
0089
0090 thermal: thermal@10078 {
0091 compatible = "marvell,kirkwood-thermal";
0092 reg = <0x10078 0x4>;
0093 status = "okay";
0094 };
0095
0096 rtc: rtc@10300 {
0097 compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
0098 reg = <0x10300 0x20>;
0099 interrupts = <53>;
0100 clocks = <&gate_clk 7>;
0101 };
0102
0103 i2c1: i2c@11100 {
0104 compatible = "marvell,mv64xxx-i2c";
0105 reg = <0x11100 0x20>;
0106 #address-cells = <1>;
0107 #size-cells = <0>;
0108 interrupts = <32>;
0109 clock-frequency = <100000>;
0110 clocks = <&gate_clk 7>;
0111 pinctrl-0 = <&pmx_twsi1>;
0112 pinctrl-names = "default";
0113 status = "disabled";
0114 };
0115
0116 sata: sata@80000 {
0117 compatible = "marvell,orion-sata";
0118 reg = <0x80000 0x5000>;
0119 interrupts = <21>;
0120 clocks = <&gate_clk 14>, <&gate_clk 15>;
0121 clock-names = "0", "1";
0122 phys = <&sata_phy0>, <&sata_phy1>;
0123 phy-names = "port0", "port1";
0124 status = "disabled";
0125 };
0126
0127 sdio: mvsdio@90000 {
0128 compatible = "marvell,orion-sdio";
0129 reg = <0x90000 0x200>;
0130 interrupts = <28>;
0131 clocks = <&gate_clk 4>;
0132 pinctrl-0 = <&pmx_sdio>;
0133 pinctrl-names = "default";
0134 bus-width = <4>;
0135 cap-sdio-irq;
0136 cap-sd-highspeed;
0137 cap-mmc-highspeed;
0138 status = "disabled";
0139 };
0140 };
0141 };
