0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
0004 */
0005
0006 #include <dt-bindings/interrupt-controller/arm-gic.h>
0007 #include <dt-bindings/gpio/gpio.h>
0008
0009 / {
0010 compatible = "ti,keystone";
0011 model = "Texas Instruments Keystone 2 SoC";
0012 #address-cells = <2>;
0013 #size-cells = <2>;
0014 interrupt-parent = <&gic>;
0015
0016 aliases {
0017 serial0 = &uart0;
0018 spi0 = &spi0;
0019 spi1 = &spi1;
0020 spi2 = &spi2;
0021 };
0022
0023 chosen { };
0024
0025 memory: memory@80000000 {
0026 device_type = "memory";
0027 reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
0028 };
0029
0030 gic: interrupt-controller@2561000 {
0031 compatible = "arm,gic-400", "arm,cortex-a15-gic";
0032 #interrupt-cells = <3>;
0033 interrupt-controller;
0034 reg = <0x0 0x02561000 0x0 0x1000>,
0035 <0x0 0x02562000 0x0 0x2000>,
0036 <0x0 0x02564000 0x0 0x2000>,
0037 <0x0 0x02566000 0x0 0x2000>;
0038 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
0039 IRQ_TYPE_LEVEL_HIGH)>;
0040 };
0041
0042 timer {
0043 compatible = "arm,armv7-timer";
0044 interrupts =
0045 <GIC_PPI 13
0046 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
0047 <GIC_PPI 14
0048 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
0049 <GIC_PPI 11
0050 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
0051 <GIC_PPI 10
0052 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
0053 };
0054
0055 pmu {
0056 compatible = "arm,cortex-a15-pmu";
0057 interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
0058 <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
0059 <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
0060 <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
0061 };
0062
0063 psci {
0064 compatible = "arm,psci";
0065 method = "smc";
0066 cpu_suspend = <0x84000001>;
0067 cpu_off = <0x84000002>;
0068 cpu_on = <0x84000003>;
0069 };
0070
0071 soc0: soc@0 {
0072 #address-cells = <1>;
0073 #size-cells = <1>;
0074 compatible = "ti,keystone","simple-bus";
0075 interrupt-parent = <&gic>;
0076 ranges = <0x0 0x0 0x0 0xc0000000>;
0077 dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
0078
0079 pllctrl: pll-controller@2310000 {
0080 compatible = "ti,keystone-pllctrl", "syscon";
0081 reg = <0x02310000 0x200>;
0082 };
0083
0084 psc: power-sleep-controller@2350000 {
0085 compatible = "syscon", "simple-mfd";
0086 reg = <0x02350000 0x1000>;
0087 };
0088
0089 devctrl: device-state-control@2620000 {
0090 compatible = "ti,keystone-devctrl", "syscon", "simple-mfd";
0091 reg = <0x02620000 0x1000>;
0092 #address-cells = <1>;
0093 #size-cells = <1>;
0094 ranges = <0x0 0x02620000 0x1000>;
0095
0096 kirq0: keystone_irq@2a0 {
0097 compatible = "ti,keystone-irq";
0098 reg = <0x2a0 0x4>;
0099 interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
0100 interrupt-controller;
0101 #interrupt-cells = <1>;
0102 ti,syscon-dev = <&devctrl 0x2a0>;
0103 };
0104
0105 rstctrl: reset-controller@328 {
0106 compatible = "ti,keystone-reset";
0107 reg = <0x328 0x10>;
0108 ti,syscon-pll = <&pllctrl 0xe4>;
0109 ti,syscon-dev = <&devctrl 0x328>;
0110 ti,wdt-list = <0>;
0111 };
0112 };
0113
0114 /include/ "keystone-clocks.dtsi"
0115
0116 uart0: serial@2530c00 {
0117 compatible = "ti,da830-uart", "ns16550a";
0118 current-speed = <115200>;
0119 reg-shift = <2>;
0120 reg-io-width = <4>;
0121 reg = <0x02530c00 0x100>;
0122 clocks = <&clkuart0>;
0123 interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
0124 };
0125
0126 uart1: serial@2531000 {
0127 compatible = "ti,da830-uart", "ns16550a";
0128 current-speed = <115200>;
0129 reg-shift = <2>;
0130 reg-io-width = <4>;
0131 reg = <0x02531000 0x100>;
0132 clocks = <&clkuart1>;
0133 interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
0134 };
0135
0136 i2c0: i2c@2530000 {
0137 compatible = "ti,davinci-i2c";
0138 reg = <0x02530000 0x400>;
0139 clock-frequency = <100000>;
0140 clocks = <&clki2c>;
0141 interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
0142 #address-cells = <1>;
0143 #size-cells = <0>;
0144 };
0145
0146 i2c1: i2c@2530400 {
0147 compatible = "ti,davinci-i2c";
0148 reg = <0x02530400 0x400>;
0149 clock-frequency = <100000>;
0150 clocks = <&clki2c>;
0151 interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
0152 #address-cells = <1>;
0153 #size-cells = <0>;
0154 };
0155
0156 i2c2: i2c@2530800 {
0157 compatible = "ti,davinci-i2c";
0158 reg = <0x02530800 0x400>;
0159 clock-frequency = <100000>;
0160 clocks = <&clki2c>;
0161 interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
0162 #address-cells = <1>;
0163 #size-cells = <0>;
0164 };
0165
0166 spi0: spi@21000400 {
0167 compatible = "ti,keystone-spi", "ti,dm6441-spi";
0168 reg = <0x21000400 0x200>;
0169 num-cs = <4>;
0170 ti,davinci-spi-intr-line = <0>;
0171 interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
0172 clocks = <&clkspi>;
0173 #address-cells = <1>;
0174 #size-cells = <0>;
0175 };
0176
0177 spi1: spi@21000600 {
0178 compatible = "ti,keystone-spi", "ti,dm6441-spi";
0179 reg = <0x21000600 0x200>;
0180 num-cs = <4>;
0181 ti,davinci-spi-intr-line = <0>;
0182 interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
0183 clocks = <&clkspi>;
0184 #address-cells = <1>;
0185 #size-cells = <0>;
0186 };
0187
0188 spi2: spi@21000800 {
0189 compatible = "ti,keystone-spi", "ti,dm6441-spi";
0190 reg = <0x21000800 0x200>;
0191 num-cs = <4>;
0192 ti,davinci-spi-intr-line = <0>;
0193 interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
0194 clocks = <&clkspi>;
0195 #address-cells = <1>;
0196 #size-cells = <0>;
0197 };
0198
0199 usb_phy: usb_phy@2620738 {
0200 compatible = "ti,keystone-usbphy";
0201 #address-cells = <1>;
0202 #size-cells = <1>;
0203 reg = <0x2620738 24>;
0204 status = "disabled";
0205 };
0206
0207 keystone_usb0: usb@2680000 {
0208 compatible = "ti,keystone-dwc3";
0209 #address-cells = <1>;
0210 #size-cells = <1>;
0211 reg = <0x2680000 0x10000>;
0212 clocks = <&clkusb>;
0213 clock-names = "usb";
0214 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
0215 ranges;
0216 dma-coherent;
0217 dma-ranges;
0218 status = "disabled";
0219
0220 usb0: usb@2690000 {
0221 compatible = "snps,dwc3";
0222 reg = <0x2690000 0x70000>;
0223 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
0224 usb-phy = <&usb_phy>, <&usb_phy>;
0225 };
0226 };
0227
0228 wdt: wdt@22f0080 {
0229 compatible = "ti,keystone-wdt","ti,davinci-wdt";
0230 reg = <0x022f0080 0x80>;
0231 clocks = <&clkwdtimer0>;
0232 };
0233
0234 clock_event: timer@22f0000 {
0235 compatible = "ti,keystone-timer";
0236 reg = <0x022f0000 0x80>;
0237 interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
0238 clocks = <&clktimer15>;
0239 };
0240
0241 gpio0: gpio@260bf00 {
0242 compatible = "ti,keystone-gpio";
0243 reg = <0x0260bf00 0x100>;
0244 gpio-controller;
0245 #gpio-cells = <2>;
0246 /* HW Interrupts mapped to GPIO pins */
0247 interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
0248 <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
0249 <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
0250 <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
0251 <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
0252 <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
0253 <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
0254 <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
0255 <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
0256 <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
0257 <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
0258 <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
0259 <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
0260 <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
0261 <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
0262 <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
0263 <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
0264 <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
0265 <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
0266 <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
0267 <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
0268 <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
0269 <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
0270 <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
0271 <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
0272 <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
0273 <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
0274 <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
0275 <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
0276 <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
0277 <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
0278 <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
0279 clocks = <&clkgpio>;
0280 clock-names = "gpio";
0281 ti,ngpio = <32>;
0282 ti,davinci-gpio-unbanked = <32>;
0283 };
0284
0285 aemif: aemif@21000A00 {
0286 compatible = "ti,keystone-aemif", "ti,davinci-aemif";
0287 #address-cells = <2>;
0288 #size-cells = <1>;
0289 clocks = <&clkaemif>;
0290 clock-names = "aemif";
0291 clock-ranges;
0292
0293 reg = <0x21000A00 0x00000100>;
0294 ranges = <0 0 0x30000000 0x10000000
0295 1 0 0x21000A00 0x00000100>;
0296 };
0297
0298 pcie0: pcie@21800000 {
0299 compatible = "ti,keystone-pcie", "snps,dw-pcie";
0300 clocks = <&clkpcie>;
0301 clock-names = "pcie";
0302 #address-cells = <3>;
0303 #size-cells = <2>;
0304 reg = <0x21801000 0x2000>, <0x21800000 0x1000>, <0x02620128 4>;
0305 ranges = <0x82000000 0 0x50000000 0x50000000
0306 0 0x10000000>;
0307
0308 status = "disabled";
0309 device_type = "pci";
0310 num-lanes = <2>;
0311 bus-range = <0x00 0xff>;
0312
0313 /* error interrupt */
0314 interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
0315 #interrupt-cells = <1>;
0316 interrupt-map-mask = <0 0 0 7>;
0317 interrupt-map = <0 0 0 1 &pcie_intc0 0>, /* INT A */
0318 <0 0 0 2 &pcie_intc0 1>, /* INT B */
0319 <0 0 0 3 &pcie_intc0 2>, /* INT C */
0320 <0 0 0 4 &pcie_intc0 3>; /* INT D */
0321
0322 pcie_msi_intc0: msi-interrupt-controller {
0323 interrupt-controller;
0324 #interrupt-cells = <1>;
0325 interrupt-parent = <&gic>;
0326 interrupts = <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
0327 <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>,
0328 <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
0329 <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
0330 <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
0331 <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
0332 <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
0333 <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>;
0334 };
0335
0336 pcie_intc0: legacy-interrupt-controller {
0337 interrupt-controller;
0338 #interrupt-cells = <1>;
0339 interrupt-parent = <&gic>;
0340 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>,
0341 <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>,
0342 <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
0343 <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
0344 };
0345 };
0346
0347 emif: emif@21010000 {
0348 compatible = "ti,emif-keystone";
0349 reg = <0x21010000 0x200>;
0350 interrupts = <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>;
0351 interrupt-parent = <&gic>;
0352 };
0353 };
0354 };
