0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Keystone 2 Edison soc device tree
0004 *
0005 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
0006 */
0007
0008 #include <dt-bindings/reset/ti-syscon.h>
0009
0010 / {
0011 compatible = "ti,k2e", "ti,keystone";
0012 model = "Texas Instruments Keystone 2 Edison SoC";
0013
0014 cpus {
0015 #address-cells = <1>;
0016 #size-cells = <0>;
0017
0018 interrupt-parent = <&gic>;
0019
0020 cpu@0 {
0021 compatible = "arm,cortex-a15";
0022 device_type = "cpu";
0023 reg = <0>;
0024 };
0025
0026 cpu@1 {
0027 compatible = "arm,cortex-a15";
0028 device_type = "cpu";
0029 reg = <1>;
0030 };
0031
0032 cpu@2 {
0033 compatible = "arm,cortex-a15";
0034 device_type = "cpu";
0035 reg = <2>;
0036 };
0037
0038 cpu@3 {
0039 compatible = "arm,cortex-a15";
0040 device_type = "cpu";
0041 reg = <3>;
0042 };
0043 };
0044
0045 aliases {
0046 rproc0 = &dsp0;
0047 };
0048 };
0049
0050 &soc0 {
0051 /include/ "keystone-k2e-clocks.dtsi"
0052
0053 usb: usb@2680000 {
0054 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
0055 usb@2690000 {
0056 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
0057 };
0058 };
0059
0060 usb1_phy: usb_phy@2620750 {
0061 compatible = "ti,keystone-usbphy";
0062 #address-cells = <1>;
0063 #size-cells = <1>;
0064 reg = <0x2620750 24>;
0065 status = "disabled";
0066 };
0067
0068 keystone_usb1: usb@25000000 {
0069 compatible = "ti,keystone-dwc3";
0070 #address-cells = <1>;
0071 #size-cells = <1>;
0072 reg = <0x25000000 0x10000>;
0073 clocks = <&clkusb1>;
0074 clock-names = "usb";
0075 interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
0076 ranges;
0077 dma-coherent;
0078 dma-ranges;
0079 status = "disabled";
0080
0081 usb1: usb@25010000 {
0082 compatible = "snps,dwc3";
0083 reg = <0x25010000 0x70000>;
0084 interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
0085 usb-phy = <&usb1_phy>, <&usb1_phy>;
0086 };
0087 };
0088
0089 msm_ram: sram@c000000 {
0090 compatible = "mmio-sram";
0091 reg = <0x0c000000 0x200000>;
0092 ranges = <0x0 0x0c000000 0x200000>;
0093 #address-cells = <1>;
0094 #size-cells = <1>;
0095
0096 bm-sram@1f0000 {
0097 reg = <0x001f0000 0x8000>;
0098 };
0099 };
0100
0101 psc: power-sleep-controller@2350000 {
0102 pscrst: reset-controller {
0103 compatible = "ti,k2e-pscrst", "ti,syscon-reset";
0104 #reset-cells = <1>;
0105
0106 ti,reset-bits = <
0107 0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
0108 >;
0109 };
0110 };
0111
0112 devctrl: device-state-control@2620000 {
0113 dspgpio0: keystone_dsp_gpio@240 {
0114 compatible = "ti,keystone-dsp-gpio";
0115 reg = <0x240 0x4>;
0116 gpio-controller;
0117 #gpio-cells = <2>;
0118 gpio,syscon-dev = <&devctrl 0x240>;
0119 };
0120 };
0121
0122 dsp0: dsp@10800000 {
0123 compatible = "ti,k2e-dsp";
0124 reg = <0x10800000 0x00080000>,
0125 <0x10e00000 0x00008000>,
0126 <0x10f00000 0x00008000>;
0127 reg-names = "l2sram", "l1pram", "l1dram";
0128 clocks = <&clkgem0>;
0129 ti,syscon-dev = <&devctrl 0x844>;
0130 resets = <&pscrst 0>;
0131 interrupt-parent = <&kirq0>;
0132 interrupts = <0 8>;
0133 interrupt-names = "vring", "exception";
0134 kick-gpios = <&dspgpio0 27 0>;
0135 status = "disabled";
0136 };
0137
0138 pcie1: pcie@21020000 {
0139 compatible = "ti,keystone-pcie","snps,dw-pcie";
0140 clocks = <&clkpcie1>;
0141 clock-names = "pcie";
0142 #address-cells = <3>;
0143 #size-cells = <2>;
0144 reg = <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>;
0145 ranges = <0x82000000 0 0x60000000 0x60000000
0146 0 0x10000000>;
0147
0148 status = "disabled";
0149 device_type = "pci";
0150 num-lanes = <2>;
0151 bus-range = <0x00 0xff>;
0152
0153 /* error interrupt */
0154 interrupts = <GIC_SPI 385 IRQ_TYPE_EDGE_RISING>;
0155 #interrupt-cells = <1>;
0156 interrupt-map-mask = <0 0 0 7>;
0157 interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */
0158 <0 0 0 2 &pcie_intc1 1>, /* INT B */
0159 <0 0 0 3 &pcie_intc1 2>, /* INT C */
0160 <0 0 0 4 &pcie_intc1 3>; /* INT D */
0161
0162 pcie_msi_intc1: msi-interrupt-controller {
0163 interrupt-controller;
0164 #interrupt-cells = <1>;
0165 interrupt-parent = <&gic>;
0166 interrupts = <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>,
0167 <GIC_SPI 378 IRQ_TYPE_EDGE_RISING>,
0168 <GIC_SPI 379 IRQ_TYPE_EDGE_RISING>,
0169 <GIC_SPI 380 IRQ_TYPE_EDGE_RISING>,
0170 <GIC_SPI 381 IRQ_TYPE_EDGE_RISING>,
0171 <GIC_SPI 382 IRQ_TYPE_EDGE_RISING>,
0172 <GIC_SPI 383 IRQ_TYPE_EDGE_RISING>,
0173 <GIC_SPI 384 IRQ_TYPE_EDGE_RISING>;
0174 };
0175
0176 pcie_intc1: legacy-interrupt-controller {
0177 interrupt-controller;
0178 #interrupt-cells = <1>;
0179 interrupt-parent = <&gic>;
0180 interrupts = <GIC_SPI 373 IRQ_TYPE_EDGE_RISING>,
0181 <GIC_SPI 374 IRQ_TYPE_EDGE_RISING>,
0182 <GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
0183 <GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
0184 };
0185 };
0186
0187 mdio: mdio@24200f00 {
0188 compatible = "ti,keystone_mdio", "ti,davinci_mdio";
0189 #address-cells = <1>;
0190 #size-cells = <0>;
0191 reg = <0x24200f00 0x100>;
0192 status = "disabled";
0193 clocks = <&clkcpgmac>;
0194 clock-names = "fck";
0195 bus_freq = <2500000>;
0196 };
0197 /include/ "keystone-k2e-netcp.dtsi"
0198 };
