0001 // SPDX-License-Identifier: ISC
0002 /*
0003 * Device Tree file for the Linksys WRV54G router
0004 * Also known as Gemtek GTWX5715
0005 * Based on a board file by George T. Joseph and other patches.
0006 * This machine is based on IXP425.
0007 */
0008
0009 /dts-v1/;
0010
0011 #include "intel-ixp42x.dtsi"
0012 #include <dt-bindings/input/input.h>
0013
0014 / {
0015 model = "Linksys WRV54G / Gemtek GTWX5715";
0016 compatible = "linksys,wrv54g", "gemtek,gtwx5715", "intel,ixp42x";
0017 #address-cells = <1>;
0018 #size-cells = <1>;
0019
0020 memory@0 {
0021 /* 32 MB memory */
0022 device_type = "memory";
0023 reg = <0x00000000 0x2000000>;
0024 };
0025
0026 chosen {
0027 bootargs = "console=ttyS0,115200n8";
0028 stdout-path = "uart1:115200n8";
0029 };
0030
0031 aliases {
0032 /* UART2 is the primary console */
0033 serial0 = &uart1;
0034 serial1 = &uart0;
0035 };
0036
0037 /* There is an unpopulated LED slot (3) connected to GPIO 8 */
0038 leds {
0039 compatible = "gpio-leds";
0040 led-power {
0041 label = "wrv54g:yellow:power";
0042 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
0043 default-state = "on";
0044 linux,default-trigger = "heartbeat";
0045 };
0046 led-wireless {
0047 label = "wrv54g:yellow:wireless";
0048 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
0049 default-state = "on";
0050 };
0051 led-internet {
0052 label = "wrv54g:yellow:internet";
0053 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
0054 default-state = "on";
0055 };
0056 led-dmz {
0057 label = "wrv54g:green:dmz";
0058 gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
0059 default-state = "on";
0060 };
0061 };
0062
0063 /* This set-up comes from an OpenWrt patch */
0064 spi {
0065 compatible = "spi-gpio";
0066 #address-cells = <1>;
0067 #size-cells = <0>;
0068
0069 sck-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
0070 miso-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
0071 mosi-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
0072 cs-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
0073 num-chipselects = <1>;
0074
0075 switch@0 {
0076 compatible = "micrel,ks8995";
0077 reg = <0>;
0078 spi-max-frequency = <50000000>;
0079 };
0080 };
0081
0082 soc {
0083 bus@c4000000 {
0084 flash@0,0 {
0085 compatible = "intel,ixp4xx-flash", "cfi-flash";
0086 bank-width = <2>;
0087 /* Enable writes on the expansion bus */
0088 intel,ixp4xx-eb-write-enable = <1>;
0089 /* 8 MB of Flash mapped in at CS0 */
0090 reg = <0 0x00000000 0x00800000>;
0091
0092 partitions {
0093 compatible = "fixed-partitions";
0094 /*
0095 * Partition info from a boot log
0096 * CHECKME: not using redboot? FIS index 0x3f @7e00000?
0097 */
0098 #address-cells = <1>;
0099 #size-cells = <1>;
0100 partition@0 {
0101 label = "boot";
0102 reg = <0x0 0x140000>;
0103 read-only;
0104 };
0105 partition@140000 {
0106 label = "linux";
0107 reg = <0x140000 0x100000>;
0108 read-only;
0109 };
0110 partition@240000 {
0111 label = "root";
0112 reg = <0x240000 0x480000>;
0113 read-write;
0114 };
0115 };
0116 };
0117 };
0118
0119 pci@c0000000 {
0120 status = "ok";
0121
0122 /*
0123 * We have up to 2 slots (IDSEL) with 2 swizzled IRQs.
0124 * Derived from the GTWX5715 PCI boardfile.
0125 */
0126 #interrupt-cells = <1>;
0127 interrupt-map-mask = <0xf800 0 0 7>;
0128 interrupt-map =
0129 /* IDSEL 0 */
0130 <0x0000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 0 is irq 10 */
0131 <0x0000 0 0 2 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 0 is irq 11 */
0132 /* IDSEL 1 */
0133 <0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */
0134 <0x0800 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>; /* INT B on slot 1 is irq 10 */
0135 };
0136
0137 /*
0138 * EthB - connected to the KS8995 switch ports 1-4
0139 * FIXME: the boardfile defines .phy_mask = 0x1e for this port to enable output to
0140 * all four switch ports, also using an out of tree multiphy patch.
0141 * Do we need a new binding and property for this?
0142 */
0143 ethernet@c8009000 {
0144 status = "ok";
0145 queue-rx = <&qmgr 3>;
0146 queue-txready = <&qmgr 20>;
0147 phy-mode = "rgmii";
0148 phy-handle = <&phy4>;
0149
0150 mdio {
0151 #address-cells = <1>;
0152 #size-cells = <0>;
0153
0154 /* Should be ports 1-4 on the KS8995 switch */
0155 phy4: ethernet-phy@4 {
0156 reg = <4>;
0157 };
0158
0159 /* Should be port 5 on the KS8995 switch */
0160 phy5: ethernet-phy@5 {
0161 reg = <5>;
0162 };
0163 };
0164 };
0165
0166 /* EthC - connected to KS8995 switch port 5 */
0167 ethernet@c800a000 {
0168 status = "ok";
0169 queue-rx = <&qmgr 4>;
0170 queue-txready = <&qmgr 21>;
0171 phy-mode = "rgmii";
0172 phy-handle = <&phy5>;
0173 };
0174 };
0175 };
