0001 // SPDX-License-Identifier: ISC
0002 /*
0003 * Device Tree file for Linksys NSLU2
0004 */
0005
0006 /dts-v1/;
0007
0008 #include "intel-ixp42x.dtsi"
0009 #include <dt-bindings/input/input.h>
0010
0011 / {
0012 model = "Linksys NSLU2 (Network Storage Link for USB 2.0 Disk Drives)";
0013 compatible = "linksys,nslu2", "intel,ixp42x";
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016
0017 memory@0 {
0018 /* 32 MB SDRAM */
0019 device_type = "memory";
0020 reg = <0x00000000 0x2000000>;
0021 };
0022
0023 chosen {
0024 bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
0025 stdout-path = "uart0:115200n8";
0026 };
0027
0028 aliases {
0029 serial0 = &uart0;
0030 };
0031
0032 leds {
0033 compatible = "gpio-leds";
0034 led-status {
0035 label = "nslu2:red:status";
0036 gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
0037 default-state = "on";
0038 linux,default-trigger = "heartbeat";
0039 };
0040 led-ready {
0041 label = "nslu2:green:ready";
0042 gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
0043 default-state = "on";
0044 };
0045 led-disk-1 {
0046 label = "nslu2:green:disk-1";
0047 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
0048 default-state = "off";
0049 };
0050 led-disk-2 {
0051 label = "nslu2:green:disk-2";
0052 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
0053 default-state = "off";
0054 };
0055 };
0056
0057 gpio_keys {
0058 compatible = "gpio-keys";
0059
0060 button-power {
0061 wakeup-source;
0062 linux,code = <KEY_POWER>;
0063 label = "power";
0064 gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
0065 };
0066 button-reset {
0067 wakeup-source;
0068 linux,code = <KEY_ESC>;
0069 label = "reset";
0070 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
0071 };
0072 };
0073
0074 i2c {
0075 compatible = "i2c-gpio";
0076 sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
0077 scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
0078 #address-cells = <1>;
0079 #size-cells = <0>;
0080
0081 rtc@6f {
0082 compatible = "xicor,x1205";
0083 reg = <0x6f>;
0084 };
0085 };
0086
0087 gpio-poweroff {
0088 compatible = "gpio-poweroff";
0089 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
0090 timeout-ms = <5000>;
0091 };
0092
0093 gpio-beeper {
0094 compatible = "gpio-beeper";
0095 gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
0096 };
0097
0098 soc {
0099 bus@c4000000 {
0100 /* The first 16MB region at CS0 on the expansion bus */
0101 flash@0,0 {
0102 compatible = "intel,ixp4xx-flash", "cfi-flash";
0103 bank-width = <2>;
0104 /*
0105 * 8 MB of Flash in 0x20000 byte blocks
0106 * mapped in at CS0.
0107 */
0108 reg = <0 0x00000000 0x800000>;
0109
0110 partitions {
0111 compatible = "redboot-fis";
0112 /* Eraseblock at 0x7e0000 */
0113 fis-index-block = <0x3f>;
0114 };
0115 };
0116 };
0117
0118 pci@c0000000 {
0119 status = "ok";
0120
0121 /*
0122 * Taken from NSLU2 PCI boardfile, INT A, B, C swizzled D constant
0123 * We have slots (IDSEL) 1, 2 and 3.
0124 */
0125 #interrupt-cells = <1>;
0126 interrupt-map-mask = <0xf800 0 0 7>;
0127 interrupt-map =
0128 /* IDSEL 1 */
0129 <0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */
0130 <0x0800 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 10 */
0131 <0x0800 0 0 3 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 9 */
0132 <0x0800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 8 */
0133 /* IDSEL 2 */
0134 <0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */
0135 <0x1000 0 0 2 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 9 */
0136 <0x1000 0 0 3 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 11 */
0137 <0x1000 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 2 is irq 8 */
0138 /* IDSEL 3 */
0139 <0x1800 0 0 1 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 3 is irq 9 */
0140 <0x1800 0 0 2 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 3 is irq 11 */
0141 <0x1800 0 0 3 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 3 is irq 10 */
0142 <0x1800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 3 is irq 8 */
0143 };
0144
0145 ethernet@c8009000 {
0146 status = "ok";
0147 queue-rx = <&qmgr 3>;
0148 queue-txready = <&qmgr 20>;
0149 phy-mode = "rgmii";
0150 phy-handle = <&phy1>;
0151
0152 mdio {
0153 #address-cells = <1>;
0154 #size-cells = <0>;
0155
0156 phy1: ethernet-phy@1 {
0157 reg = <1>;
0158 };
0159 };
0160 };
0161 };
0162 };
