0001 // SPDX-License-Identifier: ISC
0002 /*
0003 * Device Tree file for the Intel IXDPG425 reference design.
0004 * Derived from boardfiles written by MontaVista software.
0005 * Ethernet set-up from OpenWrt.
0006 *
0007 * The device has 4 x FXS RJ11 ports for analog phones for
0008 * internet telephony. (Not supported yet.)
0009 *
0010 * The device has 9 status LEDs we do not support yet.
0011 *
0012 * This device is very similar to ADI engingeering Coyote.
0013 */
0014
0015 /dts-v1/;
0016
0017 #include "intel-ixp42x.dtsi"
0018 #include <dt-bindings/input/input.h>
0019
0020 / {
0021 model = "Intel IXDPG425 reference design";
0022 compatible = "intel,ixdpg425", "intel,ixp42x";
0023 #address-cells = <1>;
0024 #size-cells = <1>;
0025
0026 memory@0 {
0027 /* 32 MB SDRAM */
0028 device_type = "memory";
0029 reg = <0x00000000 0x02000000>;
0030 };
0031
0032 chosen {
0033 bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootwait";
0034 stdout-path = "uart0:115200n8";
0035 };
0036
0037 aliases {
0038 serial0 = &uart0;
0039 };
0040
0041 soc {
0042 bus@c4000000 {
0043 flash@0,0 {
0044 compatible = "intel,ixp4xx-flash", "cfi-flash";
0045 bank-width = <2>;
0046 /*
0047 * CHECKME: the product brief says 16MB in a flash
0048 * socket.
0049 */
0050 reg = <0 0x00000000 0x1000000>;
0051
0052 /* Configure expansion bus to allow writes */
0053 intel,ixp4xx-eb-write-enable = <1>;
0054
0055 partitions {
0056 compatible = "redboot-fis";
0057 /* CHECKME: guess this is Redboot FIS */
0058 fis-index-block = <0x7f>;
0059 };
0060 };
0061 };
0062
0063 pci@c0000000 {
0064 status = "ok";
0065
0066 /*
0067 * Taken from IXDPG425 PCI boardfile.
0068 * We have slots (IDSEL) 12, 13 and 14 with one assigned IRQ
0069 * for 12 & 13 and one for 14.
0070 */
0071 #interrupt-cells = <1>;
0072 interrupt-map-mask = <0xf800 0 0 7>;
0073 interrupt-map =
0074 /* IDSEL 12 */
0075 <0x6000 0 0 1 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 12 is irq 7 */
0076 <0x6000 0 0 2 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 12 is irq 7 */
0077 <0x6000 0 0 3 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 12 is irq 7 */
0078 <0x6000 0 0 4 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 12 is irq 7 */
0079 /* IDSEL 13 */
0080 <0x6800 0 0 1 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 13 is irq 7 */
0081 <0x6800 0 0 2 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 13 is irq 7 */
0082 <0x6800 0 0 3 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 13 is irq 7 */
0083 <0x6800 0 0 4 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 13 is irq 7 */
0084 /* IDSEL 14 */
0085 <0x7000 0 0 1 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 14 is irq 6 */
0086 <0x7000 0 0 2 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 14 is irq 6 */
0087 <0x7000 0 0 3 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 14 is irq 6 */
0088 <0x7000 0 0 4 &gpio0 6 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 14 is irq 6 */
0089 };
0090
0091 /*
0092 * CHECKME: this ethernet setup seems dubious. Photos of the board shows some kind
0093 * of Realtek DSA switch on the board.
0094 */
0095
0096 /* EthB */
0097 ethernet@c8009000 {
0098 status = "ok";
0099 queue-rx = <&qmgr 3>;
0100 queue-txready = <&qmgr 20>;
0101 phy-mode = "rgmii";
0102 phy-handle = <&phy5>;
0103
0104 mdio {
0105 #address-cells = <1>;
0106 #size-cells = <0>;
0107
0108 phy4: ethernet-phy@4 {
0109 reg = <4>;
0110 };
0111
0112 phy5: ethernet-phy@5 {
0113 reg = <5>;
0114 };
0115 };
0116 };
0117
0118 /* EthC */
0119 ethernet@c800a000 {
0120 status = "ok";
0121 queue-rx = <&qmgr 4>;
0122 queue-txready = <&qmgr 21>;
0123 phy-mode = "rgmii";
0124 phy-handle = <&phy4>;
0125 };
0126 };
0127 };
