Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: ISC
0002 /*
0003  * Device Tree file for Gateway 7001 AP based on IXP422
0004  * Derived from boardfiles written by Imre Kaloz
0005  */
0006 
0007 /dts-v1/;
0008 
0009 #include "intel-ixp42x.dtsi"
0010 #include <dt-bindings/input/input.h>
0011 
0012 / {
0013         model = "Gateway 7001 AP";
0014         compatible = "gateway,7001", "intel,ixp42x";
0015         #address-cells = <1>;
0016         #size-cells = <1>;
0017 
0018         memory@0 {
0019                 /* 32 MB SDRAM */
0020                 device_type = "memory";
0021                 reg = <0x00000000 0x2000000>;
0022         };
0023 
0024         chosen {
0025                 bootargs = "console=ttyS0,115200n8";
0026                 stdout-path = "uart1:115200n8";
0027         };
0028 
0029         aliases {
0030                 /* second UART is the primary console */
0031                 serial0 = &uart1;
0032         };
0033 
0034         soc {
0035                 bus@c4000000 {
0036                         flash@0,0 {
0037                                 compatible = "intel,ixp4xx-flash", "cfi-flash";
0038                                 bank-width = <2>;
0039                                 /*
0040                                  * 8 MB of flash
0041                                  */
0042                                 reg = <0 0x00000000 0x800000>;
0043 
0044                                 /* Configure expansion bus to allow writes */
0045                                 intel,ixp4xx-eb-write-enable = <1>;
0046 
0047                                 partitions {
0048                                         compatible = "redboot-fis";
0049                                         /* Eraseblock at 0x7e0000 */
0050                                         fis-index-block = <0x3f>;
0051                                 };
0052                         };
0053                 };
0054 
0055                 pci@c0000000 {
0056                         status = "ok";
0057 
0058                         /*
0059                          * Taken from Gateway 7001 PCI boardfile (gateway7001-pci.c)
0060                          * We have slots (IDSEL) 1 and 2 with one assigned IRQ
0061                          * each handling all IRQs.
0062                          */
0063                         interrupt-map =
0064                         /* IDSEL 1 */
0065                         <0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */
0066                         <0x0800 0 0 2 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 11 */
0067                         <0x0800 0 0 3 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 11 */
0068                         <0x0800 0 0 4 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 11 */
0069                         /* IDSEL 2 */
0070                         <0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */
0071                         <0x1000 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 10 */
0072                         <0x1000 0 0 3 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 10 */
0073                         <0x1000 0 0 4 &gpio0 10 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 2 is irq 10 */
0074                 };
0075 
0076                 ethernet@c8009000 {
0077                         status = "ok";
0078                         queue-rx = <&qmgr 3>;
0079                         queue-txready = <&qmgr 20>;
0080                         phy-mode = "rgmii";
0081                         phy-handle = <&phy1>;
0082 
0083                         mdio {
0084                                 #address-cells = <1>;
0085                                 #size-cells = <0>;
0086 
0087                                 phy1: ethernet-phy@1 {
0088                                         reg = <1>;
0089                                 };
0090                         };
0091                 };
0092 
0093                 ethernet@c800a000 {
0094                         status = "ok";
0095                         queue-rx = <&qmgr 4>;
0096                         queue-txready = <&qmgr 21>;
0097                         phy-mode = "rgmii";
0098                         phy-handle = <&phy2>;
0099 
0100                         mdio {
0101                                 #address-cells = <1>;
0102                                 #size-cells = <0>;
0103 
0104                                 phy2: ethernet-phy@2 {
0105                                         reg = <2>;
0106                                 };
0107                         };
0108                 };
0109         };
0110 };