0001 // SPDX-License-Identifier: ISC
0002 /*
0003 * Device Tree file for the Arcom/Eurotech Vulcan board.
0004 * This board is a single board computer in the PC/104 form factor based on
0005 * IXP425, and was released around 2005. It previously had the name "Mercury".
0006 */
0007
0008 /dts-v1/;
0009
0010 #include "intel-ixp42x.dtsi"
0011 #include <dt-bindings/input/input.h>
0012
0013 / {
0014 model = "Arcom/Eurotech Vulcan";
0015 compatible = "arcom,vulcan", "intel,ixp42x";
0016 #address-cells = <1>;
0017 #size-cells = <1>;
0018
0019 memory@0 {
0020 device_type = "memory";
0021 reg = <0x00000000 0x4000000>;
0022 };
0023
0024 chosen {
0025 /* CHECKME: using a harddrive at /dev/sda1 as rootfs by default */
0026 bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootfstype=ext4 rootwait";
0027 stdout-path = "uart0:115200n8";
0028 };
0029
0030 aliases {
0031 serial0 = &uart0;
0032 };
0033
0034 onewire {
0035 compatible = "w1-gpio";
0036 gpios = <&gpio0 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
0037 };
0038
0039 soc {
0040 bus@c4000000 {
0041 flash@0,0 {
0042 compatible = "intel,ixp4xx-flash", "cfi-flash";
0043 bank-width = <2>;
0044 /*
0045 * 32 MB of Flash in 0x20000 byte blocks
0046 * mapped in at CS0 and CS1.
0047 *
0048 * The documentation mentions the existence
0049 * of a 16MB version, which we conveniently
0050 * ignore. Shout if you own one!
0051 */
0052 reg = <0 0x00000000 0x2000000>;
0053
0054 /* Expansion bus settings */
0055 intel,ixp4xx-eb-t3 = <3>;
0056 intel,ixp4xx-eb-byte-access-on-halfword = <1>;
0057 intel,ixp4xx-eb-write-enable = <1>;
0058
0059 partitions {
0060 compatible = "redboot-fis";
0061 fis-index-block = <0x1ff>;
0062 };
0063 };
0064 sram@2,0 {
0065 /* 256 KB SDRAM memory at CS2 */
0066 compatible = "shared-dma-pool";
0067 device_type = "memory";
0068 reg = <2 0x00000000 0x40000>;
0069 no-map;
0070 /* Expansion bus settings */
0071 intel,ixp4xx-eb-t3 = <1>;
0072 intel,ixp4xx-eb-t4 = <2>;
0073 intel,ixp4xx-eb-ahb-split-transfers = <1>;
0074 intel,ixp4xx-eb-write-enable = <1>;
0075 intel,ixp4xx-eb-byte-access = <1>;
0076 };
0077 serial@3,0 {
0078 /*
0079 * 8250-compatible Exar XR16L2551 2 x UART
0080 *
0081 * CHECKME: if special tweaks are needed, then fix the
0082 * operating system to handle it.
0083 */
0084 compatible = "exar,xr16l2551", "ns8250";
0085 reg = <3 0x00000000 0x10>;
0086 interrupt-parent = <&gpio0>;
0087 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
0088 clock-frequency = <1843200>;
0089 /* Expansion bus settings */
0090 intel,ixp4xx-eb-t3 = <3>;
0091 intel,ixp4xx-eb-cycle-type = <1>; /* Motorola cycles */
0092 intel,ixp4xx-eb-write-enable = <1>;
0093 intel,ixp4xx-eb-byte-access = <1>;
0094 };
0095 gpio1: gpio@4,0 {
0096 /*
0097 * MMIO GPIO in one byte
0098 */
0099 compatible = "arcom,vulcan-gpio";
0100 reg = <4 0x00000000 0x1>;
0101 /* Expansion bus settings */
0102 intel,ixp4xx-eb-write-enable = <1>;
0103 intel,ixp4xx-eb-byte-access = <1>;
0104 };
0105 watchdog@5,0 {
0106 compatible = "maxim,max6369";
0107 reg = <5 0x00000000 0x1>;
0108 /* Expansion bus settings */
0109 intel,ixp4xx-eb-write-enable = <1>;
0110 intel,ixp4xx-eb-byte-access = <1>;
0111 };
0112 };
0113
0114 pci@c0000000 {
0115 status = "ok";
0116
0117 /*
0118 * Taken from Vulcan PCI boardfile.
0119 *
0120 * We have 2 slots (IDSEL) 1 and 2 with one dedicated interrupt
0121 * per slot. This interrupt is shared (OR:ed) by all four pins.
0122 */
0123 #interrupt-cells = <1>;
0124 interrupt-map-mask = <0xf800 0 0 7>;
0125 interrupt-map =
0126 /* IDSEL 1 */
0127 <0x0800 0 0 1 &gpio0 2 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 2 */
0128 <0x0800 0 0 2 &gpio0 2 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 2 */
0129 <0x0800 0 0 3 &gpio0 2 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 2 */
0130 <0x0800 0 0 4 &gpio0 2 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 2 */
0131 /* IDSEL 2 */
0132 <0x1000 0 0 1 &gpio0 3 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 3 */
0133 <0x1000 0 0 2 &gpio0 3 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 3 */
0134 <0x1000 0 0 3 &gpio0 3 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 3 */
0135 <0x1000 0 0 4 &gpio0 3 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 2 is irq 3 */
0136 };
0137
0138 /* EthB */
0139 ethernet@c8009000 {
0140 status = "ok";
0141 queue-rx = <&qmgr 3>;
0142 queue-txready = <&qmgr 20>;
0143 phy-mode = "rgmii";
0144 phy-handle = <&phy0>;
0145
0146 mdio {
0147 #address-cells = <1>;
0148 #size-cells = <0>;
0149
0150 phy0: ethernet-phy@0 {
0151 reg = <0>;
0152 };
0153
0154 phy1: ethernet-phy@1 {
0155 reg = <1>;
0156 };
0157 };
0158 };
0159
0160 /* EthC */
0161 ethernet@c800a000 {
0162 status = "ok";
0163 queue-rx = <&qmgr 4>;
0164 queue-txready = <&qmgr 21>;
0165 phy-mode = "rgmii";
0166 phy-handle = <&phy1>;
0167 };
0168 };
0169 };
