0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree for the ARM Integrator/AP platform
0004 * with the IM-PD1 example logical module mounted.
0005 */
0006
0007 #include "integratorap.dts"
0008
0009 / {
0010 model = "ARM Integrator/AP with IM-PD1";
0011 compatible = "arm,integrator-ap";
0012
0013 reserved-memory {
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016 ranges;
0017
0018 impd1_ram: vram@c2000000 {
0019 /* 1 MB of designated video RAM on the IM-PD1 */
0020 compatible = "shared-dma-pool";
0021 reg = <0xc2000000 0x00100000>;
0022 no-map;
0023 };
0024 };
0025 };
0026
0027 &lm0 {
0028 syscon@0 {
0029 compatible = "arm,im-pd1-syscon", "syscon";
0030 reg = <0x00000000 0x1000>;
0031 ranges;
0032 #address-cells = <1>;
0033 #size-cells = <1>;
0034
0035 vco1: clock-controller@0 {
0036 compatible = "arm,impd1-vco1";
0037 reg = <0x00 0x04>;
0038 #clock-cells = <0>;
0039 lock-offset = <0x08>;
0040 vco-offset = <0x00>;
0041 clocks = <&sysclk>;
0042 clock-output-names = "IM-PD1-VCO1";
0043 };
0044
0045 vco2: clock-controller@4 {
0046 compatible = "arm,impd1-vco2";
0047 reg = <0x04 0x04>;
0048 #clock-cells = <0>;
0049 lock-offset = <0x08>;
0050 vco-offset = <0x04>;
0051 clocks = <&sysclk>;
0052 clock-output-names = "IM-PD1-VCO2";
0053 };
0054 };
0055
0056 /* Also used for the Smart Card Interface SCI */
0057 impd1_uartclk: clock@1_4 {
0058 compatible = "fixed-factor-clock";
0059 #clock-cells = <0>;
0060 clock-div = <4>;
0061 clock-mult = <1>;
0062 clocks = <&vco2>;
0063 clock-output-names = "VCO2_DIV4";
0064 };
0065
0066 /* For the SSP the clock is divided by 64 */
0067 impd1_sspclk: clock@1_64 {
0068 compatible = "fixed-factor-clock";
0069 #clock-cells = <0>;
0070 clock-div = <64>;
0071 clock-mult = <1>;
0072 clocks = <&vco2>;
0073 clock-output-names = "VCO2_DIV64";
0074 };
0075
0076 /* Fixed regulator for the MMC */
0077 impd1_3v3: regulator {
0078 compatible = "regulator-fixed";
0079 regulator-name = "3V3";
0080 regulator-min-microvolt = <3300000>;
0081 regulator-max-microvolt = <3300000>;
0082 regulator-always-on;
0083 };
0084
0085 /* Push buttons on the IM-PD1 */
0086 gpio_keys {
0087 compatible = "gpio-keys";
0088 #address-cells = <1>;
0089 #size-cells = <0>;
0090
0091 button@0 {
0092 debounce-interval = <50>;
0093 linux,code = <KEY_UP>;
0094 label = "UP";
0095 gpios = <&impd1_gpio1 0 GPIO_ACTIVE_HIGH>;
0096 };
0097 button@1 {
0098 debounce-interval = <50>;
0099 linux,code = <KEY_DOWN>;
0100 label = "DOWN";
0101 gpios = <&impd1_gpio1 1 GPIO_ACTIVE_HIGH>;
0102 };
0103 button@2 {
0104 debounce-interval = <50>;
0105 linux,code = <KEY_LEFT>;
0106 label = "LEFT";
0107 gpios = <&impd1_gpio1 2 GPIO_ACTIVE_HIGH>;
0108 };
0109 button@3 {
0110 debounce-interval = <50>;
0111 linux,code = <KEY_RIGHT>;
0112 label = "UP";
0113 gpios = <&impd1_gpio1 3 GPIO_ACTIVE_HIGH>;
0114 };
0115 button@4 {
0116 debounce-interval = <50>;
0117 linux,code = <KEY_ESC>;
0118 label = "ESC";
0119 gpios = <&impd1_gpio1 4 GPIO_ACTIVE_HIGH>;
0120 };
0121 button@5 {
0122 debounce-interval = <50>;
0123 linux,code = <KEY_ENTER>;
0124 label = "ENTER";
0125 gpios = <&impd1_gpio1 5 GPIO_ACTIVE_HIGH>;
0126 };
0127 };
0128
0129
0130 bridge {
0131 compatible = "ti,ths8134b", "ti,ths8134";
0132 #address-cells = <1>;
0133 #size-cells = <0>;
0134
0135 ports {
0136 #address-cells = <1>;
0137 #size-cells = <0>;
0138 port@0 {
0139 reg = <0>;
0140 vga_bridge_in: endpoint {
0141 remote-endpoint = <&clcd_pads_vga_dac>;
0142 };
0143 };
0144
0145 port@1 {
0146 reg = <1>;
0147
0148 vga_bridge_out: endpoint {
0149 remote-endpoint = <&vga_con_in>;
0150 };
0151 };
0152 };
0153 };
0154
0155 vga {
0156 compatible = "vga-connector";
0157
0158 port {
0159 vga_con_in: endpoint {
0160 remote-endpoint = <&vga_bridge_out>;
0161 };
0162 };
0163 };
0164
0165 uart@100000 {
0166 compatible = "arm,pl011", "arm,primecell";
0167 reg = <0x00100000 0x1000>;
0168 interrupts-extended = <&impd1_vic 1>;
0169 clocks = <&impd1_uartclk>, <&sysclk>;
0170 clock-names = "uartclk", "apb_pclk";
0171 };
0172
0173 uart@200000 {
0174 compatible = "arm,pl011", "arm,primecell";
0175 reg = <0x00200000 0x1000>;
0176 interrupts-extended = <&impd1_vic 2>;
0177 clocks = <&impd1_uartclk>, <&sysclk>;
0178 clock-names = "uartclk", "apb_pclk";
0179 };
0180
0181 spi@300000 {
0182 compatible = "arm,pl022", "arm,primecell";
0183 reg = <0x00300000 0x1000>;
0184 interrupts-extended = <&impd1_vic 3>;
0185 clocks = <&impd1_sspclk>, <&sysclk>;
0186 clock-names = "sspclk", "apb_pclk";
0187 };
0188
0189 impd1_gpio0: gpio@400000 {
0190 compatible = "arm,pl061", "arm,primecell";
0191 reg = <0x00400000 0x1000>;
0192 gpio-controller;
0193 #gpio-cells = <2>;
0194 interrupt-controller;
0195 #interrupt-cells = <2>;
0196 interrupts-extended = <&impd1_vic 4>;
0197 clocks = <&sysclk>;
0198 clock-names = "apb_pclk";
0199 };
0200
0201 impd1_gpio1: gpio@500000 {
0202 compatible = "arm,pl061", "arm,primecell";
0203 reg = <0x00500000 0x1000>;
0204 gpio-controller;
0205 #gpio-cells = <2>;
0206 interrupt-controller;
0207 #interrupt-cells = <2>;
0208 interrupts-extended = <&impd1_vic 5>;
0209 clocks = <&sysclk>;
0210 clock-names = "apb_pclk";
0211 };
0212
0213 rtc@600000 {
0214 compatible = "arm,pl030", "arm,primecell";
0215 reg = <0x00600000 0x1000>;
0216 interrupts-extended = <&impd1_vic 6>;
0217 clocks = <&sysclk>;
0218 clock-names = "apb_pclk";
0219 };
0220
0221 mmc@700000 {
0222 compatible = "arm,pl181", "arm,primecell";
0223 reg = <0x00700000 0x1000>;
0224 interrupts-extended = <&impd1_vic 7>,
0225 <&impd1_vic 8>;
0226 clocks = <&sysclk>, <&sysclk>;
0227 clock-names = "mclk", "apb_pclk";
0228 bus-width = <1>;
0229 max-frequency = <515633>;
0230 vmmc-supply = <&impd1_3v3>;
0231 wp-gpios = <&impd1_gpio0 3 GPIO_ACTIVE_HIGH>;
0232 cd-gpios = <&impd1_gpio0 4 GPIO_ACTIVE_LOW>;
0233 };
0234
0235 aaci@800000 {
0236 compatible = "arm,pl041", "arm,primecell";
0237 reg = <0x00800000 0x1000>;
0238 interrupts-extended = <&impd1_vic 9>;
0239 clocks = <&sysclk>;
0240 clock-names = "apb_pclk";
0241 };
0242
0243 display@1000000 {
0244 compatible = "arm,pl110", "arm,primecell";
0245 reg = <0x01000000 0x1000>;
0246 interrupts-extended = <&impd1_vic 11>;
0247 clocks = <&vco1>, <&sysclk>;
0248 clock-names = "clcdclk", "apb_pclk";
0249 /* 640x480 16bpp @ 25.175MHz is 36827428 bytes/s */
0250 max-memory-bandwidth = <40000000>;
0251 memory-region = <&impd1_ram>;
0252 dma-ranges;
0253
0254 port@0 {
0255 #address-cells = <1>;
0256 #size-cells = <0>;
0257
0258 clcd_pads_vga_dac: endpoint@0 {
0259 reg = <0>;
0260 remote-endpoint = <&vga_bridge_in>;
0261 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
0262 };
0263 };
0264 };
0265
0266 impd1_vic: interrupt-controller@3000000 {
0267 compatible = "arm,pl192-vic";
0268 interrupt-controller;
0269 #interrupt-cells = <1>;
0270 reg = <0x03000000 0x1000>;
0271 /* Valid interrupts, 0-9 and 11 */
0272 valid-mask = <0x00000bff>;
0273 /* LM site 0 has IRQ 9 on the PIC */
0274 interrupts-extended = <&pic 9>;
0275 };
0276 };
