0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003 * Device tree file for ZII's RPU2 board
0004 *
0005 * RPU - Remote Peripheral Unit
0006 *
0007 * Copyright (C) 2019 Zodiac Inflight Innovations
0008 */
0009
0010 /dts-v1/;
0011 #include <dt-bindings/thermal/thermal.h>
0012 #include "imx7d.dtsi"
0013
0014 / {
0015 model = "ZII RPU2 Board";
0016 compatible = "zii,imx7d-rpu2", "fsl,imx7d";
0017
0018 chosen {
0019 stdout-path = &uart2;
0020 };
0021
0022 cs2000_ref: oscillator {
0023 compatible = "fixed-clock";
0024 #clock-cells = <0>;
0025 clock-frequency = <24576000>;
0026 };
0027
0028 cs2000_in_dummy: dummy-oscillator {
0029 compatible = "fixed-clock";
0030 #clock-cells = <0>;
0031 clock-frequency = <0>;
0032 };
0033
0034 gpio-leds {
0035 compatible = "gpio-leds";
0036 pinctrl-0 = <&pinctrl_leds_debug>;
0037 pinctrl-names = "default";
0038
0039 debug {
0040 label = "zii:green:debug1";
0041 gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
0042 linux,default-trigger = "heartbeat";
0043 };
0044 };
0045
0046 iio-hwmon {
0047 compatible = "iio-hwmon";
0048 io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
0049 <&adc2 1>;
0050 };
0051
0052 reg_can1_stby: regulator-can1-stby {
0053 compatible = "regulator-fixed";
0054 pinctrl-names = "default";
0055 pinctrl-0 = <&pinctrl_flexcan1_stby>;
0056 regulator-name = "can1-3v3";
0057 regulator-min-microvolt = <3300000>;
0058 regulator-max-microvolt = <3300000>;
0059 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
0060 enable-active-high;
0061 };
0062
0063 reg_can2_stby: regulator-can2-stby {
0064 compatible = "regulator-fixed";
0065 pinctrl-names = "default";
0066 pinctrl-0 = <&pinctrl_flexcan2_stby>;
0067 regulator-name = "can2-3v3";
0068 regulator-min-microvolt = <3300000>;
0069 regulator-max-microvolt = <3300000>;
0070 gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
0071 enable-active-high;
0072 };
0073
0074 reg_vref_1v8: regulator-vref-1v8 {
0075 compatible = "regulator-fixed";
0076 regulator-name = "vref-1v8";
0077 regulator-min-microvolt = <1800000>;
0078 regulator-max-microvolt = <1800000>;
0079 regulator-always-on;
0080 };
0081
0082 reg_3p3v: regulator-3p3v {
0083 compatible = "regulator-fixed";
0084 regulator-name = "GEN_3V3";
0085 regulator-min-microvolt = <3300000>;
0086 regulator-max-microvolt = <3300000>;
0087 regulator-always-on;
0088 };
0089
0090 reg_5p0v_main: regulator-5p0v-main {
0091 compatible = "regulator-fixed";
0092 regulator-name = "5V_MAIN";
0093 regulator-min-microvolt = <5000000>;
0094 regulator-max-microvolt = <5000000>;
0095 regulator-always-on;
0096 };
0097
0098 sound1 {
0099 compatible = "simple-audio-card";
0100 simple-audio-card,name = "Audio Output 1";
0101 simple-audio-card,format = "i2s";
0102 simple-audio-card,bitclock-master = <&sound1_codec>;
0103 simple-audio-card,frame-master = <&sound1_codec>;
0104 simple-audio-card,widgets =
0105 "Headphone", "Headphone Jack";
0106 simple-audio-card,routing =
0107 "Headphone Jack", "HPLEFT",
0108 "Headphone Jack", "HPRIGHT",
0109 "LEFTIN", "HPL",
0110 "RIGHTIN", "HPR";
0111 simple-audio-card,aux-devs = <&hpa1>;
0112
0113 simple-audio-card,cpu {
0114 sound-dai = <&sai1>;
0115 };
0116
0117 sound1_codec: simple-audio-card,codec {
0118 sound-dai = <&codec1>;
0119 clocks = <&cs2000>;
0120 };
0121 };
0122
0123 sound2 {
0124 compatible = "simple-audio-card";
0125 simple-audio-card,name = "Audio Output 2";
0126 simple-audio-card,format = "i2s";
0127 simple-audio-card,bitclock-master = <&sound2_codec>;
0128 simple-audio-card,frame-master = <&sound2_codec>;
0129 simple-audio-card,widgets =
0130 "Headphone", "Headphone Jack";
0131 simple-audio-card,routing =
0132 "Headphone Jack", "HPLEFT",
0133 "Headphone Jack", "HPRIGHT",
0134 "LEFTIN", "HPL",
0135 "RIGHTIN", "HPR";
0136 simple-audio-card,aux-devs = <&hpa2>;
0137
0138 simple-audio-card,cpu {
0139 sound-dai = <&sai2>;
0140 };
0141
0142 sound2_codec: simple-audio-card,codec {
0143 sound-dai = <&codec2>;
0144 clocks = <&cs2000>;
0145 };
0146 };
0147
0148 sound3 {
0149 compatible = "simple-audio-card";
0150 simple-audio-card,name = "Audio Output 3";
0151 simple-audio-card,format = "i2s";
0152 simple-audio-card,bitclock-master = <&sound3_codec>;
0153 simple-audio-card,frame-master = <&sound3_codec>;
0154 simple-audio-card,widgets =
0155 "Headphone", "Headphone Jack";
0156 simple-audio-card,routing =
0157 "Headphone Jack", "HPLEFT",
0158 "Headphone Jack", "HPRIGHT",
0159 "LEFTIN", "HPL",
0160 "RIGHTIN", "HPR";
0161 simple-audio-card,aux-devs = <&hpa3>;
0162
0163 simple-audio-card,cpu {
0164 sound-dai = <&sai3>;
0165 };
0166
0167 sound3_codec: simple-audio-card,codec {
0168 sound-dai = <&codec3>;
0169 clocks = <&cs2000>;
0170 };
0171 };
0172 };
0173
0174 &adc1 {
0175 vref-supply = <®_vref_1v8>;
0176 status = "okay";
0177 };
0178
0179 &adc2 {
0180 vref-supply = <®_vref_1v8>;
0181 status = "okay";
0182 };
0183
0184 &cpu0 {
0185 cpu-supply = <&sw1a_reg>;
0186 };
0187
0188 &clks {
0189 assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
0190 assigned-clock-rates = <884736000>;
0191 };
0192
0193 &ecspi1 {
0194 pinctrl-names = "default";
0195 pinctrl-0 = <&pinctrl_ecspi1>;
0196 cs-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
0197 status = "okay";
0198
0199 flash@0 {
0200 compatible = "jedec,spi-nor";
0201 spi-max-frequency = <20000000>;
0202 reg = <0>;
0203 #address-cells = <1>;
0204 #size-cells = <1>;
0205 };
0206 };
0207
0208 &fec1 {
0209 pinctrl-names = "default";
0210 pinctrl-0 = <&pinctrl_enet1>;
0211 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
0212 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
0213 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
0214 assigned-clock-rates = <0>, <100000000>;
0215 phy-mode = "rgmii";
0216 status = "okay";
0217
0218 fixed-link {
0219 speed = <1000>;
0220 full-duplex;
0221 };
0222
0223 mdio1: mdio {
0224 #address-cells = <1>;
0225 #size-cells = <0>;
0226 status = "okay";
0227
0228 switch: switch@0 {
0229 compatible = "marvell,mv88e6085";
0230 pinctrl-names = "default";
0231 pinctrl-0 = <&pinctrl_switch>;
0232 reg = <0>;
0233 eeprom-length = <512>;
0234 interrupt-parent = <&gpio1>;
0235 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
0236 interrupt-controller;
0237 #interrupt-cells = <2>;
0238
0239 ports {
0240 #address-cells = <1>;
0241 #size-cells = <0>;
0242
0243 port@0 {
0244 reg = <0>;
0245 label = "eth_cu_1000_1";
0246 };
0247
0248 port@1 {
0249 reg = <1>;
0250 label = "eth_cu_1000_2";
0251 };
0252
0253 port@2 {
0254 reg = <2>;
0255 label = "pic";
0256
0257 fixed-link {
0258 speed = <100>;
0259 full-duplex;
0260 };
0261 };
0262
0263 port@5 {
0264 reg = <5>;
0265 label = "cpu";
0266 ethernet = <&fec1>;
0267 phy-mode = "rgmii-id";
0268
0269 fixed-link {
0270 speed = <1000>;
0271 full-duplex;
0272 };
0273 };
0274
0275 port@6 {
0276 reg = <6>;
0277 label = "gigabit_proc";
0278 ethernet = <&fec2>;
0279 phy-mode = "rgmii-id";
0280
0281 fixed-link {
0282 speed = <1000>;
0283 full-duplex;
0284 };
0285 };
0286 };
0287 };
0288 };
0289 };
0290
0291 &fec2 {
0292 pinctrl-names = "default";
0293 pinctrl-0 = <&pinctrl_enet2>;
0294 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
0295 <&clks IMX7D_ENET2_TIME_ROOT_CLK>;
0296 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
0297 assigned-clock-rates = <0>, <100000000>;
0298 phy-mode = "rgmii";
0299 fsl,magic-packet;
0300 status = "okay";
0301
0302 fixed-link {
0303 speed = <1000>;
0304 full-duplex;
0305 };
0306 };
0307
0308 &flexcan1 {
0309 pinctrl-names = "default";
0310 pinctrl-0 = <&pinctrl_flexcan1>;
0311 xceiver-supply = <®_can1_stby>;
0312 status = "okay";
0313 };
0314
0315 &flexcan2 {
0316 pinctrl-names = "default";
0317 pinctrl-0 = <&pinctrl_flexcan2>;
0318 xceiver-supply = <®_can2_stby>;
0319 status = "okay";
0320 };
0321
0322 &gpio1 {
0323 pinctrl-names = "default";
0324 pinctrl-0 = <&pinctrl_gpio1>;
0325
0326 gpio-line-names = "", "", "", "", "", "", "", "",
0327 "", "",
0328 "usb_1_en_b",
0329 "usb_2_en_b",
0330 "", "", "", "", "", "", "", "",
0331 "", "", "", "", "", "", "", "",
0332 "", "", "", "";
0333 };
0334
0335 &gpio2 {
0336 pinctrl-names = "default";
0337 pinctrl-0 = <&pinctrl_gpio2>;
0338
0339 gpio-line-names = "12v_out_en_1",
0340 "12v_out_en_2",
0341 "12v_out_en_3",
0342 "28v_out_en_5",
0343 "28v_out_en_1",
0344 "28v_out_en_2",
0345 "28v_out_en_3",
0346 "28v_out_en_4",
0347 "", "",
0348 "usb_3_en_b",
0349 "usb_4_en_b",
0350 "", "", "", "", "", "", "", "",
0351 "", "", "", "", "", "", "", "",
0352 "", "", "", "";
0353 };
0354
0355 &i2c1 {
0356 clock-frequency = <100000>;
0357 pinctrl-names = "default";
0358 pinctrl-0 = <&pinctrl_i2c1>;
0359 status = "okay";
0360
0361 pmic: pmic@8 {
0362 compatible = "fsl,pfuze3000";
0363 reg = <0x08>;
0364
0365 regulators {
0366 sw1a_reg: sw1a {
0367 regulator-min-microvolt = <700000>;
0368 regulator-max-microvolt = <3300000>;
0369 regulator-boot-on;
0370 regulator-always-on;
0371 regulator-ramp-delay = <6250>;
0372 };
0373
0374 sw1c_reg: sw1b {
0375 regulator-min-microvolt = <700000>;
0376 regulator-max-microvolt = <1475000>;
0377 regulator-boot-on;
0378 regulator-always-on;
0379 regulator-ramp-delay = <6250>;
0380 };
0381
0382 sw2_reg: sw2 {
0383 regulator-min-microvolt = <1500000>;
0384 regulator-max-microvolt = <1850000>;
0385 regulator-boot-on;
0386 regulator-always-on;
0387 };
0388
0389 sw3a_reg: sw3 {
0390 regulator-min-microvolt = <900000>;
0391 regulator-max-microvolt = <1650000>;
0392 regulator-boot-on;
0393 regulator-always-on;
0394 };
0395
0396 swbst_reg: swbst {
0397 regulator-min-microvolt = <5000000>;
0398 regulator-max-microvolt = <5150000>;
0399 };
0400
0401 snvs_reg: vsnvs {
0402 regulator-min-microvolt = <1000000>;
0403 regulator-max-microvolt = <3000000>;
0404 regulator-boot-on;
0405 regulator-always-on;
0406 };
0407
0408 vref_reg: vrefddr {
0409 regulator-boot-on;
0410 regulator-always-on;
0411 };
0412
0413 vgen1_reg: vldo1 {
0414 regulator-min-microvolt = <1800000>;
0415 regulator-max-microvolt = <3300000>;
0416 regulator-always-on;
0417 };
0418
0419 vgen2_reg: vldo2 {
0420 regulator-min-microvolt = <800000>;
0421 regulator-max-microvolt = <1550000>;
0422 regulator-always-on;
0423 };
0424
0425 vgen3_reg: vccsd {
0426 regulator-min-microvolt = <2850000>;
0427 regulator-max-microvolt = <3300000>;
0428 regulator-always-on;
0429 };
0430
0431 vgen4_reg: v33 {
0432 regulator-min-microvolt = <2850000>;
0433 regulator-max-microvolt = <3300000>;
0434 regulator-always-on;
0435 };
0436
0437 vgen5_reg: vldo3 {
0438 regulator-min-microvolt = <1800000>;
0439 regulator-max-microvolt = <3300000>;
0440 regulator-always-on;
0441 };
0442
0443 vgen6_reg: vldo4 {
0444 regulator-min-microvolt = <1800000>;
0445 regulator-max-microvolt = <3300000>;
0446 regulator-always-on;
0447 };
0448 };
0449 };
0450
0451 cs2000: clkgen@4e {
0452 compatible = "cirrus,cs2000-cp";
0453 reg = <0x4e>;
0454 #clock-cells = <0>;
0455 clock-names = "clk_in", "ref_clk";
0456 clocks = <&cs2000_in_dummy>, <&cs2000_ref>;
0457 assigned-clocks = <&cs2000>;
0458 assigned-clock-rates = <24000000>;
0459 };
0460
0461 eeprom@50 {
0462 compatible = "atmel,24c04";
0463 reg = <0x50>;
0464 };
0465
0466 eeprom@52 {
0467 compatible = "atmel,24c04";
0468 reg = <0x52>;
0469 };
0470 };
0471
0472 &i2c2 {
0473 clock-frequency = <100000>;
0474 pinctrl-names = "default";
0475 pinctrl-0 = <&pinctrl_i2c2>;
0476 status = "okay";
0477
0478 codec2: codec@18 {
0479 compatible = "ti,tlv320dac3100";
0480 pinctrl-names = "default";
0481 pinctrl-0 = <&pinctrl_codec2>;
0482 reg = <0x18>;
0483 #sound-dai-cells = <0>;
0484 HPVDD-supply = <®_3p3v>;
0485 SPRVDD-supply = <®_3p3v>;
0486 SPLVDD-supply = <®_3p3v>;
0487 AVDD-supply = <®_3p3v>;
0488 IOVDD-supply = <®_3p3v>;
0489 DVDD-supply = <&vgen4_reg>;
0490 gpio-reset = <&gpio1 6 GPIO_ACTIVE_LOW>;
0491 };
0492
0493 hpa2: amp@60 {
0494 compatible = "ti,tpa6130a2";
0495 pinctrl-names = "default";
0496 pinctrl-0 = <&pinctrl_tpa2>;
0497 reg = <0x60>;
0498 power-gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>;
0499 Vdd-supply = <®_5p0v_main>;
0500 };
0501 };
0502
0503 &i2c3 {
0504 clock-frequency = <100000>;
0505 pinctrl-names = "default";
0506 pinctrl-0 = <&pinctrl_i2c3>;
0507 status = "okay";
0508
0509 codec3: codec@18 {
0510 compatible = "ti,tlv320dac3100";
0511 pinctrl-names = "default";
0512 pinctrl-0 = <&pinctrl_codec3>;
0513 reg = <0x18>;
0514 #sound-dai-cells = <0>;
0515 HPVDD-supply = <®_3p3v>;
0516 SPRVDD-supply = <®_3p3v>;
0517 SPLVDD-supply = <®_3p3v>;
0518 AVDD-supply = <®_3p3v>;
0519 IOVDD-supply = <®_3p3v>;
0520 DVDD-supply = <&vgen4_reg>;
0521 gpio-reset = <&gpio1 7 GPIO_ACTIVE_LOW>;
0522 };
0523
0524 hpa3: amp@60 {
0525 compatible = "ti,tpa6130a2";
0526 pinctrl-names = "default";
0527 pinctrl-0 = <&pinctrl_tpa3>;
0528 reg = <0x60>;
0529 power-gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>;
0530 Vdd-supply = <®_5p0v_main>;
0531 };
0532 };
0533
0534 &i2c4 {
0535 clock-frequency = <100000>;
0536 pinctrl-names = "default";
0537 pinctrl-0 = <&pinctrl_i2c4>;
0538 status = "okay";
0539
0540 codec1: codec@18 {
0541 compatible = "ti,tlv320dac3100";
0542 pinctrl-names = "default";
0543 pinctrl-0 = <&pinctrl_codec1>;
0544 reg = <0x18>;
0545 #sound-dai-cells = <0>;
0546 HPVDD-supply = <®_3p3v>;
0547 SPRVDD-supply = <®_3p3v>;
0548 SPLVDD-supply = <®_3p3v>;
0549 AVDD-supply = <®_3p3v>;
0550 IOVDD-supply = <®_3p3v>;
0551 DVDD-supply = <&vgen4_reg>;
0552 gpio-reset = <&gpio1 5 GPIO_ACTIVE_LOW>;
0553 };
0554
0555 hpa1: amp@60 {
0556 compatible = "ti,tpa6130a2";
0557 pinctrl-names = "default";
0558 pinctrl-0 = <&pinctrl_tpa1>;
0559 reg = <0x60>;
0560 power-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
0561 Vdd-supply = <®_5p0v_main>;
0562 };
0563 };
0564
0565 &sai1 {
0566 pinctrl-names = "default";
0567 pinctrl-0 = <&pinctrl_sai1>;
0568 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
0569 <&clks IMX7D_SAI1_ROOT_CLK>;
0570 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
0571 assigned-clock-rates = <0>, <36864000>;
0572 status = "okay";
0573 };
0574
0575 &sai2 {
0576 pinctrl-names = "default";
0577 pinctrl-0 = <&pinctrl_sai2>;
0578 assigned-clocks = <&clks IMX7D_SAI2_ROOT_SRC>,
0579 <&clks IMX7D_SAI2_ROOT_CLK>;
0580 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
0581 assigned-clock-rates = <0>, <36864000>;
0582 status = "okay";
0583 };
0584
0585 &sai3 {
0586 pinctrl-names = "default";
0587 pinctrl-0 = <&pinctrl_sai3>;
0588 assigned-clocks = <&clks IMX7D_SAI3_ROOT_SRC>,
0589 <&clks IMX7D_SAI3_ROOT_CLK>;
0590 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
0591 assigned-clock-rates = <0>, <36864000>;
0592 status = "okay";
0593 };
0594
0595 &uart2 {
0596 pinctrl-names = "default";
0597 pinctrl-0 = <&pinctrl_uart2>;
0598 assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
0599 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
0600 status = "okay";
0601 };
0602
0603 &uart4 {
0604 pinctrl-names = "default";
0605 pinctrl-0 = <&pinctrl_uart4>;
0606 assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
0607 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
0608 status = "okay";
0609
0610 rave-sp {
0611 compatible = "zii,rave-sp-rdu2";
0612 current-speed = <1000000>;
0613 #address-cells = <1>;
0614 #size-cells = <1>;
0615
0616 watchdog {
0617 compatible = "zii,rave-sp-watchdog";
0618 };
0619
0620 eeprom@a3 {
0621 compatible = "zii,rave-sp-eeprom";
0622 reg = <0xa3 0x4000>;
0623 #address-cells = <1>;
0624 #size-cells = <1>;
0625 zii,eeprom-name = "main-eeprom";
0626 };
0627 };
0628 };
0629
0630 &usbotg1 {
0631 dr_mode = "host";
0632 disable-over-current;
0633 status = "okay";
0634 };
0635
0636 &usbotg2 {
0637 dr_mode = "host";
0638 disable-over-current;
0639 status = "okay";
0640 };
0641
0642 &usdhc1 {
0643 pinctrl-names = "default";
0644 pinctrl-0 = <&pinctrl_usdhc1>;
0645 bus-width = <4>;
0646 no-1-8-v;
0647 no-sdio;
0648 keep-power-in-suspend;
0649 status = "okay";
0650 };
0651
0652 &usdhc3 {
0653 pinctrl-names = "default";
0654 pinctrl-0 = <&pinctrl_usdhc3>;
0655 bus-width = <8>;
0656 no-1-8-v;
0657 non-removable;
0658 no-sdio;
0659 no-sd;
0660 keep-power-in-suspend;
0661 status = "okay";
0662 };
0663
0664 &wdog1 {
0665 status = "disabled";
0666 };
0667
0668 &snvs_rtc {
0669 status = "disabled";
0670 };
0671
0672 &iomuxc {
0673 pinctrl_ecspi1: ecspi1grp {
0674 fsl,pins = <
0675 MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x2
0676 MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x2
0677 MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x2
0678 MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x59
0679 >;
0680 };
0681
0682 pinctrl_enet1: enet1grp {
0683 fsl,pins = <
0684 MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3
0685 MX7D_PAD_SD2_WP__ENET1_MDC 0x3
0686 MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1
0687 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1
0688 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1
0689 MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1
0690 MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1
0691 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
0692 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1
0693 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1
0694 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1
0695 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1
0696 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1
0697 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
0698 >;
0699 };
0700
0701 pinctrl_enet2: enet2grp {
0702 fsl,pins = <
0703 MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC 0x1
0704 MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x1
0705 MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x1
0706 MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 0x1
0707 MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 0x1
0708 MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x1
0709 MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC 0x1
0710 MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x1
0711 MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x1
0712 MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 0x1
0713 MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 0x1
0714 MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1
0715 MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT 0x1
0716 >;
0717 };
0718
0719 pinctrl_flexcan1: flexcan1grp {
0720 fsl,pins = <
0721 MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x59
0722 MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x59
0723 >;
0724 };
0725
0726 pinctrl_flexcan1_stby: flexcan1stbygrp {
0727 fsl,pins = <
0728 MX7D_PAD_GPIO1_IO08__GPIO1_IO8 0x59
0729 >;
0730 };
0731
0732 pinctrl_flexcan2: flexcan2grp {
0733 fsl,pins = <
0734 MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x59
0735 MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x59
0736 >;
0737 };
0738
0739 pinctrl_flexcan2_stby: flexcan2stbygrp {
0740 fsl,pins = <
0741 MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59
0742 >;
0743 };
0744
0745 pinctrl_gpio1: gpio1grp {
0746 fsl,pins = <
0747 MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x00
0748 MX7D_PAD_GPIO1_IO11__GPIO1_IO11 0x00
0749 >;
0750 };
0751
0752 pinctrl_gpio2: gpio2grp {
0753 fsl,pins = <
0754 MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x00
0755 MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x00
0756 MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x00
0757 MX7D_PAD_EPDC_DATA03__GPIO2_IO3 0x03
0758 MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x03
0759 MX7D_PAD_EPDC_DATA05__GPIO2_IO5 0x03
0760 MX7D_PAD_EPDC_DATA06__GPIO2_IO6 0x03
0761 MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x03
0762 MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x00
0763 MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x00
0764 >;
0765 };
0766
0767 pinctrl_i2c1: i2c1grp {
0768 fsl,pins = <
0769 MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
0770 MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
0771 >;
0772 };
0773
0774 pinctrl_i2c2: i2c2grp {
0775 fsl,pins = <
0776 MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
0777 MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
0778 >;
0779 };
0780
0781 pinctrl_i2c3: i2c3grp {
0782 fsl,pins = <
0783 MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f
0784 MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f
0785 >;
0786 };
0787
0788 pinctrl_i2c3_gpio: i2c3gpiogrp {
0789 fsl,pins = <
0790 MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x4000007f
0791 MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x4000007f
0792 >;
0793 };
0794
0795 pinctrl_i2c4: i2c4grp {
0796 fsl,pins = <
0797 MX7D_PAD_I2C4_SDA__I2C4_SDA 0x4000007f
0798 MX7D_PAD_I2C4_SCL__I2C4_SCL 0x4000007f
0799 >;
0800 };
0801
0802 pinctrl_i2c4_gpio: i2c4gpiogrp {
0803 fsl,pins = <
0804 MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x4000007f
0805 MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x4000007f
0806 >;
0807 };
0808
0809 pinctrl_leds_debug: debuggrp {
0810 fsl,pins = <
0811 MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x59
0812 >;
0813 };
0814
0815 pinctrl_sai1: sai1grp {
0816 fsl,pins = <
0817 MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1f
0818 MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f
0819 MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x30
0820 >;
0821 };
0822
0823 pinctrl_sai2: sai2grp {
0824 fsl,pins = <
0825 MX7D_PAD_SAI2_TX_BCLK__SAI2_TX_BCLK 0x1f
0826 MX7D_PAD_SAI2_TX_SYNC__SAI2_TX_SYNC 0x1f
0827 MX7D_PAD_SAI2_TX_DATA__SAI2_TX_DATA0 0x30
0828 >;
0829 };
0830
0831 pinctrl_sai3: sai3grp {
0832 fsl,pins = <
0833 MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK 0x1f
0834 MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC 0x1f
0835 MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0 0x30
0836 >;
0837 };
0838
0839 pinctrl_tpa1: tpa6130-1grp {
0840 fsl,pins = <
0841 MX7D_PAD_LCD_DATA21__GPIO3_IO26 0x40000038
0842 >;
0843 };
0844
0845 pinctrl_tpa2: tpa6130-2grp {
0846 fsl,pins = <
0847 MX7D_PAD_LCD_DATA22__GPIO3_IO27 0x40000038
0848 >;
0849 };
0850
0851 pinctrl_tpa3: tpa6130-3grp {
0852 fsl,pins = <
0853 MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x40000038
0854 >;
0855 };
0856
0857 pinctrl_uart2: uart2grp {
0858 fsl,pins = <
0859 MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX 0x79
0860 MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX 0x79
0861 >;
0862 };
0863
0864 pinctrl_uart4: uart4grp {
0865 fsl,pins = <
0866 MX7D_PAD_SD2_DATA0__UART4_DCE_RX 0x79
0867 MX7D_PAD_SD2_DATA1__UART4_DCE_TX 0x79
0868 >;
0869 };
0870
0871 pinctrl_usdhc1: usdhc1grp {
0872 fsl,pins = <
0873 MX7D_PAD_SD1_CMD__SD1_CMD 0x59
0874 MX7D_PAD_SD1_CLK__SD1_CLK 0x19
0875 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
0876 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
0877 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
0878 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
0879 >;
0880 };
0881
0882 pinctrl_usdhc3: usdhc3grp {
0883 fsl,pins = <
0884 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
0885 MX7D_PAD_SD3_CLK__SD3_CLK 0x19
0886 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
0887 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
0888 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
0889 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
0890 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
0891 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
0892 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
0893 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
0894 MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x59
0895 >;
0896 };
0897 };
0898
0899 &iomuxc_lpsr {
0900 pinctrl_codec1: dac1grp {
0901 fsl,pins = <
0902 MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x40000038
0903 >;
0904 };
0905
0906 pinctrl_codec2: dac2grp {
0907 fsl,pins = <
0908 MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x40000038
0909 >;
0910 };
0911
0912 pinctrl_codec3: dac3grp {
0913 fsl,pins = <
0914 MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x40000038
0915 >;
0916 };
0917
0918 pinctrl_switch: switchgrp {
0919 fsl,pins = <
0920 MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x08
0921 >;
0922 };
0923 };
