0001 // SPDX-License-Identifier: GPL-2.0 OR X11
0002 /*
0003 * Device Tree Include file for TQ-Systems MBa7 carrier board.
0004 *
0005 * Copyright (C) 2016 TQ-Systems GmbH
0006 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
0007 * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
0008 *
0009 * Note: This file does not include nodes for all peripheral devices.
0010 * As device driver coverage increases additional nodes can be added.
0011 */
0012
0013 #include <dt-bindings/input/input.h>
0014 #include <dt-bindings/net/ti-dp83867.h>
0015
0016 / {
0017 aliases {
0018 mmc0 = &usdhc3;
0019 mmc1 = &usdhc1;
0020 /delete-property/ mmc2;
0021 };
0022
0023 beeper {
0024 compatible = "gpio-beeper";
0025 gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>;
0026 };
0027
0028 chosen {
0029 stdout-path = &uart6;
0030 };
0031
0032 gpio_buttons: gpio-keys {
0033 compatible = "gpio-keys";
0034
0035 button-0 {
0036 /* #SWITCH_A */
0037 label = "S11";
0038 linux,code = <KEY_1>;
0039 gpios = <&pca9555 13 GPIO_ACTIVE_LOW>;
0040 };
0041
0042 button-1 {
0043 /* #SWITCH_B */
0044 label = "S12";
0045 linux,code = <KEY_2>;
0046 gpios = <&pca9555 14 GPIO_ACTIVE_LOW>;
0047 };
0048
0049 button-2 {
0050 /* #SWITCH_C */
0051 label = "S13";
0052 linux,code = <KEY_3>;
0053 gpios = <&pca9555 15 GPIO_ACTIVE_LOW>;
0054 };
0055 };
0056
0057 gpio-leds {
0058 compatible = "gpio-leds";
0059
0060 led1 {
0061 label = "led1";
0062 gpios = <&pca9555 8 GPIO_ACTIVE_HIGH>;
0063 linux,default-trigger = "default-on";
0064 };
0065
0066 led2 {
0067 label = "led2";
0068 gpios = <&pca9555 9 GPIO_ACTIVE_HIGH>;
0069 linux,default-trigger = "heartbeat";
0070 };
0071 };
0072
0073 reg_sd1_vmmc: regulator-sd1-vmmc {
0074 compatible = "regulator-fixed";
0075 regulator-name = "VCC3V3_SD1";
0076 regulator-min-microvolt = <3300000>;
0077 regulator-max-microvolt = <3300000>;
0078 regulator-always-on;
0079 };
0080
0081 reg_fec1_pwdn: regulator-fec1-pwdn {
0082 compatible = "regulator-fixed";
0083 regulator-name = "PWDN_FEC1";
0084 regulator-min-microvolt = <3300000>;
0085 regulator-max-microvolt = <3300000>;
0086 regulator-always-on;
0087 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
0088 enable-active-high;
0089 };
0090
0091 reg_fec2_pwdn: regulator-fec2-pwdn {
0092 compatible = "regulator-fixed";
0093 regulator-name = "PWDN_FEC2";
0094 regulator-min-microvolt = <3300000>;
0095 regulator-max-microvolt = <3300000>;
0096 regulator-always-on;
0097 gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
0098 enable-active-high;
0099 };
0100
0101 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
0102 compatible = "regulator-fixed";
0103 regulator-name = "VBUS_USBOTG1";
0104 regulator-min-microvolt = <5000000>;
0105 regulator-max-microvolt = <5000000>;
0106 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
0107 enable-active-high;
0108 };
0109
0110 reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
0111 compatible = "regulator-fixed";
0112 regulator-name = "VBUS_USBOTG2";
0113 regulator-min-microvolt = <5000000>;
0114 regulator-max-microvolt = <5000000>;
0115 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
0116 enable-active-high;
0117 };
0118
0119 reg_mpcie_1v5: regulator-mpcie-1v5 {
0120 compatible = "regulator-fixed";
0121 regulator-name = "VCC1V5_MPCIE";
0122 regulator-min-microvolt = <1500000>;
0123 regulator-max-microvolt = <1500000>;
0124 gpio = <&pca9555 12 GPIO_ACTIVE_HIGH>;
0125 enable-active-high;
0126 regulator-always-on;
0127 };
0128
0129 reg_mpcie_3v3: regulator-mpcie-3v3 {
0130 compatible = "regulator-fixed";
0131 regulator-name = "VCC3V3_MPCIE";
0132 regulator-min-microvolt = <3300000>;
0133 regulator-max-microvolt = <3300000>;
0134 gpio = <&pca9555 10 GPIO_ACTIVE_HIGH>;
0135 enable-active-high;
0136 regulator-always-on;
0137 };
0138
0139 reg_mba_12v0: regulator-mba-12v0 {
0140 compatible = "regulator-fixed";
0141 regulator-name = "VCC12V0_MBA7";
0142 regulator-min-microvolt = <12000000>;
0143 regulator-max-microvolt = <12000000>;
0144 gpio = <&pca9555 11 GPIO_ACTIVE_HIGH>;
0145 enable-active-high;
0146 };
0147
0148 reg_lvds_transmitter: regulator-lvds-transmitter {
0149 compatible = "regulator-fixed";
0150 regulator-name = "#SHTDN_LVDS";
0151 regulator-min-microvolt = <3300000>;
0152 regulator-max-microvolt = <3300000>;
0153 gpio = <&pca9555 1 GPIO_ACTIVE_HIGH>;
0154 enable-active-high;
0155 };
0156
0157 reg_vref_1v8: regulator-vref-1v8 {
0158 compatible = "regulator-fixed";
0159 regulator-name = "VCC1V8_REF";
0160 regulator-min-microvolt = <1800000>;
0161 regulator-max-microvolt = <1800000>;
0162 regulator-always-on;
0163 vin-supply = <&sw2_reg>;
0164 };
0165
0166 reg_audio_3v3: regulator-audio-3v3 {
0167 compatible = "regulator-fixed";
0168 regulator-name = "VCC3V3_AUDIO";
0169 regulator-min-microvolt = <3300000>;
0170 regulator-max-microvolt = <3300000>;
0171 regulator-always-on;
0172 };
0173
0174 sound {
0175 compatible = "fsl,imx-audio-tlv320aic32x4";
0176 model = "imx-audio-tlv320aic32x4";
0177 ssi-controller = <&sai1>;
0178 audio-codec = <&tlv320aic32x4>;
0179 audio-routing =
0180 "IN3_L", "Mic Jack",
0181 "Mic Jack", "Mic Bias",
0182 "IN1_L", "Line In Jack",
0183 "IN1_R", "Line In Jack",
0184 "Line Out Jack", "LOL",
0185 "Line Out Jack", "LOR";
0186 };
0187 };
0188
0189 &adc1 {
0190 vref-supply = <®_vref_1v8>;
0191 status = "okay";
0192 };
0193
0194 &adc2 {
0195 vref-supply = <®_vref_1v8>;
0196 status = "okay";
0197 };
0198
0199 &ecspi1 {
0200 pinctrl-names = "default";
0201 pinctrl-0 = <&pinctrl_ecspi1>;
0202 cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>,
0203 <&gpio4 2 GPIO_ACTIVE_LOW>;
0204 status = "okay";
0205 };
0206
0207 &ecspi2 {
0208 pinctrl-names = "default";
0209 pinctrl-0 = <&pinctrl_ecspi2>;
0210 status = "okay";
0211 };
0212
0213 &fec1 {
0214 pinctrl-names = "default";
0215 pinctrl-0 = <&pinctrl_enet1>;
0216 phy-mode = "rgmii-id";
0217 phy-reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
0218 phy-reset-duration = <1>;
0219 phy-supply = <®_fec1_pwdn>;
0220 phy-handle = <ðphy1_0>;
0221 fsl,magic-packet;
0222 status = "okay";
0223
0224 mdio {
0225 #address-cells = <1>;
0226 #size-cells = <0>;
0227
0228 ethphy1_0: ethernet-phy@0 {
0229 compatible = "ethernet-phy-ieee802.3-c22";
0230 reg = <0>;
0231 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
0232 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
0233 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
0234 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
0235 };
0236 };
0237 };
0238
0239 &flash0 {
0240 partitions {
0241 compatible = "fixed-partitions";
0242 #address-cells = <1>;
0243 #size-cells = <1>;
0244
0245 uboot@0 {
0246 label = "U-Boot";
0247 reg = <0x0 0xd0000>;
0248 };
0249
0250 env1@d0000 {
0251 label = "ENV1";
0252 reg = <0xd0000 0x10000>;
0253 };
0254
0255 env2@e0000 {
0256 label = "ENV2";
0257 reg = <0xe0000 0x10000>;
0258 };
0259
0260 dtb@f0000 {
0261 label = "DTB";
0262 reg = <0xf0000 0x10000>;
0263 };
0264
0265 linux@100000 {
0266 label = "Linux";
0267 reg = <0x100000 0x700000>;
0268 };
0269
0270 rootfs@800000 {
0271 label = "RootFS";
0272 reg = <0x800000 0x3800000>;
0273 };
0274 };
0275 };
0276
0277 &flexcan1 {
0278 pinctrl-names = "default";
0279 pinctrl-0 = <&pinctrl_flexcan1>;
0280 status = "okay";
0281 };
0282
0283 &flexcan2 {
0284 pinctrl-names = "default";
0285 pinctrl-0 = <&pinctrl_flexcan2>;
0286 status = "okay";
0287 };
0288
0289 &i2c1 {
0290 lm75: temperature-sensor@49 {
0291 compatible = "national,lm75";
0292 reg = <0x49>;
0293 };
0294 };
0295
0296 &i2c2 {
0297 clock-frequency = <100000>;
0298 pinctrl-names = "default";
0299 pinctrl-0 = <&pinctrl_i2c2>;
0300 status = "okay";
0301
0302 tlv320aic32x4: audio-codec@18 {
0303 compatible = "ti,tlv320aic32x4";
0304 reg = <0x18>;
0305 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
0306 clock-names = "mclk";
0307 ldoin-supply = <®_audio_3v3>;
0308 iov-supply = <®_audio_3v3>;
0309 };
0310
0311 pca9555: gpio-expander@20 {
0312 compatible = "nxp,pca9555";
0313 reg = <0x20>;
0314 pinctrl-names = "default";
0315 pinctrl-0 = <&pinctrl_pca9555>;
0316 gpio-controller;
0317 #gpio-cells = <2>;
0318 interrupt-parent = <&gpio7>;
0319 interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
0320 interrupt-controller;
0321 #interrupt-cells = <2>;
0322 };
0323 };
0324
0325 &i2c3 {
0326 clock-frequency = <100000>;
0327 pinctrl-names = "default";
0328 pinctrl-0 = <&pinctrl_i2c3>;
0329 status = "okay";
0330 };
0331
0332 &iomuxc {
0333 pinctrl-names = "default";
0334 pinctrl-0 = <&pinctrl_hog_mba7_1>;
0335
0336 pinctrl_ecspi1: ecspi1grp {
0337 fsl,pins = <
0338 MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x7c
0339 MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x74
0340 MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x74
0341 MX7D_PAD_UART1_RX_DATA__GPIO4_IO0 0x74
0342 MX7D_PAD_UART1_TX_DATA__GPIO4_IO1 0x74
0343 MX7D_PAD_UART2_RX_DATA__GPIO4_IO2 0x74
0344 >;
0345 };
0346
0347 pinctrl_ecspi2: ecspi2grp {
0348 fsl,pins = <
0349 MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO 0x7c
0350 MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI 0x74
0351 MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK 0x74
0352 MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0 0x74
0353 >;
0354 };
0355
0356 pinctrl_enet1: enet1grp {
0357 fsl,pins = <
0358 MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x02
0359 MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x00
0360 MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x71
0361 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x71
0362 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x71
0363 MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x71
0364 MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x71
0365 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x71
0366 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x79
0367 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x79
0368 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x79
0369 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x79
0370 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x79
0371 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x79
0372 /* Reset: SION, 100kPU, SRE_FAST, DSE_X1 */
0373 MX7D_PAD_ENET1_COL__GPIO7_IO15 0x40000070
0374 /* INT/PWDN: SION, 100kPU, HYS, SRE_FAST, DSE_X1 */
0375 MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x40000078
0376 >;
0377 };
0378
0379 pinctrl_flexcan1: flexcan1grp {
0380 fsl,pins = <
0381 MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x5a
0382 MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x52
0383 >;
0384 };
0385
0386 pinctrl_flexcan2: flexcan2grp {
0387 fsl,pins = <
0388 MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x5a
0389 MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x52
0390 >;
0391 };
0392
0393 pinctrl_hog_mba7_1: hogmba71grp {
0394 fsl,pins = <
0395 /* Limitation: WDOG2_B / WDOG2_RESET not usable */
0396 MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13 0x4000007c
0397 MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x40000074
0398 /* #BOOT_EN */
0399 MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 0x40000010
0400 >;
0401 };
0402
0403 pinctrl_i2c2: i2c2grp {
0404 fsl,pins = <
0405 MX7D_PAD_I2C2_SCL__I2C2_SCL 0x40000078
0406 MX7D_PAD_I2C2_SDA__I2C2_SDA 0x40000078
0407 >;
0408 };
0409
0410 pinctrl_i2c3: i2c3grp {
0411 fsl,pins = <
0412 MX7D_PAD_I2C3_SCL__I2C3_SCL 0x40000078
0413 MX7D_PAD_I2C3_SDA__I2C3_SDA 0x40000078
0414 >;
0415 };
0416
0417 pinctrl_pca9555: pca95550grp {
0418 fsl,pins = <
0419 MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x78
0420 >;
0421 };
0422
0423 pinctrl_sai1: sai1grp {
0424 fsl,pins = <
0425 MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x11
0426 MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK 0x1c
0427 MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 0x1c
0428 MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC 0x1c
0429
0430 MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1c
0431 MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x14
0432 MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x14
0433 >;
0434 };
0435
0436 pinctrl_uart3: uart3grp {
0437 fsl,pins = <
0438 MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x7e
0439 MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x76
0440 MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x76
0441 MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x7e
0442 >;
0443 };
0444
0445 pinctrl_uart4: uart4grp {
0446 fsl,pins = <
0447 MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX 0x7e
0448 MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX 0x76
0449 MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS 0x76
0450 MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS 0x7e
0451 >;
0452 };
0453
0454 pinctrl_uart5: uart5grp {
0455 fsl,pins = <
0456 MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x7e
0457 MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x76
0458 >;
0459 };
0460
0461 pinctrl_uart6: uart6grp {
0462 fsl,pins = <
0463 MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x7d
0464 MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x75
0465 MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS 0x75
0466 MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS 0x7d
0467 >;
0468 };
0469
0470 pinctrl_uart7: uart7grp {
0471 fsl,pins = <
0472 MX7D_PAD_EPDC_DATA12__UART7_DCE_RX 0x7e
0473 MX7D_PAD_EPDC_DATA13__UART7_DCE_TX 0x76
0474 MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS 0x76
0475 /* Limitation: RTS is not connected */
0476 MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS 0x7e
0477 >;
0478 };
0479
0480 pinctrl_usdhc1_gpio: usdhc1grp_gpio {
0481 fsl,pins = <
0482 /* WP */
0483 MX7D_PAD_SD1_WP__GPIO5_IO1 0x7c
0484 /* CD */
0485 MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x7c
0486 /* VSELECT */
0487 MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59
0488 >;
0489 };
0490
0491 pinctrl_usdhc1: usdhc1grp {
0492 fsl,pins = <
0493 MX7D_PAD_SD1_CMD__SD1_CMD 0x5e
0494 MX7D_PAD_SD1_CLK__SD1_CLK 0x57
0495 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5e
0496 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5e
0497 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5e
0498 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5e
0499 >;
0500 };
0501
0502 pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
0503 fsl,pins = <
0504 MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
0505 MX7D_PAD_SD1_CLK__SD1_CLK 0x57
0506 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
0507 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
0508 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
0509 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
0510 >;
0511 };
0512
0513 pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
0514 fsl,pins = <
0515 MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
0516 MX7D_PAD_SD1_CLK__SD1_CLK 0x57
0517 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
0518 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
0519 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
0520 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
0521 >;
0522 };
0523 };
0524
0525 &iomuxc_lpsr {
0526 pinctrl_pwm1: pwm1grp {
0527 fsl,pins = <
0528 /* LCD_CONTRAST */
0529 MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x50
0530 >;
0531 };
0532
0533 pinctrl_usbotg1: usbotg1grp {
0534 fsl,pins = <
0535 MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC 0x5c
0536 MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x59
0537 >;
0538 };
0539
0540 pinctrl_wdog1: wdog1grp {
0541 fsl,pins = <
0542 MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30
0543 >;
0544 };
0545 };
0546
0547 &pwm1 {
0548 pinctrl-names = "default";
0549 pinctrl-0 = <&pinctrl_pwm1>;
0550 status = "okay";
0551 };
0552
0553 &sai1 {
0554 pinctrl-names = "default";
0555 pinctrl-0 = <&pinctrl_sai1>;
0556 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
0557 <&clks IMX7D_SAI1_ROOT_CLK>;
0558 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
0559 assigned-clock-rates = <0>, <36864000>;
0560 status = "okay";
0561 };
0562
0563 &uart3 {
0564 pinctrl-names = "default";
0565 pinctrl-0 = <&pinctrl_uart3>;
0566 assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
0567 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
0568 status = "okay";
0569 };
0570
0571 &uart4 {
0572 pinctrl-names = "default";
0573 pinctrl-0 = <&pinctrl_uart4>;
0574 assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
0575 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
0576 status = "okay";
0577 };
0578
0579 &uart5 {
0580 pinctrl-names = "default";
0581 pinctrl-0 = <&pinctrl_uart5>;
0582 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
0583 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
0584 status = "okay";
0585 };
0586
0587 &uart6 {
0588 pinctrl-names = "default";
0589 pinctrl-0 = <&pinctrl_uart6>;
0590 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
0591 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
0592 status = "okay";
0593 };
0594
0595 &uart7 {
0596 pinctrl-names = "default";
0597 pinctrl-0 = <&pinctrl_uart7>;
0598 assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
0599 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
0600 uart-has-rtscts;
0601 linux,rs485-enabled-at-boot-time;
0602 rs485-rts-active-low;
0603 rs485-rx-during-tx;
0604 status = "okay";
0605 };
0606
0607 &usbh {
0608 status = "okay";
0609 };
0610
0611 &usbotg1 {
0612 pinctrl-names = "default";
0613 pinctrl-0 = <&pinctrl_usbotg1>;
0614 vbus-supply = <®_usb_otg1_vbus>;
0615 srp-disable;
0616 hnp-disable;
0617 adp-disable;
0618 over-current-active-low;
0619 dr_mode = "otg";
0620 status = "okay";
0621 };
0622
0623 &usdhc1 {
0624 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0625 pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
0626 pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
0627 pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
0628 cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
0629 wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
0630 vmmc-supply = <®_sd1_vmmc>;
0631 bus-width = <4>;
0632 no-1-8-v;
0633 status = "okay";
0634 };
0635
0636 &wdog1 {
0637 pinctrl-names = "default";
0638 pinctrl-0 = <&pinctrl_wdog1>;
0639 fsl,ext-reset-output;
0640 };
