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0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 //
0003 // Copyright 2016 Freescale Semiconductor, Inc.
0004 
0005 #include "imx6ul.dtsi"
0006 #include "imx6ull-pinfunc.h"
0007 #include "imx6ull-pinfunc-snvs.h"
0008 
0009 /* Delete UART8 in AIPS-1 (i.MX6UL specific) */
0010 /delete-node/ &uart8;
0011 /* Delete CAAM node in AIPS-2 (i.MX6UL specific) */
0012 /delete-node/ &crypto;
0013 
0014 &cpu0 {
0015         clock-frequency = <900000000>;
0016         operating-points = <
0017                 /* kHz  uV */
0018                 900000  1275000
0019                 792000  1225000
0020                 528000  1175000
0021                 396000  1025000
0022                 198000  950000
0023         >;
0024         fsl,soc-operating-points = <
0025                 /* KHz  uV */
0026                 900000  1250000
0027                 792000  1175000
0028                 528000  1175000
0029                 396000  1175000
0030                 198000  1175000
0031         >;
0032 };
0033 
0034 &ocotp {
0035         compatible = "fsl,imx6ull-ocotp", "syscon";
0036 };
0037 
0038 &pxp {
0039         compatible = "fsl,imx6ull-pxp";
0040         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
0041                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
0042 };
0043 
0044 &usdhc1 {
0045         compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
0046 };
0047 
0048 &usdhc2 {
0049         compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
0050 };
0051 
0052 / {
0053         soc: soc {
0054                 aips3: bus@2200000 {
0055                         compatible = "fsl,aips-bus", "simple-bus";
0056                         #address-cells = <1>;
0057                         #size-cells = <1>;
0058                         reg = <0x02200000 0x100000>;
0059                         ranges;
0060 
0061                         dcp: crypto@2280000 {
0062                                 compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp";
0063                                 reg = <0x02280000 0x4000>;
0064                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
0065                                              <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
0066                                              <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
0067                                 clocks = <&clks IMX6ULL_CLK_DCP_CLK>;
0068                                 clock-names = "dcp";
0069                         };
0070 
0071                         rngb: rng@2284000 {
0072                                 compatible = "fsl,imx6ull-rngb", "fsl,imx25-rngb";
0073                                 reg = <0x02284000 0x4000>;
0074                                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0075                                 clocks = <&clks IMX6UL_CLK_DUMMY>;
0076                         };
0077 
0078                         iomuxc_snvs: iomuxc-snvs@2290000 {
0079                                 compatible = "fsl,imx6ull-iomuxc-snvs";
0080                                 reg = <0x02290000 0x4000>;
0081                         };
0082 
0083                         uart8: serial@2288000 {
0084                                 compatible = "fsl,imx6ul-uart",
0085                                              "fsl,imx6q-uart";
0086                                 reg = <0x02288000 0x4000>;
0087                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
0088                                 clocks = <&clks IMX6UL_CLK_UART8_IPG>,
0089                                          <&clks IMX6UL_CLK_UART8_SERIAL>;
0090                                 clock-names = "ipg", "per";
0091                                 status = "disabled";
0092                         };
0093                 };
0094         };
0095 };