boot/dts/imx6ul-tqma6ul1-mba6ulx.dts

0001 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
0002 /*
0003  * Copyright 2018-2022 TQ-Systems GmbH
0004  * Author: Markus Niebel <Markus.Niebel@tq-group.com>
0005  */
0006
0007 /dts-v1/;
0008
0009 #include "imx6ul-tqma6ul1.dtsi"
0010 #include "mba6ulx.dtsi"
0011
0012 / {
0013         model = "TQ-Systems TQMa6UL1 SoM on MBa6ULx board";
0014         compatible = "tq,imx6ul-tqma6ul1-mba6ulx", "tq,imx6ul-tqma6ul1", "fsl,imx6ul";
0015 };
0016
0017 /*
0018  * Note: can2 and fec2 are enabled on mba6ulx level (for i.MX6ULG2 usage)
0019  * and need to be disabled here again
0020  */
0021 &can2 {
0022         status = "disabled";
0023 };
0024
0025 &fec1 {
0026         pinctrl-names = "default";
0027         pinctrl-0 = <&pinctrl_enet1>, <&pinctrl_enet1_mdc>;
0028         status = "okay";
0029
0030         mdio {
0031                 #address-cells = <1>;
0032                 #size-cells = <0>;
0033
0034                 ethphy0: ethernet-phy@0 {
0035                         compatible = "ethernet-phy-ieee802.3-c22";
0036                         max-speed = <100>;
0037                         reg = <0>;
0038                 };
0039         };
0040 };
0041
0042 &fec2 {
0043         /delete-property/ phy-handle;
0044         /delete-node/ mdio;
0045 };
0046
0047 &iomuxc {
0048         pinctrl_enet1_mdc: enet1mdcgrp {
0049                 fsl,pins = <
0050                         /* mdio */
0051                         MX6UL_PAD_GPIO1_IO07__ENET1_MDC         0x1b0b0
0052                         MX6UL_PAD_GPIO1_IO06__ENET1_MDIO        0x1b0b0
0053                 >;
0054         };
0055 };