0001 // SPDX-License-Identifier: GPL-2.0 OR MIT
0002 //
0003 // Copyright 2017 Armadeus Systems <support@armadeus.com>
0004
0005 /dts-v1/;
0006 #include "imx6ul-opos6ul.dtsi"
0007 #include "imx6ul-imx6ull-opos6uldev.dtsi"
0008
0009 / {
0010 model = "Armadeus Systems OPOS6UL SoM (i.MX6UL) on OPOS6ULDev board";
0011 compatible = "armadeus,imx6ul-opos6uldev", "armadeus,imx6ul-opos6ul", "fsl,imx6ul";
0012 };
0013
0014 &iomuxc {
0015 pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_tamper_gpios>;
0016
0017 pinctrl_tamper_gpios: tampergpiosgrp {
0018 fsl,pins = <
0019 MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0
0020 MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
0021 MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
0022 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
0023 MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
0024 MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0
0025 MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0
0026 MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0
0027 >;
0028 };
0029
0030 pinctrl_usbotg2_vbus: usbotg2vbusgrp {
0031 fsl,pins = <
0032 MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
0033 >;
0034 };
0035
0036 pinctrl_w1: w1grp {
0037 fsl,pins = <
0038 MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
0039 >;
0040 };
0041 };
