0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Copyright (C) 2017 exceet electronics GmbH
0004 * Copyright (C) 2018 Kontron Electronics GmbH
0005 * Copyright (c) 2019 Krzysztof Kozlowski <krzk@kernel.org>
0006 */
0007
0008 #include <dt-bindings/gpio/gpio.h>
0009
0010 / {
0011 gpio-leds {
0012 compatible = "gpio-leds";
0013 pinctrl-names = "default";
0014 pinctrl-0 = <&pinctrl_gpio_leds>;
0015
0016 led1 {
0017 label = "debug-led1";
0018 gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
0019 default-state = "off";
0020 linux,default-trigger = "heartbeat";
0021 };
0022
0023 led2 {
0024 label = "debug-led2";
0025 gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
0026 default-state = "off";
0027 };
0028
0029 led3 {
0030 label = "debug-led3";
0031 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
0032 default-state = "off";
0033 };
0034 };
0035
0036 pwm-beeper {
0037 compatible = "pwm-beeper";
0038 pwms = <&pwm8 0 5000>;
0039 };
0040
0041 reg_3v3: regulator-3v3 {
0042 compatible = "regulator-fixed";
0043 regulator-name = "3v3";
0044 regulator-min-microvolt = <3300000>;
0045 regulator-max-microvolt = <3300000>;
0046 };
0047
0048 reg_5v: regulator-5v {
0049 compatible = "regulator-fixed";
0050 regulator-name = "5v";
0051 regulator-min-microvolt = <5000000>;
0052 regulator-max-microvolt = <5000000>;
0053 };
0054
0055 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
0056 compatible = "regulator-fixed";
0057 regulator-name = "usb_otg1_vbus";
0058 regulator-min-microvolt = <5000000>;
0059 regulator-max-microvolt = <5000000>;
0060 gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
0061 enable-active-high;
0062 };
0063
0064 reg_vref_adc: regulator-vref-adc {
0065 compatible = "regulator-fixed";
0066 regulator-name = "vref-adc";
0067 regulator-min-microvolt = <3300000>;
0068 regulator-max-microvolt = <3300000>;
0069 };
0070 };
0071
0072 &adc1 {
0073 pinctrl-names = "default";
0074 pinctrl-0 = <&pinctrl_adc1>;
0075 vref-supply = <®_vref_adc>;
0076 status = "okay";
0077 };
0078
0079 &can2 {
0080 pinctrl-names = "default";
0081 pinctrl-0 = <&pinctrl_flexcan2>;
0082 status = "okay";
0083 };
0084
0085 &ecspi1 {
0086 cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
0087 pinctrl-names = "default";
0088 pinctrl-0 = <&pinctrl_ecspi1>;
0089 status = "okay";
0090
0091 eeprom@0 {
0092 compatible = "anvo,anv32e61w", "atmel,at25";
0093 reg = <0>;
0094 spi-max-frequency = <20000000>;
0095 spi-cpha;
0096 spi-cpol;
0097 pagesize = <1>;
0098 size = <8192>;
0099 address-width = <16>;
0100 };
0101 };
0102
0103 &fec1 {
0104 pinctrl-0 = <&pinctrl_enet1>;
0105 /delete-node/ mdio;
0106 };
0107
0108 &fec2 {
0109 pinctrl-names = "default";
0110 pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
0111 phy-mode = "rmii";
0112 phy-handle = <ðphy2>;
0113 status = "okay";
0114
0115 mdio {
0116 #address-cells = <1>;
0117 #size-cells = <0>;
0118
0119 ethphy1: ethernet-phy@1 {
0120 reg = <1>;
0121 micrel,led-mode = <0>;
0122 clocks = <&clks IMX6UL_CLK_ENET_REF>;
0123 clock-names = "rmii-ref";
0124 };
0125
0126 ethphy2: ethernet-phy@2 {
0127 reg = <2>;
0128 micrel,led-mode = <0>;
0129 clocks = <&clks IMX6UL_CLK_ENET2_REF>;
0130 clock-names = "rmii-ref";
0131 };
0132 };
0133 };
0134
0135 &i2c1 {
0136 clock-frequency = <100000>;
0137 pinctrl-names = "default";
0138 pinctrl-0 = <&pinctrl_i2c1>;
0139 status = "okay";
0140 };
0141
0142 &i2c4 {
0143 clock-frequency = <100000>;
0144 pinctrl-names = "default";
0145 pinctrl-0 = <&pinctrl_i2c4>;
0146 status = "okay";
0147
0148 rtc@32 {
0149 compatible = "epson,rx8900";
0150 reg = <0x32>;
0151 };
0152 };
0153
0154 &pwm8 {
0155 #pwm-cells = <2>;
0156 pinctrl-names = "default";
0157 pinctrl-0 = <&pinctrl_pwm8>;
0158 status = "okay";
0159 };
0160
0161 &uart1 {
0162 pinctrl-names = "default";
0163 pinctrl-0 = <&pinctrl_uart1>;
0164 status = "okay";
0165 };
0166
0167 &uart2 {
0168 pinctrl-names = "default";
0169 pinctrl-0 = <&pinctrl_uart2>;
0170 linux,rs485-enabled-at-boot-time;
0171 rs485-rx-during-tx;
0172 rs485-rts-active-low;
0173 uart-has-rtscts;
0174 status = "okay";
0175 };
0176
0177 &uart3 {
0178 pinctrl-names = "default";
0179 pinctrl-0 = <&pinctrl_uart3>;
0180 uart-has-rtscts;
0181 status = "okay";
0182 };
0183
0184 &uart4 {
0185 pinctrl-names = "default";
0186 pinctrl-0 = <&pinctrl_uart4>;
0187 status = "okay";
0188 };
0189
0190 &usbotg1 {
0191 pinctrl-names = "default";
0192 pinctrl-0 = <&pinctrl_usbotg1>;
0193 dr_mode = "otg";
0194 srp-disable;
0195 hnp-disable;
0196 adp-disable;
0197 over-current-active-low;
0198 vbus-supply = <®_usb_otg1_vbus>;
0199 status = "okay";
0200 };
0201
0202 &usbotg2 {
0203 dr_mode = "host";
0204 disable-over-current;
0205 vbus-supply = <®_5v>;
0206 status = "okay";
0207 };
0208
0209 &usdhc1 {
0210 pinctrl-names = "default";
0211 pinctrl-0 = <&pinctrl_usdhc1>;
0212 cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
0213 keep-power-in-suspend;
0214 wakeup-source;
0215 vmmc-supply = <®_3v3>;
0216 voltage-ranges = <3300 3300>;
0217 no-1-8-v;
0218 status = "okay";
0219 };
0220
0221 &usdhc2 {
0222 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0223 pinctrl-0 = <&pinctrl_usdhc2>;
0224 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
0225 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
0226 non-removable;
0227 keep-power-in-suspend;
0228 wakeup-source;
0229 vmmc-supply = <®_3v3>;
0230 voltage-ranges = <3300 3300>;
0231 no-1-8-v;
0232 status = "okay";
0233 };
0234
0235 &iomuxc {
0236 pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>;
0237
0238 pinctrl_adc1: adc1grp {
0239 fsl,pins = <
0240 MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
0241 MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
0242 MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0xb0
0243 >;
0244 };
0245
0246 pinctrl_ecspi1: ecspi1grp {
0247 fsl,pins = <
0248 MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x100b1
0249 MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x100b1
0250 MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x100b1
0251 MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x100b1 /* ECSPI1-CS1 */
0252 >;
0253 };
0254
0255 pinctrl_enet2: enet2grp {
0256 fsl,pins = <
0257 MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
0258 MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
0259 MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
0260 MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
0261 MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
0262 MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
0263 MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
0264 MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b009
0265 >;
0266 };
0267
0268 pinctrl_enet2_mdio: enet2mdiogrp {
0269 fsl,pins = <
0270 MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
0271 MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
0272 >;
0273 };
0274
0275 pinctrl_flexcan2: flexcan2grp{
0276 fsl,pins = <
0277 MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
0278 MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
0279 >;
0280 };
0281
0282 pinctrl_gpio: gpiogrp {
0283 fsl,pins = <
0284 MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */
0285 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */
0286 MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */
0287 MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */
0288 >;
0289 };
0290
0291 pinctrl_gpio_leds: gpioledsgrp {
0292 fsl,pins = <
0293 MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b0b0 /* LED H14 */
0294 MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x1b0b0 /* LED H15 */
0295 MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0 /* LED H16 */
0296 >;
0297 };
0298
0299 pinctrl_i2c1: i2c1grp {
0300 fsl,pins = <
0301 MX6UL_PAD_CSI_PIXCLK__I2C1_SCL 0x4001b8b0
0302 MX6UL_PAD_CSI_MCLK__I2C1_SDA 0x4001b8b0
0303 >;
0304 };
0305
0306 pinctrl_i2c4: i2c4grp {
0307 fsl,pins = <
0308 MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x4001f8b0
0309 MX6UL_PAD_UART2_RX_DATA__I2C4_SDA 0x4001f8b0
0310 >;
0311 };
0312
0313 pinctrl_pwm8: pwm8grp {
0314 fsl,pins = <
0315 MX6UL_PAD_CSI_HSYNC__PWM8_OUT 0x110b0
0316 >;
0317 };
0318
0319 pinctrl_uart1: uart1grp {
0320 fsl,pins = <
0321 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
0322 MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
0323 >;
0324 };
0325
0326 pinctrl_uart2: uart2grp {
0327 fsl,pins = <
0328 MX6UL_PAD_NAND_DATA04__UART2_DCE_TX 0x1b0b1
0329 MX6UL_PAD_NAND_DATA05__UART2_DCE_RX 0x1b0b1
0330 MX6UL_PAD_NAND_DATA06__UART2_DCE_CTS 0x1b0b1
0331 /*
0332 * mux unused RTS to make sure it doesn't cause
0333 * any interrupts when it is undefined
0334 */
0335 MX6UL_PAD_NAND_DATA07__UART2_DCE_RTS 0x1b0b1
0336 >;
0337 };
0338
0339 pinctrl_uart3: uart3grp {
0340 fsl,pins = <
0341 MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
0342 MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
0343 MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1
0344 MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
0345 >;
0346 };
0347
0348 pinctrl_uart4: uart4grp {
0349 fsl,pins = <
0350 MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
0351 MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
0352 >;
0353 };
0354
0355 pinctrl_usbotg1: usbotg1 {
0356 fsl,pins = <
0357 MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x1b0b0
0358 >;
0359 };
0360
0361 pinctrl_usdhc1: usdhc1grp {
0362 fsl,pins = <
0363 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
0364 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
0365 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
0366 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
0367 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
0368 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
0369 MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x100b1 /* SD1_CD */
0370 >;
0371 };
0372
0373 pinctrl_usdhc2: usdhc2grp {
0374 fsl,pins = <
0375 MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10059
0376 MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
0377 MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
0378 MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
0379 MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
0380 MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
0381 >;
0382 };
0383
0384 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
0385 fsl,pins = <
0386 MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
0387 MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
0388 MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
0389 MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
0390 MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
0391 MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
0392 >;
0393 };
0394
0395 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
0396 fsl,pins = <
0397 MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
0398 MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
0399 MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
0400 MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
0401 MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
0402 MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
0403 >;
0404 };
0405 };
