0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Digi International's ConnectCore6UL SBC Pro board device tree source
0004 *
0005 * Copyright 2018 Digi International, Inc.
0006 *
0007 */
0008
0009 /dts-v1/;
0010 #include <dt-bindings/input/input.h>
0011 #include <dt-bindings/interrupt-controller/irq.h>
0012 #include "imx6ul.dtsi"
0013 #include "imx6ul-ccimx6ulsom.dtsi"
0014
0015 / {
0016 model = "Digi International ConnectCore 6UL SBC Pro.";
0017 compatible = "digi,ccimx6ulsbcpro", "digi,ccimx6ulsom", "fsl,imx6ul";
0018
0019 lcd_backlight: backlight {
0020 compatible = "pwm-backlight";
0021 pwms = <&pwm5 0 50000>;
0022 brightness-levels = <0 4 8 16 32 64 128 255>;
0023 default-brightness-level = <6>;
0024 status = "okay";
0025 };
0026
0027 panel {
0028 compatible = "auo,g101evn010";
0029 power-supply = <&ldo4_ext>;
0030 backlight = <&lcd_backlight>;
0031
0032 port {
0033 panel_in: endpoint {
0034 remote-endpoint = <&display_out>;
0035 };
0036 };
0037 };
0038
0039 reg_usb_otg1_vbus: regulator-usb-otg1 {
0040 compatible = "regulator-fixed";
0041 regulator-name = "usb_otg1_vbus";
0042 regulator-min-microvolt = <5000000>;
0043 regulator-max-microvolt = <5000000>;
0044 gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
0045 enable-active-high;
0046 };
0047 };
0048
0049 &adc1 {
0050 pinctrl-names = "default";
0051 pinctrl-0 = <&pinctrl_adc1>;
0052 status = "okay";
0053 };
0054
0055 &can1 {
0056 pinctrl-names = "default";
0057 pinctrl-0 = <&pinctrl_flexcan1>;
0058 xceiver-supply = <&ext_3v3>;
0059 status = "okay";
0060 };
0061
0062 /* CAN2 is multiplexed with UART2 RTS/CTS */
0063 &can2 {
0064 pinctrl-names = "default";
0065 pinctrl-0 = <&pinctrl_flexcan2>;
0066 xceiver-supply = <&ext_3v3>;
0067 status = "disabled";
0068 };
0069
0070 &ecspi1 {
0071 cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
0072 pinctrl-names = "default";
0073 pinctrl-0 = <&pinctrl_ecspi1_master>;
0074 status = "okay";
0075 };
0076
0077 &fec1 {
0078 pinctrl-names = "default";
0079 pinctrl-0 = <&pinctrl_enet1>;
0080 phy-mode = "rmii";
0081 phy-handle = <ðphy0>;
0082 status = "okay";
0083 };
0084
0085 &fec2 {
0086 pinctrl-names = "default";
0087 pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
0088 phy-mode = "rmii";
0089 phy-handle = <ðphy1>;
0090 phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
0091 phy-reset-duration = <26>;
0092 status = "okay";
0093
0094 mdio {
0095 #address-cells = <1>;
0096 #size-cells = <0>;
0097
0098 ethphy0: ethernet-phy@0 {
0099 compatible = "ethernet-phy-ieee802.3-c22";
0100 smsc,disable-energy-detect;
0101 reg = <0>;
0102 };
0103
0104 ethphy1: ethernet-phy@1 {
0105 compatible = "ethernet-phy-ieee802.3-c22";
0106 smsc,disable-energy-detect;
0107 reg = <1>;
0108 };
0109 };
0110 };
0111
0112 &gpio5 {
0113 emmc-usd-mux-hog {
0114 gpio-hog;
0115 gpios = <1 GPIO_ACTIVE_LOW>;
0116 output-high;
0117 };
0118 };
0119
0120 &i2c1 {
0121 touchscreen@14 {
0122 compatible = "goodix,gt911";
0123 reg = <0x14>;
0124 pinctrl-names = "default";
0125 pinctrl-0 = <&pinctrl_goodix_touch>;
0126 interrupt-parent = <&gpio5>;
0127 interrupts = <2 IRQ_TYPE_EDGE_RISING>;
0128 irq-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
0129 status = "okay";
0130 };
0131 };
0132
0133 &lcdif {
0134 pinctrl-names = "default";
0135 pinctrl-0 = <&pinctrl_lcdif_dat0_17
0136 &pinctrl_lcdif_clken
0137 &pinctrl_lcdif_hvsync>;
0138 lcd-supply = <&ldo4_ext>; /* BU90T82 LVDS bridge power */
0139 status = "okay";
0140
0141 port {
0142 display_out: endpoint {
0143 remote-endpoint = <&panel_in>;
0144 };
0145 };
0146 };
0147
0148 &ldo4_ext {
0149 regulator-max-microvolt = <1800000>;
0150 };
0151
0152 &pwm1 {
0153 status = "okay";
0154 };
0155
0156 &pwm2 {
0157 status = "okay";
0158 };
0159
0160 &pwm3 {
0161 status = "okay";
0162 };
0163
0164 &pwm4 {
0165 pinctrl-names = "default";
0166 pinctrl-0 = <&pinctrl_pwm4>;
0167 status = "okay";
0168 };
0169
0170 &pwm5 {
0171 #pwm-cells = <2>;
0172 pinctrl-names = "default";
0173 pinctrl-0 = <&pinctrl_pwm5>;
0174 status = "okay";
0175 };
0176
0177 &pwm6 {
0178 status = "okay";
0179 };
0180
0181 &pwm7 {
0182 status = "okay";
0183 };
0184
0185 &pwm8 {
0186 status = "okay";
0187 };
0188
0189 &sai2 {
0190 pinctrl-names = "default", "sleep";
0191 pinctrl-0 = <&pinctrl_sai2>;
0192 pinctrl-1 = <&pinctrl_sai2_sleep>;
0193 assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
0194 <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>,
0195 <&clks IMX6UL_CLK_SAI2>;
0196 assigned-clock-rates = <0>, <786432000>, <12288000>;
0197 assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
0198 status = "okay";
0199 };
0200
0201 /* UART2 RTS/CTS muxed with CAN2 */
0202 &uart2 {
0203 pinctrl-names = "default";
0204 pinctrl-0 = <&pinctrl_uart2_4wires>;
0205 uart-has-rtscts;
0206 status = "okay";
0207 };
0208
0209 /* UART3 RTS/CTS muxed with CAN 1 */
0210 &uart3 {
0211 pinctrl-names = "default";
0212 pinctrl-0 = <&pinctrl_uart3_2wires>;
0213 status = "okay";
0214 };
0215
0216 &uart5 {
0217 pinctrl-names = "default";
0218 pinctrl-0 = <&pinctrl_uart5>;
0219 status = "okay";
0220 };
0221
0222 &usbotg1 {
0223 dr_mode = "otg";
0224 vbus-supply = <®_usb_otg1_vbus>;
0225 pinctrl-0 = <&pinctrl_usbotg1>;
0226 status = "okay";
0227 };
0228
0229 &usbotg2 {
0230 dr_mode = "host";
0231 disable-over-current;
0232 status = "okay";
0233 };
0234
0235 /* USDHC2 (microSD conflicts with eMMC) */
0236 &usdhc2 {
0237 pinctrl-names = "default";
0238 pinctrl-0 = <&pinctrl_usdhc2>;
0239 no-1-8-v;
0240 broken-cd; /* no carrier detect line (use polling) */
0241 status = "okay";
0242 };
0243
0244 &iomuxc {
0245 pinctrl_adc1: adc1grp {
0246 fsl,pins = <
0247 /* EXP_GPIO_2 -> GPIO1_3/ADC1_IN3 */
0248 MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
0249 >;
0250 };
0251
0252 pinctrl_ecspi1_master: ecspi1grp1 {
0253 fsl,pins = <
0254 MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x10b0
0255 MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x10b0
0256 MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x10b0
0257 MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x10b0
0258 >;
0259 };
0260
0261 pinctrl_enet1: enet1grp {
0262 fsl,pins = <
0263 MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
0264 MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
0265 MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
0266 MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
0267 MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
0268 MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
0269 MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
0270 MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x40017051
0271 >;
0272 };
0273
0274 pinctrl_enet2: enet2grp {
0275 fsl,pins = <
0276 MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
0277 MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
0278 MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
0279 MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
0280 MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
0281 MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
0282 MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
0283 MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x40017051
0284 >;
0285 };
0286
0287 pinctrl_enet2_mdio: mdioenet2grp {
0288 fsl,pins = <
0289 MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
0290 MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
0291 >;
0292 };
0293
0294 pinctrl_flexcan1: flexcan1grp{
0295 fsl,pins = <
0296 MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
0297 MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
0298 >;
0299 };
0300 pinctrl_flexcan2: flexcan2grp{
0301 fsl,pins = <
0302 MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
0303 MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
0304 >;
0305 };
0306
0307 pinctrl_goodix_touch: goodixgrp{
0308 fsl,pins = <
0309 MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1020
0310 >;
0311 };
0312
0313 pinctrl_lcdif_dat0_17: lcdifdatgrp0-17 {
0314 fsl,pins = <
0315 MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
0316 MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
0317 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
0318 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
0319 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
0320 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
0321 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
0322 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
0323 MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
0324 MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
0325 MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
0326 MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
0327 MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
0328 MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
0329 MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
0330 MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
0331 MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
0332 MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
0333 >;
0334 };
0335
0336 pinctrl_lcdif_clken: lcdifctrlgrp1 {
0337 fsl,pins = <
0338 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x17050
0339 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
0340 >;
0341 };
0342
0343 pinctrl_lcdif_hvsync: lcdifctrlgrp2 {
0344 fsl,pins = <
0345 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
0346 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
0347 >;
0348 };
0349
0350 pinctrl_pwm4: pwm4grp {
0351 fsl,pins = <
0352 MX6UL_PAD_GPIO1_IO05__PWM4_OUT 0x110b0
0353 >;
0354 };
0355
0356 pinctrl_pwm5: pwm5grp {
0357 fsl,pins = <
0358 MX6UL_PAD_NAND_DQS__PWM5_OUT 0x110b0
0359 >;
0360 };
0361
0362 pinctrl_sai2: sai2grp {
0363 fsl,pins = <
0364 MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088
0365 MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088
0366 MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
0367 MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
0368 MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
0369 /* Interrupt */
0370 MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x10b0
0371 >;
0372 };
0373
0374 pinctrl_sai2_sleep: sai2grp-sleep {
0375 fsl,pins = <
0376 MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15 0x3000
0377 MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x3000
0378 MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x3000
0379 MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x3000
0380 /* Interrupt */
0381 MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x3000
0382 >;
0383 };
0384
0385 pinctrl_uart2_4wires: uart2grp-4wires {
0386 fsl,pins = <
0387 MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
0388 MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
0389 MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1
0390 MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x1b0b1
0391 >;
0392 };
0393
0394 pinctrl_uart3_2wires: uart3grp-2wires {
0395 fsl,pins = <
0396 MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
0397 MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
0398 >;
0399 };
0400
0401 pinctrl_uart5: uart5grp {
0402 fsl,pins = <
0403 MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1
0404 MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1
0405 >;
0406 };
0407
0408 pinctrl_usdhc2: usdhc2grp {
0409 fsl,pins = <
0410 MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059
0411 MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10039
0412 MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059
0413 MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059
0414 MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059
0415 MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059
0416 /* Mux selector between eMMC/SD# */
0417 MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x79
0418 >;
0419 };
0420
0421 pinctrl_usbotg1: usbotg1grp {
0422 fsl,pins = <
0423 MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
0424 MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x17059
0425 MX6UL_PAD_GPIO1_IO01__USB_OTG1_OC 0x17059
0426 >;
0427 };
0428 };
