0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2016 Christoph Fritz <chf.fritz@googlemail.com>
0004 */
0005
0006 /dts-v1/;
0007
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include <dt-bindings/input/input.h>
0010 #include "imx6sx.dtsi"
0011
0012 / {
0013 model = "Softing VIN|ING 2000";
0014 compatible = "samtec,imx6sx-vining-2000", "fsl,imx6sx";
0015
0016 chosen {
0017 stdout-path = &uart1;
0018 };
0019
0020 memory@80000000 {
0021 device_type = "memory";
0022 reg = <0x80000000 0x40000000>;
0023 };
0024
0025 reg_usb_otg1_vbus: regulator-usb_otg1_vbus {
0026 compatible = "regulator-fixed";
0027 regulator-name = "usb_otg1_vbus";
0028 pinctrl-names = "default";
0029 pinctrl-0 = <&pinctrl_usb_otg1>;
0030 regulator-min-microvolt = <5000000>;
0031 regulator-max-microvolt = <5000000>;
0032 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
0033 enable-active-high;
0034 };
0035
0036 reg_peri_3v3: regulator-peri_3v3 {
0037 compatible = "regulator-fixed";
0038 regulator-name = "peri_3v3";
0039 regulator-min-microvolt = <3300000>;
0040 regulator-max-microvolt = <3300000>;
0041 };
0042
0043 led-controller {
0044 compatible = "pwm-leds";
0045
0046 led-1 {
0047 label = "red";
0048 max-brightness = <255>;
0049 pwms = <&pwm6 0 50000>;
0050 };
0051
0052 led-2 {
0053 label = "green";
0054 max-brightness = <255>;
0055 pwms = <&pwm2 0 50000>;
0056 };
0057
0058 led-3 {
0059 label = "blue";
0060 max-brightness = <255>;
0061 pwms = <&pwm1 0 50000>;
0062 };
0063 };
0064 };
0065
0066 &adc1 {
0067 vref-supply = <®_peri_3v3>;
0068 status = "okay";
0069 };
0070
0071 &cpu0 {
0072 /*
0073 * This board has a shared rail of reg_arm and reg_soc (supplied by
0074 * sw1a_reg) which is modeled below, but still this module behaves
0075 * unstable without higher voltages. Hence, set higher voltages here.
0076 */
0077 operating-points = <
0078 /* kHz uV */
0079 996000 1250000
0080 792000 1175000
0081 396000 1175000
0082 198000 1175000
0083 >;
0084 fsl,soc-operating-points = <
0085 /* ARM kHz SOC uV */
0086 996000 1250000
0087 792000 1175000
0088 396000 1175000
0089 198000 1175000
0090 >;
0091 };
0092
0093 &ecspi4 {
0094 pinctrl-names = "default";
0095 pinctrl-0 = <&pinctrl_ecspi4>;
0096 cs-gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
0097 status = "okay";
0098 };
0099
0100 &fec1 {
0101 pinctrl-names = "default";
0102 pinctrl-0 = <&pinctrl_enet1>;
0103 phy-supply = <®_peri_3v3>;
0104 phy-reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
0105 phy-reset-duration = <5>;
0106 phy-mode = "rmii";
0107 phy-handle = <ðphy0>;
0108 status = "okay";
0109
0110 mdio {
0111 #address-cells = <1>;
0112 #size-cells = <0>;
0113
0114 ethphy0: ethernet0-phy@0 {
0115 reg = <0>;
0116 max-speed = <100>;
0117 interrupt-parent = <&gpio2>;
0118 interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
0119 };
0120 };
0121 };
0122
0123 &fec2 {
0124 pinctrl-names = "default";
0125 pinctrl-0 = <&pinctrl_enet2>;
0126 phy-supply = <®_peri_3v3>;
0127 phy-reset-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;
0128 phy-reset-duration = <5>;
0129 phy-mode = "rmii";
0130 phy-handle = <ðphy1>;
0131 status = "okay";
0132
0133 mdio {
0134 #address-cells = <1>;
0135 #size-cells = <0>;
0136
0137 ethphy1: ethernet1-phy@0 {
0138 reg = <0>;
0139 max-speed = <100>;
0140 interrupt-parent = <&gpio2>;
0141 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
0142 };
0143 };
0144 };
0145
0146 &flexcan1 {
0147 pinctrl-names = "default";
0148 pinctrl-0 = <&pinctrl_flexcan1>;
0149 status = "okay";
0150 };
0151
0152 &flexcan2 {
0153 pinctrl-names = "default";
0154 pinctrl-0 = <&pinctrl_flexcan2>;
0155 status = "okay";
0156 };
0157
0158 &i2c1 {
0159 clock-frequency = <100000>;
0160 pinctrl-names = "default";
0161 pinctrl-0 = <&pinctrl_i2c1>;
0162 status = "okay";
0163
0164 proximity: sx9500@28 {
0165 compatible = "semtech,sx9500";
0166 reg = <0x28>;
0167 pinctrl-names = "default";
0168 pinctrl-0 = <&pinctrl_sx9500>;
0169 interrupt-parent = <&gpio2>;
0170 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
0171 reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
0172 };
0173
0174 pmic: pfuze100@8 {
0175 compatible = "fsl,pfuze200";
0176 reg = <0x08>;
0177
0178 regulators {
0179 sw1a_reg: sw1ab {
0180 regulator-min-microvolt = <300000>;
0181 regulator-max-microvolt = <1875000>;
0182 regulator-boot-on;
0183 regulator-always-on;
0184 regulator-ramp-delay = <6250>;
0185 };
0186
0187 sw2_reg: sw2 {
0188 regulator-min-microvolt = <800000>;
0189 regulator-max-microvolt = <3300000>;
0190 regulator-boot-on;
0191 regulator-always-on;
0192 };
0193
0194 sw3a_reg: sw3a {
0195 regulator-min-microvolt = <400000>;
0196 regulator-max-microvolt = <1975000>;
0197 regulator-boot-on;
0198 regulator-always-on;
0199 };
0200
0201 sw3b_reg: sw3b {
0202 regulator-min-microvolt = <400000>;
0203 regulator-max-microvolt = <1975000>;
0204 regulator-boot-on;
0205 regulator-always-on;
0206 };
0207
0208 snvs_reg: vsnvs {
0209 regulator-min-microvolt = <1000000>;
0210 regulator-max-microvolt = <3000000>;
0211 regulator-boot-on;
0212 regulator-always-on;
0213 };
0214
0215 vref_reg: vrefddr {
0216 regulator-boot-on;
0217 regulator-always-on;
0218 };
0219
0220 vgen1_reg: vgen1 {
0221 regulator-min-microvolt = <800000>;
0222 regulator-max-microvolt = <1550000>;
0223 regulator-always-on;
0224 };
0225
0226 vgen2_reg: vgen2 {
0227 regulator-min-microvolt = <800000>;
0228 regulator-max-microvolt = <1550000>;
0229 };
0230
0231 vgen3_reg: vgen3 {
0232 regulator-min-microvolt = <1800000>;
0233 regulator-max-microvolt = <3300000>;
0234 regulator-always-on;
0235 };
0236
0237 vgen4_reg: vgen4 {
0238 regulator-min-microvolt = <1800000>;
0239 regulator-max-microvolt = <3300000>;
0240 regulator-always-on;
0241 };
0242
0243 vgen5_reg: vgen5 {
0244 regulator-min-microvolt = <1800000>;
0245 regulator-max-microvolt = <3300000>;
0246 regulator-always-on;
0247 };
0248
0249 vgen6_reg: vgen6 {
0250 regulator-min-microvolt = <1800000>;
0251 regulator-max-microvolt = <3300000>;
0252 regulator-always-on;
0253 };
0254 };
0255 };
0256 };
0257
0258 &i2c3 {
0259 clock-frequency = <100000>;
0260 pinctrl-names = "default";
0261 pinctrl-0 = <&pinctrl_i2c3>;
0262 status = "okay";
0263 };
0264
0265 &iomuxc {
0266 pinctrl-names = "default";
0267 pinctrl-0 = <&pinctrl_gpios>;
0268
0269 pinctrl_ecspi4: ecspi4grp {
0270 fsl,pins = <
0271 MX6SX_PAD_SD3_CLK__ECSPI4_SCLK 0x130b1
0272 MX6SX_PAD_SD3_DATA3__ECSPI4_MISO 0x130b1
0273 MX6SX_PAD_SD3_CMD__ECSPI4_MOSI 0x130b1
0274 MX6SX_PAD_SD3_DATA2__GPIO7_IO_4 0x30b0
0275 >;
0276 };
0277
0278 pinctrl_enet1: enet1grp {
0279 fsl,pins = <
0280 MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x30c1
0281 MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x30c1
0282 MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0f9
0283 MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0f9
0284 MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x30c1
0285 MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0f9
0286 MX6SX_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4000a038
0287 /* LAN8720 PHY Reset */
0288 MX6SX_PAD_RGMII1_TD3__GPIO5_IO_9 0x10b0
0289 /* MDIO */
0290 MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0f9
0291 MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0f9
0292 /* IRQ from PHY */
0293 MX6SX_PAD_KEY_ROW2__GPIO2_IO_17 0x10b0
0294 >;
0295 };
0296
0297 pinctrl_enet2: enet2grp {
0298 fsl,pins = <
0299 MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0x1b0b0
0300 MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0x1b0b0
0301 MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x1b0b0
0302 MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x1b0b0
0303 MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x1b0b0
0304 MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0x1b0b0
0305 MX6SX_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4000a038
0306 /* LAN8720 PHY Reset */
0307 MX6SX_PAD_RGMII2_TD3__GPIO5_IO_21 0x10b0
0308 /* MDIO */
0309 MX6SX_PAD_ENET1_COL__ENET2_MDC 0xa0f9
0310 MX6SX_PAD_ENET1_CRS__ENET2_MDIO 0xa0f9
0311 /* IRQ from PHY */
0312 MX6SX_PAD_KEY_ROW4__GPIO2_IO_19 0x10b0
0313 >;
0314 };
0315
0316 pinctrl_flexcan1: flexcan1grp {
0317 fsl,pins = <
0318 MX6SX_PAD_QSPI1B_DQS__CAN1_TX 0x1b0b0
0319 MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b0b0
0320 >;
0321 };
0322
0323 pinctrl_flexcan2: flexcan2grp {
0324 fsl,pins = <
0325 MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b0b0
0326 MX6SX_PAD_QSPI1A_DQS__CAN2_TX 0x1b0b0
0327 >;
0328 };
0329
0330 pinctrl_gpios: gpiosgrp {
0331 fsl,pins = <
0332 /* reset external uC */
0333 MX6SX_PAD_QSPI1A_DATA3__GPIO4_IO_19 0x10b0
0334 /* IRQ from external uC */
0335 MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x10b0
0336 /* overcurrent detection */
0337 MX6SX_PAD_GPIO1_IO08__GPIO1_IO_8 0x10b0
0338 >;
0339 };
0340
0341 pinctrl_i2c1: i2c1grp {
0342 fsl,pins = <
0343 MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1
0344 MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1
0345 >;
0346 };
0347
0348 pinctrl_i2c3: i2c3grp {
0349 fsl,pins = <
0350 MX6SX_PAD_NAND_ALE__I2C3_SDA 0x4001b8b1
0351 MX6SX_PAD_NAND_CLE__I2C3_SCL 0x4001b8b1
0352 >;
0353 };
0354
0355 pinctrl_pcie: pciegrp {
0356 fsl,pins = <
0357 MX6SX_PAD_NAND_DATA02__GPIO4_IO_6 0x10b0
0358 >;
0359 };
0360
0361 pinctrl_pwm1: pwm1grp-1 {
0362 fsl,pins = <
0363 /* blue LED */
0364 MX6SX_PAD_RGMII2_RD3__PWM1_OUT 0x1b0b1
0365 >;
0366 };
0367
0368 pinctrl_pwm2: pwm2grp-1 {
0369 fsl,pins = <
0370 /* green LED */
0371 MX6SX_PAD_RGMII2_RD2__PWM2_OUT 0x1b0b1
0372 >;
0373 };
0374
0375 pinctrl_pwm6: pwm6grp-1 {
0376 fsl,pins = <
0377 /* red LED */
0378 MX6SX_PAD_RGMII2_TD2__PWM6_OUT 0x1b0b1
0379 >;
0380 };
0381
0382 pinctrl_sx9500: sx9500grp {
0383 fsl,pins = <
0384 /* Reset */
0385 MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x838
0386 /* IRQ */
0387 MX6SX_PAD_KEY_ROW1__GPIO2_IO_16 0x70e0
0388 >;
0389 };
0390
0391 pinctrl_uart1: uart1grp {
0392 fsl,pins = <
0393 MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1
0394 MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX 0x1b0b1
0395 >;
0396 };
0397
0398 pinctrl_uart2: uart2grp {
0399 fsl,pins = <
0400 MX6SX_PAD_GPIO1_IO06__UART2_DCE_TX 0x1b0b1
0401 MX6SX_PAD_GPIO1_IO07__UART2_DCE_RX 0x1b0b1
0402 >;
0403 };
0404
0405 pinctrl_usb_otg1: usbotg1grp {
0406 fsl,pins = <
0407 MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0
0408 >;
0409 };
0410
0411 pinctrl_usb_otg1_id: usbotg1idgrp {
0412 fsl,pins = <
0413 MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059
0414 >;
0415 };
0416
0417 pinctrl_usdhc2_50mhz: usdhc2grp-50mhz {
0418 fsl,pins = <
0419 MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059
0420 MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059
0421 MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059
0422 MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059
0423 MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059
0424 MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059
0425 MX6SX_PAD_LCD1_VSYNC__GPIO3_IO_28 0x1b000
0426 MX6SX_PAD_LCD1_HSYNC__GPIO3_IO_26 0x10b0
0427 >;
0428 };
0429
0430 pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
0431 fsl,pins = <
0432 MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x100b9
0433 MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x170b9
0434 MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x170b9
0435 MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x170b9
0436 MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x170b9
0437 MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x170b9
0438 >;
0439 };
0440
0441 pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
0442 fsl,pins = <
0443 MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x100f9
0444 MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x170f9
0445 MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x170f9
0446 MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x170f9
0447 MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x170f9
0448 MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x170f9
0449 >;
0450 };
0451
0452 pinctrl_usdhc4_50mhz: usdhc4grp-50mhz {
0453 fsl,pins = <
0454 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
0455 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
0456 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
0457 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
0458 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
0459 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
0460 MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x17059
0461 MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x17059
0462 MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x17059
0463 MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x17059
0464 MX6SX_PAD_SD4_RESET_B__USDHC4_RESET_B 0x17068
0465 >;
0466 };
0467
0468 pinctrl_usdhc4_100mhz: usdhc4-100mhz {
0469 fsl,pins = <
0470 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x100b9
0471 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x170b9
0472 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x170b9
0473 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x170b9
0474 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x170b9
0475 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x170b9
0476 MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x170b9
0477 MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x170b9
0478 MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x170b9
0479 MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x170b9
0480 >;
0481 };
0482
0483 pinctrl_usdhc4_200mhz: usdhc4-200mhz {
0484 fsl,pins = <
0485 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x100f9
0486 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x170f9
0487 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x170f9
0488 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x170f9
0489 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x170f9
0490 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x170f9
0491 MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x170f9
0492 MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x170f9
0493 MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x170f9
0494 MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x170f9
0495 >;
0496 };
0497 };
0498
0499 &pcie {
0500 pinctrl-names = "default";
0501 pinctrl-0 = <&pinctrl_pcie>;
0502 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>;
0503 reset-gpio-active-high;
0504 status = "okay";
0505 };
0506
0507 &pwm1 {
0508 #pwm-cells = <2>;
0509 pinctrl-names = "default";
0510 pinctrl-0 = <&pinctrl_pwm1>;
0511 status = "okay";
0512 };
0513
0514 &pwm2 {
0515 #pwm-cells = <2>;
0516 pinctrl-names = "default";
0517 pinctrl-0 = <&pinctrl_pwm2>;
0518 status = "okay";
0519 };
0520
0521 &pwm6 {
0522 #pwm-cells = <2>;
0523 pinctrl-names = "default";
0524 pinctrl-0 = <&pinctrl_pwm6>;
0525 status = "okay";
0526 };
0527
0528 ®_arm {
0529 vin-supply = <&sw1a_reg>;
0530 };
0531
0532 ®_soc {
0533 vin-supply = <&sw1a_reg>;
0534 };
0535
0536 &snvs_poweroff {
0537 status = "okay";
0538 };
0539
0540 &uart1 {
0541 pinctrl-names = "default";
0542 pinctrl-0 = <&pinctrl_uart1>;
0543 status = "okay";
0544 };
0545
0546 &uart2 {
0547 pinctrl-names = "default";
0548 pinctrl-0 = <&pinctrl_uart2>;
0549 status = "okay";
0550 };
0551
0552 &usbotg1 {
0553 vbus-supply = <®_usb_otg1_vbus>;
0554 pinctrl-names = "default";
0555 pinctrl-0 = <&pinctrl_usb_otg1_id>;
0556 status = "okay";
0557 };
0558
0559 &usbotg2 {
0560 dr_mode = "host";
0561 status = "okay";
0562 };
0563
0564 &usdhc2 {
0565 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0566 pinctrl-0 = <&pinctrl_usdhc2_50mhz>;
0567 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
0568 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
0569 cd-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
0570 keep-power-in-suspend;
0571 status = "okay";
0572 };
0573
0574 &usdhc4 {
0575 /* hs200-mode is currently unsupported because Vccq is on 3.1V, but
0576 * not on necessary 1.8V.
0577 */
0578 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0579 pinctrl-0 = <&pinctrl_usdhc4_50mhz>;
0580 pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
0581 pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
0582 bus-width = <8>;
0583 keep-power-in-suspend;
0584 non-removable;
0585 cap-mmc-hw-reset;
0586 status = "okay";
0587 };
