0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // Copyright (C) 2014 Freescale Semiconductor, Inc.
0004
0005 /dts-v1/;
0006
0007 #include "imx6sx.dtsi"
0008
0009 / {
0010 model = "Freescale i.MX6 SoloX Sabre Auto Board";
0011 compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
0012
0013 memory@80000000 {
0014 device_type = "memory";
0015 reg = <0x80000000 0x80000000>;
0016 };
0017
0018 leds {
0019 compatible = "gpio-leds";
0020 pinctrl-names = "default";
0021 pinctrl-0 = <&pinctrl_led>;
0022
0023 user {
0024 label = "debug";
0025 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
0026 linux,default-trigger = "heartbeat";
0027 };
0028 };
0029
0030 vcc_sd3: regulator-vcc-sd3 {
0031 compatible = "regulator-fixed";
0032 pinctrl-names = "default";
0033 pinctrl-0 = <&pinctrl_vcc_sd3>;
0034 regulator-name = "VCC_SD3";
0035 regulator-min-microvolt = <3000000>;
0036 regulator-max-microvolt = <3000000>;
0037 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
0038 enable-active-high;
0039 };
0040
0041 reg_can_wake: regulator-can-wake {
0042 compatible = "regulator-fixed";
0043 regulator-name = "can-wake";
0044 regulator-min-microvolt = <3300000>;
0045 regulator-max-microvolt = <3300000>;
0046 gpio = <&max7310_b 7 GPIO_ACTIVE_HIGH>;
0047 enable-active-high;
0048 };
0049
0050 reg_can_en: regulator-can-en {
0051 compatible = "regulator-fixed";
0052 regulator-name = "can-en";
0053 regulator-min-microvolt = <3300000>;
0054 regulator-max-microvolt = <3300000>;
0055 gpio = <&max7310_b 5 GPIO_ACTIVE_HIGH>;
0056 enable-active-high;
0057 vin-supply = <®_can_wake>;
0058 };
0059
0060 reg_can_stby: regulator-can-stby {
0061 compatible = "regulator-fixed";
0062 regulator-name = "can-stby";
0063 regulator-min-microvolt = <3300000>;
0064 regulator-max-microvolt = <3300000>;
0065 gpio = <&max7310_b 4 GPIO_ACTIVE_HIGH>;
0066 enable-active-high;
0067 vin-supply = <®_can_en>;
0068 };
0069
0070 reg_cs42888: cs42888_supply {
0071 compatible = "regulator-fixed";
0072 regulator-name = "cs42888_supply";
0073 regulator-min-microvolt = <3300000>;
0074 regulator-max-microvolt = <3300000>;
0075 regulator-always-on;
0076 };
0077
0078 sound-cs42888 {
0079 compatible = "fsl,imx6-sabreauto-cs42888",
0080 "fsl,imx-audio-cs42888";
0081 model = "imx-cs42888";
0082 audio-cpu = <&esai>;
0083 audio-asrc = <&asrc>;
0084 audio-codec = <&cs42888>;
0085 audio-routing =
0086 "Line Out Jack", "AOUT1L",
0087 "Line Out Jack", "AOUT1R",
0088 "Line Out Jack", "AOUT2L",
0089 "Line Out Jack", "AOUT2R",
0090 "Line Out Jack", "AOUT3L",
0091 "Line Out Jack", "AOUT3R",
0092 "Line Out Jack", "AOUT4L",
0093 "Line Out Jack", "AOUT4R",
0094 "AIN1L", "Line In Jack",
0095 "AIN1R", "Line In Jack",
0096 "AIN2L", "Line In Jack",
0097 "AIN2R", "Line In Jack";
0098 };
0099
0100 sound-spdif {
0101 compatible = "fsl,imx-audio-spdif";
0102 model = "imx-spdif";
0103 spdif-controller = <&spdif>;
0104 spdif-in;
0105 };
0106 };
0107
0108 &anaclk2 {
0109 clock-frequency = <24576000>;
0110 };
0111
0112 &clks {
0113 assigned-clocks = <&clks IMX6SX_PLL4_BYPASS_SRC>,
0114 <&clks IMX6SX_PLL4_BYPASS>,
0115 <&clks IMX6SX_CLK_PLL4_POST_DIV>;
0116 assigned-clock-parents = <&clks IMX6SX_CLK_LVDS2_IN>,
0117 <&clks IMX6SX_PLL4_BYPASS_SRC>;
0118 assigned-clock-rates = <0>, <0>, <24576000>;
0119 };
0120
0121 &esai {
0122 pinctrl-names = "default";
0123 pinctrl-0 = <&pinctrl_esai>;
0124 assigned-clocks = <&clks IMX6SX_CLK_ESAI_SEL>,
0125 <&clks IMX6SX_CLK_ESAI_EXTAL>;
0126 assigned-clock-parents = <&clks IMX6SX_CLK_PLL4_AUDIO_DIV>;
0127 assigned-clock-rates = <0>, <24576000>;
0128 status = "okay";
0129 };
0130
0131 &fec1 {
0132 pinctrl-names = "default";
0133 pinctrl-0 = <&pinctrl_enet1>;
0134 phy-mode = "rgmii-id";
0135 phy-handle = <ðphy1>;
0136 fsl,magic-packet;
0137 status = "okay";
0138
0139 mdio {
0140 #address-cells = <1>;
0141 #size-cells = <0>;
0142
0143 ethphy0: ethernet-phy@0 {
0144 compatible = "ethernet-phy-ieee802.3-c22";
0145 reg = <0>;
0146 };
0147
0148 ethphy1: ethernet-phy@1 {
0149 compatible = "ethernet-phy-ieee802.3-c22";
0150 reg = <1>;
0151 };
0152 };
0153 };
0154
0155 &fec2 {
0156 pinctrl-names = "default";
0157 pinctrl-0 = <&pinctrl_enet2>;
0158 phy-mode = "rgmii-id";
0159 phy-handle = <ðphy0>;
0160 fsl,magic-packet;
0161 status = "okay";
0162 };
0163
0164 &flexcan1 {
0165 pinctrl-names = "default";
0166 pinctrl-0 = <&pinctrl_flexcan1>;
0167 xceiver-supply = <®_can_stby>;
0168 status = "okay";
0169 };
0170
0171 &flexcan2 {
0172 pinctrl-names = "default";
0173 pinctrl-0 = <&pinctrl_flexcan2>;
0174 xceiver-supply = <®_can_stby>;
0175 status = "okay";
0176 };
0177
0178 &uart1 {
0179 pinctrl-names = "default";
0180 pinctrl-0 = <&pinctrl_uart1>;
0181 status = "okay";
0182 };
0183
0184 &usdhc3 {
0185 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0186 pinctrl-0 = <&pinctrl_usdhc3>;
0187 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
0188 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
0189 bus-width = <8>;
0190 cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
0191 wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
0192 keep-power-in-suspend;
0193 wakeup-source;
0194 vmmc-supply = <&vcc_sd3>;
0195 status = "okay";
0196 };
0197
0198 &usdhc4 {
0199 pinctrl-names = "default";
0200 pinctrl-0 = <&pinctrl_usdhc4>;
0201 bus-width = <8>;
0202 cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
0203 no-1-8-v;
0204 keep-power-in-suspend;
0205 wakeup-source;
0206 status = "okay";
0207 };
0208
0209 &iomuxc {
0210 pinctrl_egalax_int: egalax-intgrp {
0211 fsl,pins = <
0212 MX6SX_PAD_SD4_RESET_B__GPIO6_IO_22 0x10b0
0213 >;
0214 };
0215
0216 pinctrl_enet1: enet1grp {
0217 fsl,pins = <
0218 MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1
0219 MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1
0220 MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b9
0221 MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1
0222 MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1
0223 MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1
0224 MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1
0225 MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1
0226 MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
0227 MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
0228 MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
0229 MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
0230 MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
0231 MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
0232 >;
0233 };
0234
0235 pinctrl_enet2: enet2grp {
0236 fsl,pins = <
0237 MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0xa0b9
0238 MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0xa0b1
0239 MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0xa0b1
0240 MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0xa0b1
0241 MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0xa0b1
0242 MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0xa0b1
0243 MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081
0244 MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081
0245 MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081
0246 MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081
0247 MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081
0248 MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081
0249 >;
0250 };
0251
0252 pinctrl_esai: esaigrp {
0253 fsl,pins = <
0254 MX6SX_PAD_CSI_DATA00__ESAI_TX_CLK 0x1b030
0255 MX6SX_PAD_CSI_DATA01__ESAI_TX_FS 0x1b030
0256 MX6SX_PAD_CSI_HSYNC__ESAI_TX0 0x1b030
0257 MX6SX_PAD_CSI_DATA04__ESAI_TX1 0x1b030
0258 MX6SX_PAD_CSI_DATA06__ESAI_TX2_RX3 0x1b030
0259 MX6SX_PAD_CSI_DATA07__ESAI_TX3_RX2 0x1b030
0260 MX6SX_PAD_CSI_DATA02__ESAI_RX_CLK 0x1b030
0261 MX6SX_PAD_CSI_DATA03__ESAI_RX_FS 0x1b030
0262 MX6SX_PAD_CSI_VSYNC__ESAI_TX5_RX0 0x1b030
0263 MX6SX_PAD_CSI_DATA05__ESAI_TX4_RX1 0x1b030
0264 >;
0265 };
0266
0267 pinctrl_flexcan1: flexcan1grp {
0268 fsl,pins = <
0269 MX6SX_PAD_QSPI1B_DQS__CAN1_TX 0x1b020
0270 MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b020
0271 >;
0272 };
0273
0274 pinctrl_flexcan2: flexcan2grp {
0275 fsl,pins = <
0276 MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b020
0277 MX6SX_PAD_QSPI1A_DQS__CAN2_TX 0x1b020
0278 >;
0279 };
0280
0281 pinctrl_i2c2: i2c2grp {
0282 fsl,pins = <
0283 MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1
0284 MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1
0285 >;
0286 };
0287
0288 pinctrl_i2c3: i2c3grp {
0289 fsl,pins = <
0290 MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
0291 MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1
0292 >;
0293 };
0294
0295 pinctrl_led: ledgrp {
0296 fsl,pins = <
0297 MX6SX_PAD_CSI_PIXCLK__GPIO1_IO_24 0x17059
0298 >;
0299 };
0300
0301 pinctrl_spdif: spdifgrp {
0302 fsl,pins = <
0303 MX6SX_PAD_ENET2_COL__SPDIF_IN 0x1b0b0
0304 >;
0305 };
0306
0307 pinctrl_uart1: uart1grp {
0308 fsl,pins = <
0309 MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1
0310 MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX 0x1b0b1
0311 >;
0312 };
0313
0314 pinctrl_usdhc3: usdhc3grp {
0315 fsl,pins = <
0316 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
0317 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
0318 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
0319 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
0320 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
0321 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
0322 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
0323 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
0324 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
0325 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
0326 MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
0327 MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
0328 >;
0329 };
0330
0331 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
0332 fsl,pins = <
0333 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
0334 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
0335 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
0336 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
0337 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
0338 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
0339 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
0340 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
0341 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
0342 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
0343 >;
0344 };
0345
0346 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
0347 fsl,pins = <
0348 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
0349 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
0350 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
0351 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
0352 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
0353 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
0354 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
0355 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
0356 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
0357 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
0358 >;
0359 };
0360
0361 pinctrl_usdhc4: usdhc4grp {
0362 fsl,pins = <
0363 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
0364 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
0365 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
0366 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
0367 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
0368 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
0369 MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
0370 MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
0371 >;
0372 };
0373
0374 pinctrl_vcc_sd3: vccsd3grp {
0375 fsl,pins = <
0376 MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
0377 >;
0378 };
0379
0380 pinctrl_wdog: wdoggrp {
0381 fsl,pins = <
0382 MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0
0383 >;
0384 };
0385 };
0386
0387 &i2c2 {
0388 clock-frequency = <100000>;
0389 pinctrl-names = "default";
0390 pinctrl-0 = <&pinctrl_i2c2>;
0391 status = "okay";
0392
0393 cs42888: cs42888@48 {
0394 compatible = "cirrus,cs42888";
0395 reg = <0x48>;
0396 clocks = <&anaclk2 0>;
0397 clock-names = "mclk";
0398 VA-supply = <®_cs42888>;
0399 VD-supply = <®_cs42888>;
0400 VLS-supply = <®_cs42888>;
0401 VLC-supply = <®_cs42888>;
0402 };
0403
0404 touchscreen@4 {
0405 compatible = "eeti,egalax_ts";
0406 reg = <0x04>;
0407 pinctrl-names = "default";
0408 pinctrl-0 = <&pinctrl_egalax_int>;
0409 interrupt-parent = <&gpio6>;
0410 interrupts = <22 IRQ_TYPE_EDGE_FALLING>;
0411 wakeup-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>;
0412 };
0413
0414 pfuze100: pmic@8 {
0415 compatible = "fsl,pfuze100";
0416 reg = <0x08>;
0417
0418 regulators {
0419 sw1a_reg: sw1ab {
0420 regulator-min-microvolt = <300000>;
0421 regulator-max-microvolt = <1875000>;
0422 regulator-boot-on;
0423 regulator-always-on;
0424 regulator-ramp-delay = <6250>;
0425 };
0426
0427 sw1c_reg: sw1c {
0428 regulator-min-microvolt = <300000>;
0429 regulator-max-microvolt = <1875000>;
0430 regulator-boot-on;
0431 regulator-always-on;
0432 regulator-ramp-delay = <6250>;
0433 };
0434
0435 sw2_reg: sw2 {
0436 regulator-min-microvolt = <800000>;
0437 regulator-max-microvolt = <3300000>;
0438 regulator-boot-on;
0439 regulator-always-on;
0440 };
0441
0442 sw3a_reg: sw3a {
0443 regulator-min-microvolt = <400000>;
0444 regulator-max-microvolt = <1975000>;
0445 regulator-boot-on;
0446 regulator-always-on;
0447 };
0448
0449 sw3b_reg: sw3b {
0450 regulator-min-microvolt = <400000>;
0451 regulator-max-microvolt = <1975000>;
0452 regulator-boot-on;
0453 regulator-always-on;
0454 };
0455
0456 sw4_reg: sw4 {
0457 regulator-min-microvolt = <800000>;
0458 regulator-max-microvolt = <3300000>;
0459 regulator-always-on;
0460 };
0461
0462 swbst_reg: swbst {
0463 regulator-min-microvolt = <5000000>;
0464 regulator-max-microvolt = <5150000>;
0465 };
0466
0467 snvs_reg: vsnvs {
0468 regulator-min-microvolt = <1000000>;
0469 regulator-max-microvolt = <3000000>;
0470 regulator-boot-on;
0471 regulator-always-on;
0472 };
0473
0474 vref_reg: vrefddr {
0475 regulator-boot-on;
0476 regulator-always-on;
0477 };
0478
0479 vgen1_reg: vgen1 {
0480 regulator-min-microvolt = <800000>;
0481 regulator-max-microvolt = <1550000>;
0482 regulator-always-on;
0483 };
0484
0485 vgen2_reg: vgen2 {
0486 regulator-min-microvolt = <800000>;
0487 regulator-max-microvolt = <1550000>;
0488 };
0489
0490 vgen3_reg: vgen3 {
0491 regulator-min-microvolt = <1800000>;
0492 regulator-max-microvolt = <3300000>;
0493 regulator-always-on;
0494 };
0495
0496 vgen4_reg: vgen4 {
0497 regulator-min-microvolt = <1800000>;
0498 regulator-max-microvolt = <3300000>;
0499 regulator-always-on;
0500 };
0501
0502 vgen5_reg: vgen5 {
0503 regulator-min-microvolt = <1800000>;
0504 regulator-max-microvolt = <3300000>;
0505 regulator-always-on;
0506 };
0507
0508 vgen6_reg: vgen6 {
0509 regulator-min-microvolt = <1800000>;
0510 regulator-max-microvolt = <3300000>;
0511 regulator-always-on;
0512 };
0513 };
0514 };
0515
0516 max7322: gpio@68 {
0517 compatible = "maxim,max7322";
0518 reg = <0x68>;
0519 gpio-controller;
0520 #gpio-cells = <2>;
0521 };
0522 };
0523
0524 &i2c3 {
0525 clock-frequency = <100000>;
0526 pinctrl-names = "default";
0527 pinctrl-0 = <&pinctrl_i2c3>;
0528 status = "okay";
0529
0530 max7310_a: gpio@30 {
0531 compatible = "maxim,max7310";
0532 reg = <0x30>;
0533 gpio-controller;
0534 #gpio-cells = <2>;
0535 };
0536
0537 max7310_b: gpio@32 {
0538 compatible = "maxim,max7310";
0539 reg = <0x32>;
0540 gpio-controller;
0541 #gpio-cells = <2>;
0542 };
0543 };
0544
0545 &spdif {
0546 pinctrl-names = "default";
0547 pinctrl-0 = <&pinctrl_spdif>;
0548 assigned-clocks = <&clks IMX6SX_CLK_SPDIF_PODF>;
0549 assigned-clock-rates = <24576000>;
0550 status = "okay";
0551 };
0552
0553 &wdog1 {
0554 pinctrl-names = "default";
0555 pinctrl-0 = <&pinctrl_wdog>;
0556 fsl,ext-reset-output;
0557 };
