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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: (GPL-2.0)
0002 /*
0003  * Device tree for the Kobo Clara HD ebook reader
0004  *
0005  * Name on mainboard is: 37NB-E60K00+4A4
0006  * Serials start with: E60K02 (a number also seen in
0007  * vendor kernel sources)
0008  *
0009  * This mainboard seems to be equipped with different SoCs.
0010  * In the Kobo Clara HD ebook reader it is an i.MX6SLL
0011  *
0012  * Copyright 2019 Andreas Kemnade
0013  * based on works
0014  * Copyright 2016 Freescale Semiconductor, Inc.
0015  */
0016 
0017 /dts-v1/;
0018 
0019 #include <dt-bindings/input/input.h>
0020 #include <dt-bindings/gpio/gpio.h>
0021 #include "imx6sll.dtsi"
0022 #include "e60k02.dtsi"
0023 
0024 / {
0025         model = "Kobo Clara HD";
0026         compatible = "kobo,clarahd", "fsl,imx6sll";
0027 };
0028 
0029 &clks {
0030         assigned-clocks = <&clks IMX6SLL_CLK_PLL4_AUDIO_DIV>;
0031         assigned-clock-rates = <393216000>;
0032 };
0033 
0034 &cpu0 {
0035         arm-supply = <&dcdc3_reg>;
0036         soc-supply = <&dcdc1_reg>;
0037 };
0038 
0039 &gpio_keys {
0040         pinctrl-names = "default";
0041         pinctrl-0 = <&pinctrl_gpio_keys>;
0042 };
0043 
0044 &i2c1 {
0045         pinctrl-names = "default","sleep";
0046         pinctrl-0 = <&pinctrl_i2c1>;
0047         pinctrl-1 = <&pinctrl_i2c1_sleep>;
0048 };
0049 
0050 &i2c2 {
0051         pinctrl-names = "default","sleep";
0052         pinctrl-0 = <&pinctrl_i2c2>;
0053         pinctrl-1 = <&pinctrl_i2c2_sleep>;
0054 };
0055 
0056 &i2c3 {
0057         pinctrl-names = "default";
0058         pinctrl-0 = <&pinctrl_i2c3>;
0059 };
0060 
0061 &iomuxc {
0062         pinctrl-names = "default";
0063         pinctrl-0 = <&pinctrl_hog>;
0064 
0065         pinctrl_gpio_keys: gpio-keysgrp {
0066                 fsl,pins = <
0067                         MX6SLL_PAD_SD1_DATA1__GPIO5_IO08        0x17059 /* PWR_SW */
0068                         MX6SLL_PAD_SD1_DATA4__GPIO5_IO12        0x17059 /* HALL_EN */
0069                 >;
0070         };
0071 
0072         pinctrl_hog: hoggrp {
0073                 fsl,pins = <
0074                         MX6SLL_PAD_LCD_DATA00__GPIO2_IO20       0x79
0075                         MX6SLL_PAD_LCD_DATA01__GPIO2_IO21       0x79
0076                         MX6SLL_PAD_LCD_DATA02__GPIO2_IO22       0x79
0077                         MX6SLL_PAD_LCD_DATA03__GPIO2_IO23       0x79
0078                         MX6SLL_PAD_LCD_DATA04__GPIO2_IO24       0x79
0079                         MX6SLL_PAD_LCD_DATA05__GPIO2_IO25       0x79
0080                         MX6SLL_PAD_LCD_DATA06__GPIO2_IO26       0x79
0081                         MX6SLL_PAD_LCD_DATA07__GPIO2_IO27       0x79
0082                         MX6SLL_PAD_LCD_DATA08__GPIO2_IO28       0x79
0083                         MX6SLL_PAD_LCD_DATA09__GPIO2_IO29       0x79
0084                         MX6SLL_PAD_LCD_DATA10__GPIO2_IO30       0x79
0085                         MX6SLL_PAD_LCD_DATA11__GPIO2_IO31       0x79
0086                         MX6SLL_PAD_LCD_DATA12__GPIO3_IO00       0x79
0087                         MX6SLL_PAD_LCD_DATA13__GPIO3_IO01       0x79
0088                         MX6SLL_PAD_LCD_DATA14__GPIO3_IO02       0x79
0089                         MX6SLL_PAD_LCD_DATA15__GPIO3_IO03       0x79
0090                         MX6SLL_PAD_LCD_DATA16__GPIO3_IO04       0x79
0091                         MX6SLL_PAD_LCD_DATA17__GPIO3_IO05       0x79
0092                         MX6SLL_PAD_LCD_DATA18__GPIO3_IO06       0x79
0093                         MX6SLL_PAD_LCD_DATA19__GPIO3_IO07       0x79
0094                         MX6SLL_PAD_LCD_DATA20__GPIO3_IO08       0x79
0095                         MX6SLL_PAD_LCD_DATA21__GPIO3_IO09       0x79
0096                         MX6SLL_PAD_LCD_DATA22__GPIO3_IO10       0x79
0097                         MX6SLL_PAD_LCD_DATA23__GPIO3_IO11       0x79
0098                         MX6SLL_PAD_LCD_CLK__GPIO2_IO15          0x79
0099                         MX6SLL_PAD_LCD_ENABLE__GPIO2_IO16       0x79
0100                         MX6SLL_PAD_LCD_HSYNC__GPIO2_IO17        0x79
0101                         MX6SLL_PAD_LCD_VSYNC__GPIO2_IO18        0x79
0102                         MX6SLL_PAD_LCD_RESET__GPIO2_IO19        0x79
0103                         MX6SLL_PAD_KEY_COL3__GPIO3_IO30         0x79
0104                         MX6SLL_PAD_KEY_ROW7__GPIO4_IO07         0x79
0105                         MX6SLL_PAD_ECSPI2_MOSI__GPIO4_IO13      0x79
0106                         MX6SLL_PAD_KEY_COL5__GPIO4_IO02         0x79
0107                 >;
0108         };
0109 
0110         pinctrl_i2c1: i2c1grp {
0111                 fsl,pins = <
0112                         MX6SLL_PAD_I2C1_SCL__I2C1_SCL   0x4001f8b1
0113                         MX6SLL_PAD_I2C1_SDA__I2C1_SDA   0x4001f8b1
0114                 >;
0115         };
0116 
0117         pinctrl_i2c1_sleep: i2c1grp-sleep {
0118                 fsl,pins = <
0119                         MX6SLL_PAD_I2C1_SCL__I2C1_SCL   0x400108b1
0120                         MX6SLL_PAD_I2C1_SDA__I2C1_SDA   0x400108b1
0121                 >;
0122         };
0123 
0124         pinctrl_i2c2: i2c2grp {
0125                 fsl,pins = <
0126                         MX6SLL_PAD_I2C2_SCL__I2C2_SCL   0x4001f8b1
0127                         MX6SLL_PAD_I2C2_SDA__I2C2_SDA   0x4001f8b1
0128                 >;
0129         };
0130 
0131         pinctrl_i2c2_sleep: i2c2grp-sleep {
0132                 fsl,pins = <
0133                         MX6SLL_PAD_I2C2_SCL__I2C2_SCL   0x400108b1
0134                         MX6SLL_PAD_I2C2_SDA__I2C2_SDA   0x400108b1
0135                 >;
0136         };
0137 
0138         pinctrl_i2c3: i2c3grp {
0139                 fsl,pins = <
0140                         MX6SLL_PAD_REF_CLK_24M__I2C3_SCL 0x4001f8b1
0141                         MX6SLL_PAD_REF_CLK_32K__I2C3_SDA 0x4001f8b1
0142                 >;
0143         };
0144 
0145         pinctrl_led: ledgrp {
0146                 fsl,pins = <
0147                         MX6SLL_PAD_SD1_DATA6__GPIO5_IO07 0x17059
0148                 >;
0149         };
0150 
0151         pinctrl_lm3630a_bl_gpio: lm3630a-bl-gpiogrp {
0152                 fsl,pins = <
0153                         MX6SLL_PAD_EPDC_PWR_CTRL3__GPIO2_IO10   0x10059 /* HWEN */
0154                 >;
0155         };
0156 
0157         pinctrl_ricoh_gpio: ricoh-gpiogrp {
0158                 fsl,pins = <
0159                         MX6SLL_PAD_SD1_CLK__GPIO5_IO15  0x1b8b1 /* ricoh619 chg */
0160                         MX6SLL_PAD_SD1_DATA0__GPIO5_IO11 0x1b8b1 /* ricoh619 irq */
0161                         MX6SLL_PAD_KEY_COL2__GPIO3_IO28 0x1b8b1 /* ricoh619 bat_low_int */
0162                 >;
0163         };
0164 
0165         pinctrl_uart1: uart1grp {
0166                 fsl,pins = <
0167                         MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1
0168                         MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1
0169                 >;
0170         };
0171 
0172         pinctrl_uart4: uart4grp {
0173                 fsl,pins = <
0174                         MX6SLL_PAD_KEY_ROW6__UART4_DCE_TX 0x1b0b1
0175                         MX6SLL_PAD_KEY_COL6__UART4_DCE_RX 0x1b0b1
0176                 >;
0177         };
0178 
0179         pinctrl_usbotg1: usbotg1grp {
0180                 fsl,pins = <
0181                         MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059
0182                 >;
0183         };
0184 
0185         pinctrl_usdhc2: usdhc2grp {
0186                 fsl,pins = <
0187                         MX6SLL_PAD_SD2_CMD__SD2_CMD             0x17059
0188                         MX6SLL_PAD_SD2_CLK__SD2_CLK             0x13059
0189                         MX6SLL_PAD_SD2_DATA0__SD2_DATA0         0x17059
0190                         MX6SLL_PAD_SD2_DATA1__SD2_DATA1         0x17059
0191                         MX6SLL_PAD_SD2_DATA2__SD2_DATA2         0x17059
0192                         MX6SLL_PAD_SD2_DATA3__SD2_DATA3         0x17059
0193                 >;
0194         };
0195 
0196         pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
0197                 fsl,pins = <
0198                         MX6SLL_PAD_SD2_CMD__SD2_CMD             0x170b9
0199                         MX6SLL_PAD_SD2_CLK__SD2_CLK             0x130b9
0200                         MX6SLL_PAD_SD2_DATA0__SD2_DATA0         0x170b9
0201                         MX6SLL_PAD_SD2_DATA1__SD2_DATA1         0x170b9
0202                         MX6SLL_PAD_SD2_DATA2__SD2_DATA2         0x170b9
0203                         MX6SLL_PAD_SD2_DATA3__SD2_DATA3         0x170b9
0204                 >;
0205         };
0206 
0207         pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
0208                 fsl,pins = <
0209                         MX6SLL_PAD_SD2_CMD__SD2_CMD             0x170f9
0210                         MX6SLL_PAD_SD2_CLK__SD2_CLK             0x130f9
0211                         MX6SLL_PAD_SD2_DATA0__SD2_DATA0         0x170f9
0212                         MX6SLL_PAD_SD2_DATA1__SD2_DATA1         0x170f9
0213                         MX6SLL_PAD_SD2_DATA2__SD2_DATA2         0x170f9
0214                         MX6SLL_PAD_SD2_DATA3__SD2_DATA3         0x170f9
0215                 >;
0216         };
0217 
0218         pinctrl_usdhc2_sleep: usdhc2grp-sleep {
0219                 fsl,pins = <
0220                         MX6SLL_PAD_SD2_CMD__GPIO5_IO04          0x100f9
0221                         MX6SLL_PAD_SD2_CLK__GPIO5_IO05          0x100f9
0222                         MX6SLL_PAD_SD2_DATA0__GPIO5_IO01        0x100f9
0223                         MX6SLL_PAD_SD2_DATA1__GPIO4_IO30        0x100f9
0224                         MX6SLL_PAD_SD2_DATA2__GPIO5_IO03        0x100f9
0225                         MX6SLL_PAD_SD2_DATA3__GPIO4_IO28        0x100f9
0226                 >;
0227         };
0228 
0229         pinctrl_usdhc3: usdhc3grp {
0230                 fsl,pins = <
0231                         MX6SLL_PAD_SD3_CMD__SD3_CMD     0x11059
0232                         MX6SLL_PAD_SD3_CLK__SD3_CLK     0x11059
0233                         MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x11059
0234                         MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x11059
0235                         MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x11059
0236                         MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x11059
0237                 >;
0238         };
0239 
0240         pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
0241                 fsl,pins = <
0242                         MX6SLL_PAD_SD3_CMD__SD3_CMD     0x170b9
0243                         MX6SLL_PAD_SD3_CLK__SD3_CLK     0x170b9
0244                         MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170b9
0245                         MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170b9
0246                         MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170b9
0247                         MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170b9
0248                 >;
0249         };
0250 
0251         pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
0252                 fsl,pins = <
0253                         MX6SLL_PAD_SD3_CMD__SD3_CMD     0x170f9
0254                         MX6SLL_PAD_SD3_CLK__SD3_CLK     0x170f9
0255                         MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170f9
0256                         MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170f9
0257                         MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170f9
0258                         MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170f9
0259                 >;
0260         };
0261 
0262         pinctrl_usdhc3_sleep: usdhc3grp-sleep {
0263                 fsl,pins = <
0264                         MX6SLL_PAD_SD3_CMD__GPIO5_IO21  0x100c1
0265                         MX6SLL_PAD_SD3_CLK__GPIO5_IO18  0x100c1
0266                         MX6SLL_PAD_SD3_DATA0__GPIO5_IO19        0x100c1
0267                         MX6SLL_PAD_SD3_DATA1__GPIO5_IO20        0x100c1
0268                         MX6SLL_PAD_SD3_DATA2__GPIO5_IO16        0x100c1
0269                         MX6SLL_PAD_SD3_DATA3__GPIO5_IO17        0x100c1
0270                 >;
0271         };
0272 
0273         pinctrl_wifi_power: wifi-powergrp {
0274                 fsl,pins = <
0275                         MX6SLL_PAD_SD2_DATA6__GPIO4_IO29        0x10059         /* WIFI_3V3_ON */
0276                 >;
0277         };
0278 
0279         pinctrl_wifi_reset: wifi-resetgrp {
0280                 fsl,pins = <
0281                         MX6SLL_PAD_SD2_DATA7__GPIO5_IO00        0x10059         /* WIFI_RST */
0282                 >;
0283         };
0284 };
0285 
0286 &leds {
0287         pinctrl-names = "default";
0288         pinctrl-0 = <&pinctrl_led>;
0289 };
0290 
0291 &lm3630a {
0292         pinctrl-names = "default";
0293         pinctrl-0 = <&pinctrl_lm3630a_bl_gpio>;
0294 };
0295 
0296 &reg_wifi {
0297         pinctrl-names = "default";
0298         pinctrl-0 = <&pinctrl_wifi_power>;
0299 };
0300 
0301 &ricoh619 {
0302         pinctrl-names = "default";
0303         pinctrl-0 = <&pinctrl_ricoh_gpio>;
0304 };
0305 
0306 &uart1 {
0307         pinctrl-names = "default";
0308         pinctrl-0 = <&pinctrl_uart1>;
0309 };
0310 
0311 &uart4 {
0312         pinctrl-names = "default";
0313         pinctrl-0 = <&pinctrl_uart4>;
0314 };
0315 
0316 &usdhc2 {
0317         pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep";
0318         pinctrl-0 = <&pinctrl_usdhc2>;
0319         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
0320         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
0321         pinctrl-3 = <&pinctrl_usdhc2_sleep>;
0322 };
0323 
0324 &usdhc3 {
0325         pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep";
0326         pinctrl-0 = <&pinctrl_usdhc3>;
0327         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
0328         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
0329         pinctrl-3 = <&pinctrl_usdhc3_sleep>;
0330 };
0331 
0332 &wifi_pwrseq {
0333         pinctrl-names = "default";
0334         pinctrl-0 = <&pinctrl_wifi_reset>;
0335 };