0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Copyright 2013 Freescale Semiconductor, Inc.
0004 *
0005 * Author: Fabio Estevam <fabio.estevam@freescale.com>
0006 */
0007
0008 #include <dt-bindings/gpio/gpio.h>
0009
0010 / {
0011 chosen {
0012 stdout-path = &uart1;
0013 };
0014
0015 sound {
0016 compatible = "fsl,imx6-wandboard-sgtl5000",
0017 "fsl,imx-audio-sgtl5000";
0018 model = "imx6-wandboard-sgtl5000";
0019 ssi-controller = <&ssi1>;
0020 audio-codec = <&codec>;
0021 audio-routing =
0022 "MIC_IN", "Mic Jack",
0023 "Mic Jack", "Mic Bias",
0024 "Headphone Jack", "HP_OUT";
0025 mux-int-port = <1>;
0026 mux-ext-port = <3>;
0027 };
0028
0029 sound-spdif {
0030 compatible = "fsl,imx-audio-spdif";
0031 model = "imx-spdif";
0032 spdif-controller = <&spdif>;
0033 spdif-out;
0034 };
0035
0036 reg_1p5v: regulator-1p5v {
0037 compatible = "regulator-fixed";
0038 regulator-name = "1P5V";
0039 regulator-min-microvolt = <1500000>;
0040 regulator-max-microvolt = <1500000>;
0041 regulator-always-on;
0042 };
0043
0044 reg_1p8v: regulator-1p8v {
0045 compatible = "regulator-fixed";
0046 regulator-name = "1P8V";
0047 regulator-min-microvolt = <1800000>;
0048 regulator-max-microvolt = <1800000>;
0049 regulator-always-on;
0050 };
0051
0052 reg_2p8v: regulator-2p8v {
0053 compatible = "regulator-fixed";
0054 regulator-name = "2P8V";
0055 regulator-min-microvolt = <2800000>;
0056 regulator-max-microvolt = <2800000>;
0057 regulator-always-on;
0058 };
0059
0060 reg_2p5v: regulator-2p5v {
0061 compatible = "regulator-fixed";
0062 regulator-name = "2P5V";
0063 regulator-min-microvolt = <2500000>;
0064 regulator-max-microvolt = <2500000>;
0065 regulator-always-on;
0066 };
0067
0068 reg_3p3v: regulator-3p3v {
0069 compatible = "regulator-fixed";
0070 regulator-name = "3P3V";
0071 regulator-min-microvolt = <3300000>;
0072 regulator-max-microvolt = <3300000>;
0073 regulator-always-on;
0074 };
0075
0076 reg_usb_otg_vbus: regulator-usbotgvbus {
0077 compatible = "regulator-fixed";
0078 regulator-name = "usb_otg_vbus";
0079 regulator-min-microvolt = <5000000>;
0080 regulator-max-microvolt = <5000000>;
0081 pinctrl-names = "default";
0082 pinctrl-0 = <&pinctrl_usbotgvbus>;
0083 gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
0084 };
0085 };
0086
0087 &audmux {
0088 pinctrl-names = "default";
0089 pinctrl-0 = <&pinctrl_audmux>;
0090 status = "okay";
0091 };
0092
0093 &hdmi {
0094 ddc-i2c-bus = <&i2c1>;
0095 status = "okay";
0096 };
0097
0098 &i2c1 {
0099 clock-frequency = <100000>;
0100 pinctrl-names = "default", "gpio";
0101 pinctrl-0 = <&pinctrl_i2c1>;
0102 pinctrl-1 = <&pinctrl_i2c1_gpio>;
0103 scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0104 sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0105 status = "okay";
0106 };
0107
0108 &i2c2 {
0109 clock-frequency = <100000>;
0110 pinctrl-names = "default", "gpio";
0111 pinctrl-0 = <&pinctrl_i2c2>;
0112 pinctrl-1 = <&pinctrl_i2c2_gpio>;
0113 scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0114 sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0115 status = "okay";
0116
0117 codec: sgtl5000@a {
0118 pinctrl-names = "default";
0119 pinctrl-0 = <&pinctrl_mclk>;
0120 compatible = "fsl,sgtl5000";
0121 reg = <0x0a>;
0122 clocks = <&clks IMX6QDL_CLK_CKO>;
0123 VDDA-supply = <®_2p5v>;
0124 VDDIO-supply = <®_3p3v>;
0125 lrclk-strength = <3>;
0126 };
0127
0128 camera@3c {
0129 compatible = "ovti,ov5645";
0130 pinctrl-names = "default";
0131 pinctrl-0 = <&pinctrl_ov5645>;
0132 reg = <0x3c>;
0133 clocks = <&clks IMX6QDL_CLK_CKO2>;
0134 clock-names = "xclk";
0135 clock-frequency = <24000000>;
0136 vdddo-supply = <®_1p8v>;
0137 vdda-supply = <®_2p8v>;
0138 vddd-supply = <®_1p5v>;
0139 enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
0140 reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
0141
0142 port {
0143 ov5645_to_mipi_csi2: endpoint {
0144 remote-endpoint = <&mipi_csi2_in>;
0145 clock-lanes = <0>;
0146 data-lanes = <1 2>;
0147 };
0148 };
0149 };
0150 };
0151
0152 &iomuxc {
0153 pinctrl-names = "default";
0154
0155 imx6qdl-wandboard {
0156
0157 pinctrl_audmux: audmuxgrp {
0158 fsl,pins = <
0159 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
0160 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
0161 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
0162 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
0163 >;
0164 };
0165
0166 pinctrl_enet: enetgrp {
0167 fsl,pins = <
0168 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0169 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0170 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
0171 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
0172 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
0173 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
0174 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
0175 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0176 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
0177 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0178 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0179 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0180 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0181 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0182 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
0183 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
0184 >;
0185 };
0186
0187 pinctrl_i2c1: i2c1grp {
0188 fsl,pins = <
0189 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
0190 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
0191 >;
0192 };
0193
0194 pinctrl_i2c1_gpio: i2c1gpiogrp {
0195 fsl,pins = <
0196 MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b0
0197 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b0
0198 >;
0199 };
0200
0201 pinctrl_i2c2: i2c2grp {
0202 fsl,pins = <
0203 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0204 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0205 >;
0206 };
0207
0208 pinctrl_i2c2_gpio: i2c2gpiogrp {
0209 fsl,pins = <
0210 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b0
0211 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b0
0212 >;
0213 };
0214
0215 pinctrl_mclk: mclkgrp {
0216 fsl,pins = <
0217 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
0218 >;
0219 };
0220
0221 pinctrl_ov5645: ov5645grp {
0222 fsl,pins = <
0223 MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0
0224 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
0225 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0
0226 >;
0227 };
0228
0229 pinctrl_spdif: spdifgrp {
0230 fsl,pins = <
0231 MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
0232 >;
0233 };
0234
0235 pinctrl_uart1: uart1grp {
0236 fsl,pins = <
0237 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
0238 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
0239 >;
0240 };
0241
0242 pinctrl_uart3: uart3grp {
0243 fsl,pins = <
0244 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
0245 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
0246 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
0247 MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
0248 >;
0249 };
0250
0251 pinctrl_usbotg: usbotggrp {
0252 fsl,pins = <
0253 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
0254 >;
0255 };
0256
0257 pinctrl_usbotgvbus: usbotgvbusgrp {
0258 fsl,pins = <
0259 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
0260 >;
0261 };
0262
0263 pinctrl_usdhc1: usdhc1grp {
0264 fsl,pins = <
0265 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
0266 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
0267 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
0268 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
0269 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
0270 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
0271 >;
0272 };
0273
0274 pinctrl_usdhc2: usdhc2grp {
0275 fsl,pins = <
0276 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
0277 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
0278 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
0279 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
0280 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
0281 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
0282 >;
0283 };
0284
0285 pinctrl_usdhc3: usdhc3grp {
0286 fsl,pins = <
0287 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
0288 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
0289 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
0290 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
0291 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
0292 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
0293 >;
0294 };
0295 };
0296 };
0297
0298 &fec {
0299 pinctrl-names = "default";
0300 pinctrl-0 = <&pinctrl_enet>;
0301 phy-mode = "rgmii-id";
0302 phy-handle = <ðphy>;
0303 phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
0304 status = "okay";
0305
0306 mdio {
0307 #address-cells = <1>;
0308 #size-cells = <0>;
0309
0310 ethphy: ethernet-phy@1 {
0311 reg = <1>;
0312 qca,clk-out-frequency = <125000000>;
0313 };
0314 };
0315 };
0316
0317 &mipi_csi {
0318 status = "okay";
0319
0320 port@0 {
0321 reg = <0>;
0322
0323 mipi_csi2_in: endpoint {
0324 remote-endpoint = <&ov5645_to_mipi_csi2>;
0325 clock-lanes = <0>;
0326 data-lanes = <1 2>;
0327 };
0328 };
0329 };
0330
0331 &spdif {
0332 pinctrl-names = "default";
0333 pinctrl-0 = <&pinctrl_spdif>;
0334 status = "okay";
0335 };
0336
0337 &ssi1 {
0338 status = "okay";
0339 };
0340
0341 &uart1 {
0342 pinctrl-names = "default";
0343 pinctrl-0 = <&pinctrl_uart1>;
0344 status = "okay";
0345 };
0346
0347 &uart3 {
0348 pinctrl-names = "default";
0349 pinctrl-0 = <&pinctrl_uart3>;
0350 uart-has-rtscts;
0351 status = "okay";
0352 };
0353
0354 &usbh1 {
0355 status = "okay";
0356 };
0357
0358 &usbotg {
0359 vbus-supply = <®_usb_otg_vbus>;
0360 pinctrl-names = "default";
0361 pinctrl-0 = <&pinctrl_usbotg>;
0362 disable-over-current;
0363 dr_mode = "otg";
0364 status = "okay";
0365 };
0366
0367 &usdhc1 {
0368 pinctrl-names = "default";
0369 pinctrl-0 = <&pinctrl_usdhc1>;
0370 cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
0371 status = "okay";
0372 };
0373
0374 &usdhc3 {
0375 pinctrl-names = "default";
0376 pinctrl-0 = <&pinctrl_usdhc3>;
0377 cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
0378 status = "okay";
0379 };
