Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
0002 /*
0003  * Copyright (c) 2014 Protonic Holland
0004  * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
0005  */
0006 
0007 #include <dt-bindings/display/sdtv-standards.h>
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include <dt-bindings/input/input.h>
0010 #include <dt-bindings/leds/common.h>
0011 #include <dt-bindings/media/tvp5150.h>
0012 #include <dt-bindings/sound/fsl-imx-audmux.h>
0013 
0014 / {
0015         chosen {
0016                 stdout-path = &uart4;
0017         };
0018 
0019         backlight_lcd: backlight {
0020                 compatible = "pwm-backlight";
0021                 pinctrl-names = "default";
0022                 pinctrl-0 = <&pinctrl_backlight>;
0023                 pwms = <&pwm1 0 5000000 0>;
0024                 brightness-levels = <0 16 64 255>;
0025                 num-interpolated-steps = <16>;
0026                 default-brightness-level = <48>;
0027                 power-supply = <&reg_3v3>;
0028                 enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
0029         };
0030 
0031         backlight_led: backlight-led {
0032                 compatible = "pwm-backlight";
0033                 pwms = <&pwm3 0 5000000 0>;
0034                 brightness-levels = <0 16 64 255>;
0035                 num-interpolated-steps = <16>;
0036                 default-brightness-level = <48>;
0037                 power-supply = <&reg_3v3>;
0038         };
0039 
0040         connector {
0041                 compatible = "composite-video-connector";
0042                 label = "Composite0";
0043                 sdtv-standards = <SDTV_STD_PAL_B>;
0044 
0045                 port {
0046                         comp0_out: endpoint {
0047                                 remote-endpoint = <&tvp5150_comp0_in>;
0048                         };
0049                 };
0050         };
0051 
0052         counter-0 {
0053                 compatible = "interrupt-counter";
0054                 pinctrl-names = "default";
0055                 pinctrl-0 = <&pinctrl_counter0>;
0056                 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
0057         };
0058 
0059         counter-1 {
0060                 compatible = "interrupt-counter";
0061                 pinctrl-names = "default";
0062                 pinctrl-0 = <&pinctrl_counter1>;
0063                 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
0064         };
0065 
0066         counter-2 {
0067                 compatible = "interrupt-counter";
0068                 pinctrl-names = "default";
0069                 pinctrl-0 = <&pinctrl_counter2>;
0070                 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
0071         };
0072 
0073         leds {
0074                 compatible = "gpio-leds";
0075                 pinctrl-names = "default";
0076                 pinctrl-0 = <&pinctrl_leds>;
0077 
0078                 led-0 {
0079                         label = "debug0";
0080                         function = LED_FUNCTION_HEARTBEAT;
0081                         gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
0082                         linux,default-trigger = "heartbeat";
0083                 };
0084 
0085                 led-1 {
0086                         label = "debug1";
0087                         function = LED_FUNCTION_DISK;
0088                         gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
0089                         linux,default-trigger = "disk-activity";
0090                 };
0091 
0092                 led-2 {
0093                         label = "power_led";
0094                         function = LED_FUNCTION_POWER;
0095                         gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
0096                         default-state = "on";
0097                 };
0098 
0099                 led-3 {
0100                         label = "isb_led";
0101                         function = LED_FUNCTION_POWER;
0102                         gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
0103                         default-state = "on";
0104                 };
0105         };
0106 
0107         reg_1v8: regulator-1v8 {
0108                 compatible = "regulator-fixed";
0109                 regulator-name = "1v8";
0110                 regulator-min-microvolt = <1800000>;
0111                 regulator-max-microvolt = <1800000>;
0112         };
0113 
0114         reg_3v3: regulator-3v3 {
0115                 compatible = "regulator-fixed";
0116                 regulator-name = "3v3";
0117                 regulator-min-microvolt = <3300000>;
0118                 regulator-max-microvolt = <3300000>;
0119         };
0120 
0121         reg_otg_vbus: regulator-otg-vbus {
0122                 compatible = "regulator-fixed";
0123                 regulator-name = "otg-vbus";
0124                 regulator-min-microvolt = <5000000>;
0125                 regulator-max-microvolt = <5000000>;
0126                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0127                 enable-active-high;
0128         };
0129 
0130         sound {
0131                 compatible = "simple-audio-card";
0132                 simple-audio-card,name = "prti6q-sgtl5000";
0133                 simple-audio-card,format = "i2s";
0134                 simple-audio-card,widgets =
0135                         "Microphone", "Microphone Jack",
0136                         "Line", "Line In Jack",
0137                         "Headphone", "Headphone Jack",
0138                         "Speaker", "External Speaker";
0139                 simple-audio-card,routing =
0140                         "MIC_IN", "Microphone Jack",
0141                         "LINE_IN", "Line In Jack",
0142                         "Headphone Jack", "HP_OUT",
0143                         "External Speaker", "LINE_OUT";
0144 
0145                 simple-audio-card,cpu {
0146                         sound-dai = <&ssi1>;
0147                         system-clock-frequency = <0>; /* Do NOT call fsl_ssi_set_dai_sysclk! */
0148                 };
0149 
0150                 simple-audio-card,codec {
0151                         sound-dai = <&codec>;
0152                         bitclock-master;
0153                         frame-master;
0154                 };
0155         };
0156 
0157         thermal-zones {
0158                 chassis-thermal {
0159                         polling-delay = <20000>;
0160                         polling-delay-passive = <0>;
0161                         thermal-sensors = <&tsens0>;
0162                 };
0163         };
0164 };
0165 
0166 &audmux {
0167         pinctrl-names = "default";
0168         pinctrl-0 = <&pinctrl_audmux>;
0169         status = "okay";
0170 
0171         mux-ssi1 {
0172                 fsl,audmux-port = <0>;
0173                 fsl,port-config = <
0174                         IMX_AUDMUX_V2_PTCR_SYN          0
0175                         IMX_AUDMUX_V2_PTCR_TFSEL(2)     0
0176                         IMX_AUDMUX_V2_PTCR_TCSEL(2)     0
0177                         IMX_AUDMUX_V2_PTCR_TFSDIR       0
0178                         IMX_AUDMUX_V2_PTCR_TCLKDIR      IMX_AUDMUX_V2_PDCR_RXDSEL(2)
0179                 >;
0180         };
0181 
0182         mux-pins3 {
0183                 fsl,audmux-port = <2>;
0184                 fsl,port-config = <
0185                         IMX_AUDMUX_V2_PTCR_SYN          IMX_AUDMUX_V2_PDCR_RXDSEL(0)
0186                         0                               IMX_AUDMUX_V2_PDCR_TXRXEN
0187                 >;
0188         };
0189 };
0190 
0191 &can1 {
0192         pinctrl-names = "default";
0193         pinctrl-0 = <&pinctrl_can1>;
0194         termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
0195         termination-ohms = <150>;
0196         status = "okay";
0197 };
0198 
0199 &can2 {
0200         pinctrl-names = "default";
0201         pinctrl-0 = <&pinctrl_can2>;
0202         status = "okay";
0203 };
0204 
0205 &clks {
0206         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>;
0207         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
0208 };
0209 
0210 &ecspi1 {
0211         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
0212         pinctrl-names = "default";
0213         pinctrl-0 = <&pinctrl_ecspi1>;
0214         status = "okay";
0215 
0216         flash@0 {
0217                 compatible = "jedec,spi-nor";
0218                 reg = <0>;
0219                 spi-max-frequency = <20000000>;
0220         };
0221 };
0222 
0223 &gpio2 {
0224         gpio-line-names =
0225                 "YACO_WHEEL", "YACO_RADAR", "YACO_PTO", "", "", "", "", "",
0226                 "", "LED_PWM", "", "", "",
0227                         "", "", "",
0228                 "", "", "", "", "", "ISB_IN2", "ISB_nIN1", "ON_SWITCH",
0229                 "POWER_LED", "", "", "", "", "", "", "";
0230 };
0231 
0232 &gpio3 {
0233         gpio-line-names =
0234                 "", "", "", "", "", "", "", "",
0235                 "", "", "", "", "", "", "", "",
0236                 "ECSPI1_SCLK", "ECSPI1_MISO", "ECSPI1_MOSI", "ECSPI1_SS1",
0237                         "CPU_ON1_FB", "USB_OTG_OC", "USB_OTG_PWR", "YACO_IRQ",
0238                 "TSS_TXD", "TSS_RXD", "", "", "", "", "YACO_BOOT0",
0239                         "YACO_RESET";
0240 };
0241 
0242 &gpio7 {
0243         gpio-line-names =
0244                 "EMMC_DAT5", "EMMC_DAT4", "EMMC_CMD", "EMMC_CLK", "EMMC_DAT0",
0245                         "EMMC_DAT1", "EMMC_DAT2", "EMMC_DAT3",
0246                 "EMMC_RST", "", "", "", "CAM_DETECT", "", "", "",
0247                 "", "EMMC_DAT7", "EMMC_DAT6", "", "", "", "", "",
0248                 "", "", "", "", "", "", "", "";
0249 };
0250 
0251 &i2c1 {
0252         clock-frequency = <100000>;
0253         pinctrl-names = "default";
0254         pinctrl-0 = <&pinctrl_i2c1>;
0255         status = "okay";
0256 
0257         codec: audio-codec@a {
0258                 compatible = "fsl,sgtl5000";
0259                 reg = <0xa>;
0260                 #sound-dai-cells = <0>;
0261                 clocks = <&clks 201>;
0262                 VDDA-supply = <&reg_3v3>;
0263                 VDDIO-supply = <&reg_3v3>;
0264                 VDDD-supply = <&reg_1v8>;
0265         };
0266 
0267         video-decoder@5c {
0268                 compatible = "ti,tvp5150";
0269                 reg = <0x5c>;
0270                 #address-cells = <1>;
0271                 #size-cells = <0>;
0272 
0273                 port@0 {
0274                         reg = <0>;
0275 
0276                         tvp5150_comp0_in: endpoint {
0277                                 remote-endpoint = <&comp0_out>;
0278                         };
0279                 };
0280 
0281                 /* Output port 2 is video output pad */
0282                 port@2 {
0283                         reg = <2>;
0284 
0285                         tvp5151_to_ipu1_csi0_mux: endpoint {
0286                                 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
0287                         };
0288                 };
0289         };
0290 };
0291 
0292 &i2c3 {
0293         clock-frequency = <100000>;
0294         pinctrl-names = "default";
0295         pinctrl-0 = <&pinctrl_i2c3>;
0296         status = "okay";
0297 
0298         adc@49 {
0299                 compatible = "ti,ads1015";
0300                 reg = <0x49>;
0301                 #address-cells = <1>;
0302                 #size-cells = <0>;
0303 
0304                 channel@4 {
0305                         reg = <4>;
0306                         ti,gain = <3>;
0307                         ti,datarate = <3>;
0308                 };
0309 
0310                 channel@5 {
0311                         reg = <5>;
0312                         ti,gain = <3>;
0313                         ti,datarate = <3>;
0314                 };
0315 
0316                 channel@6 {
0317                         reg = <6>;
0318                         ti,gain = <3>;
0319                         ti,datarate = <3>;
0320                 };
0321 
0322                 channel@7 {
0323                         reg = <7>;
0324                         ti,gain = <3>;
0325                         ti,datarate = <3>;
0326                 };
0327         };
0328 
0329         rtc@51 {
0330                 compatible = "nxp,pcf8563";
0331                 reg = <0x51>;
0332         };
0333 
0334         tsens0: temperature-sensor@70 {
0335                 compatible = "ti,tmp103";
0336                 reg = <0x70>;
0337                 #thermal-sensor-cells = <0>;
0338         };
0339 };
0340 
0341 &ipu1_csi0 {
0342         pinctrl-names = "default";
0343         pinctrl-0 = <&pinctrl_ipu1_csi0>;
0344         status = "okay";
0345 };
0346 
0347 &ipu1_csi0_mux_from_parallel_sensor {
0348         remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>;
0349 };
0350 
0351 &ldb {
0352         status = "okay";
0353 
0354         lvds-channel@0 {
0355                 status = "okay";
0356 
0357                 port@4 {
0358                         reg = <4>;
0359 
0360                         lvds0_out: endpoint {
0361                                 remote-endpoint = <&panel_in>;
0362                         };
0363                 };
0364         };
0365 };
0366 
0367 &pwm1 {
0368         pinctrl-names = "default";
0369         pinctrl-0 = <&pinctrl_pwm1>;
0370         status = "okay";
0371 };
0372 
0373 &pwm3 {
0374         pinctrl-names = "default";
0375         pinctrl-0 = <&pinctrl_pwm3>;
0376         status = "okay";
0377 };
0378 
0379 &ssi1 {
0380         #sound-dai-cells = <0>;
0381         fsl,mode = "ac97-slave";
0382         status = "okay";
0383 };
0384 
0385 &uart1 {
0386         pinctrl-names = "default";
0387         pinctrl-0 = <&pinctrl_uart1>;
0388         status = "okay";
0389 };
0390 
0391 &uart3 {
0392         pinctrl-names = "default";
0393         pinctrl-0 = <&pinctrl_uart3>;
0394         status = "okay";
0395 };
0396 
0397 &uart4 {
0398         pinctrl-names = "default";
0399         pinctrl-0 = <&pinctrl_uart4>;
0400         status = "okay";
0401 };
0402 
0403 &uart5 {
0404         pinctrl-names = "default";
0405         pinctrl-0 = <&pinctrl_uart5>;
0406         status = "okay";
0407 };
0408 
0409 &usbh1 {
0410         pinctrl-names = "default";
0411         phy_type = "utmi";
0412         dr_mode = "host";
0413         status = "okay";
0414 };
0415 
0416 &usbotg {
0417         vbus-supply = <&reg_otg_vbus>;
0418         pinctrl-names = "default";
0419         pinctrl-0 = <&pinctrl_usbotg>;
0420         phy_type = "utmi";
0421         dr_mode = "host";
0422         disable-over-current;
0423         status = "okay";
0424 };
0425 
0426 &usdhc1 {
0427         pinctrl-names = "default";
0428         pinctrl-0 = <&pinctrl_usdhc1>;
0429         cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
0430         no-1-8-v;
0431         disable-wp;
0432         cap-sd-highspeed;
0433         no-mmc;
0434         no-sdio;
0435         status = "okay";
0436 };
0437 
0438 &usdhc3 {
0439         pinctrl-names = "default";
0440         pinctrl-0 = <&pinctrl_usdhc3>;
0441         bus-width = <8>;
0442         no-1-8-v;
0443         non-removable;
0444         no-sd;
0445         no-sdio;
0446         status = "okay";
0447 };
0448 
0449 &iomuxc {
0450         pinctrl-names = "default";
0451         pinctrl-0 = <&pinctrl_hog>;
0452 
0453         pinctrl_audmux: audmuxgrp {
0454                 fsl,pins = <
0455                         /* SGTL5000 sys_mclk */
0456                         MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1                 0x030b0
0457                         MX6QDL_PAD_CSI0_DAT7__AUD3_RXD                  0x130b0
0458                         MX6QDL_PAD_CSI0_DAT4__AUD3_TXC                  0x130b0
0459                         MX6QDL_PAD_CSI0_DAT5__AUD3_TXD                  0x110b0
0460                         MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS                 0x130b0
0461                 >;
0462         };
0463 
0464         pinctrl_backlight: backlightgrp {
0465                 fsl,pins = <
0466                         MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28               0x1b0b0
0467                 >;
0468         };
0469 
0470         pinctrl_can1: can1grp {
0471                 fsl,pins = <
0472                         MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX                0x1b000
0473                         MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX                0x3008
0474                         /* CAN1_SR */
0475                         MX6QDL_PAD_KEY_COL3__GPIO4_IO12                 0x13008
0476                         /* CAN1_TERM */
0477                         MX6QDL_PAD_GPIO_0__GPIO1_IO00                   0x1b088
0478                 >;
0479         };
0480 
0481         pinctrl_can2: can2grp {
0482                 fsl,pins = <
0483                         MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX                0x1b000
0484                         MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX                0x3008
0485                         /* CAN2_SR */
0486                         MX6QDL_PAD_KEY_ROW3__GPIO4_IO13                 0x13008
0487                 >;
0488         };
0489 
0490         pinctrl_counter0: counter0grp {
0491                 fsl,pins = <
0492                         MX6QDL_PAD_NANDF_D0__GPIO2_IO00                 0x1b000
0493                 >;
0494         };
0495 
0496         pinctrl_counter1: counter1grp {
0497                 fsl,pins = <
0498                         MX6QDL_PAD_NANDF_D1__GPIO2_IO01                 0x1b000
0499                 >;
0500         };
0501 
0502         pinctrl_counter2: counter2grp {
0503                 fsl,pins = <
0504                         MX6QDL_PAD_NANDF_D2__GPIO2_IO02                 0x1b000
0505                 >;
0506         };
0507 
0508         pinctrl_ecspi1: ecspi1grp {
0509                 fsl,pins = <
0510                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO                 0x100b1
0511                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI                 0x100b1
0512                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK                 0x100b1
0513                         /* CS */
0514                         MX6QDL_PAD_EIM_D19__GPIO3_IO19                  0x000b1
0515                 >;
0516         };
0517 
0518         pinctrl_hog: hoggrp {
0519                 fsl,pins = <
0520                         /* ITU656_nRESET */
0521                         MX6QDL_PAD_GPIO_2__GPIO1_IO02                   0x1b0b0
0522                         /* CAM1_MIRROR */
0523                         MX6QDL_PAD_GPIO_3__GPIO1_IO03                   0x130b0
0524                         /* CAM2_MIRROR */
0525                         MX6QDL_PAD_GPIO_4__GPIO1_IO04                   0x130b0
0526                         /* CAM_nDETECT */
0527                         MX6QDL_PAD_GPIO_17__GPIO7_IO12                  0x1b0b0
0528                         /* ISB_IN1 */
0529                         MX6QDL_PAD_EIM_A16__GPIO2_IO22                  0x130b0
0530                         /* ISB_nIN2 */
0531                         MX6QDL_PAD_EIM_A17__GPIO2_IO21                  0x1b0b0
0532                         /* WARN_LIGHT */
0533                         MX6QDL_PAD_EIM_A19__GPIO2_IO19                  0x100b0
0534                         /* ON2_FB */
0535                         MX6QDL_PAD_EIM_A25__GPIO5_IO02                  0x100b0
0536                         /* YACO_nIRQ */
0537                         MX6QDL_PAD_EIM_D23__GPIO3_IO23                  0x1b0b0
0538                         /* YACO_BOOT0 */
0539                         MX6QDL_PAD_EIM_D30__GPIO3_IO30                  0x130b0
0540                         /* YACO_nRESET */
0541                         MX6QDL_PAD_EIM_D31__GPIO3_IO31                  0x1b0b0
0542                         /* FORCE_ON1 */
0543                         MX6QDL_PAD_EIM_EB2__GPIO2_IO30                  0x1b0b0
0544                         /* AUDIO_nRESET */
0545                         MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21               0x1f0b0
0546                         /* ITU656_nPDN */
0547                         MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20             0x1b0b0
0548 
0549                         /* New in HW revision 1 */
0550                         /* ON1_FB */
0551                         MX6QDL_PAD_EIM_D20__GPIO3_IO20                  0x100b0
0552                         /* DIP1_FB */
0553                         MX6QDL_PAD_DI0_PIN2__GPIO4_IO18                 0x1b0b0
0554                 >;
0555         };
0556 
0557         pinctrl_i2c1: i2c1grp {
0558                 fsl,pins = <
0559                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001f8b1
0560                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001f8b1
0561                 >;
0562         };
0563 
0564         pinctrl_i2c3: i2c3grp {
0565                 fsl,pins = <
0566                         MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
0567                         MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
0568                 >;
0569         };
0570 
0571         pinctrl_ipu1_csi0: ipu1csi0grp {
0572                 fsl,pins = <
0573                         MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12         0x1b0b0
0574                         MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13         0x1b0b0
0575                         MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14         0x1b0b0
0576                         MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15         0x1b0b0
0577                         MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16         0x1b0b0
0578                         MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17         0x1b0b0
0579                         MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18         0x1b0b0
0580                         MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19         0x1b0b0
0581                         MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK        0x1b0b0
0582                 >;
0583         };
0584 
0585         pinctrl_leds: ledsgrp {
0586                 fsl,pins = <
0587                         /* DEBUG0 */
0588                         MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16             0x1b0b0
0589                         /* DEBUG1 */
0590                         MX6QDL_PAD_DI0_PIN15__GPIO4_IO17                0x1b0b0
0591                         /* POWER_LED */
0592                         MX6QDL_PAD_EIM_CS1__GPIO2_IO24                  0x1b0b0
0593                         /* ISB_LED */
0594                         MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31              0x1b0b0
0595                 >;
0596         };
0597 
0598         pinctrl_pwm1: pwm1grp {
0599                 fsl,pins = <
0600                         MX6QDL_PAD_DISP0_DAT8__PWM1_OUT                 0x1b0b0
0601                 >;
0602         };
0603 
0604         pinctrl_pwm3: pwm3grp {
0605                 fsl,pins = <
0606                         MX6QDL_PAD_SD4_DAT1__PWM3_OUT                   0x1b0b0
0607                 >;
0608         };
0609 
0610         /* YaCO AUX Uart */
0611         pinctrl_uart1: uart1grp {
0612                 fsl,pins = <
0613                         MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA            0x1b0b1
0614                         MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA            0x1b0b1
0615                 >;
0616         };
0617 
0618         /* YaCO Touchscreen UART */
0619         pinctrl_uart3: uart3grp {
0620                 fsl,pins = <
0621                         MX6QDL_PAD_EIM_D24__UART3_TX_DATA               0x1b0b1
0622                         MX6QDL_PAD_EIM_D25__UART3_RX_DATA               0x1b0b1
0623                 >;
0624         };
0625 
0626         pinctrl_uart4: uart4grp {
0627                 fsl,pins = <
0628                         MX6QDL_PAD_KEY_COL0__UART4_TX_DATA              0x1b0b1
0629                         MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA              0x1b0b1
0630                 >;
0631         };
0632 
0633         pinctrl_uart5: uart5grp {
0634                 fsl,pins = <
0635                         MX6QDL_PAD_KEY_COL1__UART5_TX_DATA              0x1b0b1
0636                         MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA              0x1b0b1
0637                 >;
0638         };
0639 
0640         pinctrl_usbotg: usbotggrp {
0641                 fsl,pins = <
0642                         MX6QDL_PAD_EIM_D21__USB_OTG_OC                  0x1b0b0
0643                         /* power enable, high active */
0644                         MX6QDL_PAD_EIM_D22__GPIO3_IO22                  0x1b0b0
0645                 >;
0646         };
0647 
0648         pinctrl_usdhc1: usdhc1grp {
0649                 fsl,pins = <
0650                         MX6QDL_PAD_SD1_CMD__SD1_CMD                     0x170f9
0651                         MX6QDL_PAD_SD1_CLK__SD1_CLK                     0x100f9
0652                         MX6QDL_PAD_SD1_DAT0__SD1_DATA0                  0x170f9
0653                         MX6QDL_PAD_SD1_DAT1__SD1_DATA1                  0x170f9
0654                         MX6QDL_PAD_SD1_DAT2__SD1_DATA2                  0x170f9
0655                         MX6QDL_PAD_SD1_DAT3__SD1_DATA3                  0x170f9
0656                         MX6QDL_PAD_GPIO_1__GPIO1_IO01                   0x1b0b0
0657                 >;
0658         };
0659 
0660         pinctrl_usdhc3: usdhc3grp {
0661                 fsl,pins = <
0662                         MX6QDL_PAD_SD3_CMD__SD3_CMD                     0x17099
0663                         MX6QDL_PAD_SD3_CLK__SD3_CLK                     0x10099
0664                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0                  0x17099
0665                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1                  0x17099
0666                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2                  0x17099
0667                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3                  0x17099
0668                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4                  0x17099
0669                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5                  0x17099
0670                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6                  0x17099
0671                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7                  0x17099
0672                         MX6QDL_PAD_SD3_RST__SD3_RESET                   0x1b0b1
0673                 >;
0674         };
0675 };