0001 /*
0002 * Copyright 2014-2017 Lothar Waßmann <LW@KARO-electronics.de>
0003 *
0004 * This file is dual-licensed: you can use it either under the terms
0005 * of the GPL or the X11 license, at your option. Note that this dual
0006 * licensing only applies to this file, and not this project as a
0007 * whole.
0008 *
0009 * a) This file is free software; you can redistribute it and/or
0010 * modify it under the terms of the GNU General Public License
0011 * version 2 as published by the Free Software Foundation.
0012 *
0013 * This file is distributed in the hope that it will be useful,
0014 * but WITHOUT ANY WARRANTY; without even the implied warranty of
0015 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0016 * GNU General Public License for more details.
0017 *
0018 * Or, alternatively,
0019 *
0020 * b) Permission is hereby granted, free of charge, to any person
0021 * obtaining a copy of this software and associated documentation
0022 * files (the "Software"), to deal in the Software without
0023 * restriction, including without limitation the rights to use,
0024 * copy, modify, merge, publish, distribute, sublicense, and/or
0025 * sell copies of the Software, and to permit persons to whom the
0026 * Software is furnished to do so, subject to the following
0027 * conditions:
0028 *
0029 * The above copyright notice and this permission notice shall be
0030 * included in all copies or substantial portions of the Software.
0031 *
0032 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0033 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0034 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0035 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0036 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0037 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0038 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0039 * OTHER DEALINGS IN THE SOFTWARE.
0040 */
0041
0042 #include <dt-bindings/gpio/gpio.h>
0043 #include <dt-bindings/input/input.h>
0044 #include <dt-bindings/interrupt-controller/irq.h>
0045 #include <dt-bindings/pwm/pwm.h>
0046 #include <dt-bindings/sound/fsl-imx-audmux.h>
0047
0048 / {
0049 aliases {
0050 can0 = &can2;
0051 can1 = &can1;
0052 ethernet0 = &fec;
0053 lcdif-23bit-pins-a = &pinctrl_disp0_1;
0054 lcdif-24bit-pins-a = &pinctrl_disp0_2;
0055 pwm0 = &pwm1;
0056 pwm1 = &pwm2;
0057 reg-can-xcvr = ®_can_xcvr;
0058 stk5led = &user_led;
0059 usbotg = &usbotg;
0060 sdhc0 = &usdhc1;
0061 sdhc1 = &usdhc2;
0062 };
0063
0064 memory@10000000 {
0065 device_type = "memory";
0066 reg = <0x10000000 0>; /* will be filled by U-Boot */
0067 };
0068
0069 clocks {
0070 #address-cells = <1>;
0071 #size-cells = <0>;
0072
0073 mclk: clock@0 {
0074 compatible = "fixed-clock";
0075 reg = <0>;
0076 #clock-cells = <0>;
0077 clock-frequency = <26000000>;
0078 };
0079 };
0080
0081 gpio-keys {
0082 compatible = "gpio-keys";
0083
0084 power {
0085 label = "Power Button";
0086 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
0087 linux,code = <KEY_POWER>;
0088 wakeup-source;
0089 };
0090 };
0091
0092 leds {
0093 compatible = "gpio-leds";
0094
0095 user_led: user {
0096 label = "Heartbeat";
0097 pinctrl-names = "default";
0098 pinctrl-0 = <&pinctrl_user_led>;
0099 gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
0100 linux,default-trigger = "heartbeat";
0101 };
0102 };
0103
0104 reg_3v3_etn: regulator-3v3-etn {
0105 compatible = "regulator-fixed";
0106 regulator-name = "3V3_ETN";
0107 regulator-min-microvolt = <3300000>;
0108 regulator-max-microvolt = <3300000>;
0109 pinctrl-names = "default";
0110 pinctrl-0 = <&pinctrl_etnphy_power>;
0111 gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
0112 enable-active-high;
0113 };
0114
0115 reg_2v5: regulator-2v5 {
0116 compatible = "regulator-fixed";
0117 regulator-name = "2V5";
0118 regulator-min-microvolt = <2500000>;
0119 regulator-max-microvolt = <2500000>;
0120 regulator-always-on;
0121 };
0122
0123 reg_3v3: regulator-3v3 {
0124 compatible = "regulator-fixed";
0125 regulator-name = "3V3";
0126 regulator-min-microvolt = <3300000>;
0127 regulator-max-microvolt = <3300000>;
0128 regulator-always-on;
0129 };
0130
0131 reg_can_xcvr: regulator-can-xcvr {
0132 compatible = "regulator-fixed";
0133 regulator-name = "CAN XCVR";
0134 regulator-min-microvolt = <3300000>;
0135 regulator-max-microvolt = <3300000>;
0136 pinctrl-names = "default";
0137 pinctrl-0 = <&pinctrl_flexcan_xcvr>;
0138 gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
0139 };
0140
0141 reg_lcd0_pwr: regulator-lcd0-pwr {
0142 compatible = "regulator-fixed";
0143 regulator-name = "LCD0 POWER";
0144 regulator-min-microvolt = <3300000>;
0145 regulator-max-microvolt = <3300000>;
0146 pinctrl-names = "default";
0147 pinctrl-0 = <&pinctrl_lcd0_pwr>;
0148 gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
0149 enable-active-high;
0150 status = "disabled";
0151 };
0152
0153 reg_lcd1_pwr: regulator-lcd1-pwr {
0154 compatible = "regulator-fixed";
0155 regulator-name = "LCD1 POWER";
0156 regulator-min-microvolt = <3300000>;
0157 regulator-max-microvolt = <3300000>;
0158 pinctrl-names = "default";
0159 pinctrl-0 = <&pinctrl_lcd1_pwr>;
0160 gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
0161 enable-active-high;
0162 status = "disabled";
0163 };
0164
0165 reg_usbh1_vbus: regulator-usbh1-vbus {
0166 compatible = "regulator-fixed";
0167 regulator-name = "usbh1_vbus";
0168 regulator-min-microvolt = <5000000>;
0169 regulator-max-microvolt = <5000000>;
0170 pinctrl-names = "default";
0171 pinctrl-0 = <&pinctrl_usbh1_vbus>;
0172 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
0173 enable-active-high;
0174 };
0175
0176 reg_usbotg_vbus: regulator-usbotg-vbus {
0177 compatible = "regulator-fixed";
0178 regulator-name = "usbotg_vbus";
0179 regulator-min-microvolt = <5000000>;
0180 regulator-max-microvolt = <5000000>;
0181 pinctrl-names = "default";
0182 pinctrl-0 = <&pinctrl_usbotg_vbus>;
0183 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
0184 enable-active-high;
0185 };
0186
0187 sound {
0188 compatible = "karo,imx6qdl-tx6-sgtl5000",
0189 "simple-audio-card";
0190 simple-audio-card,name = "imx6qdl-tx6-sgtl5000-audio";
0191 pinctrl-names = "default";
0192 pinctrl-0 = <&pinctrl_audmux>;
0193 simple-audio-card,format = "i2s";
0194 simple-audio-card,bitclock-master = <&codec_dai>;
0195 simple-audio-card,frame-master = <&codec_dai>;
0196 simple-audio-card,widgets =
0197 "Microphone", "Mic Jack",
0198 "Line", "Line In",
0199 "Line", "Line Out",
0200 "Headphone", "Headphone Jack";
0201 simple-audio-card,routing =
0202 "MIC_IN", "Mic Jack",
0203 "Mic Jack", "Mic Bias",
0204 "Headphone Jack", "HP_OUT";
0205
0206 cpu_dai: simple-audio-card,cpu {
0207 sound-dai = <&ssi1>;
0208 };
0209
0210 codec_dai: simple-audio-card,codec {
0211 sound-dai = <&sgtl5000>;
0212 };
0213 };
0214 };
0215
0216 &audmux {
0217 status = "okay";
0218
0219 ssi1 {
0220 fsl,audmux-port = <0>;
0221 fsl,port-config = <
0222 (IMX_AUDMUX_V2_PTCR_SYN |
0223 IMX_AUDMUX_V2_PTCR_TFSEL(4) |
0224 IMX_AUDMUX_V2_PTCR_TCSEL(4) |
0225 IMX_AUDMUX_V2_PTCR_TFSDIR |
0226 IMX_AUDMUX_V2_PTCR_TCLKDIR)
0227 IMX_AUDMUX_V2_PDCR_RXDSEL(4)
0228 >;
0229 };
0230
0231 pins5 {
0232 fsl,audmux-port = <4>;
0233 fsl,port-config = <
0234 IMX_AUDMUX_V2_PTCR_SYN
0235 IMX_AUDMUX_V2_PDCR_RXDSEL(0)
0236 >;
0237 };
0238 };
0239
0240 &can1 {
0241 pinctrl-names = "default";
0242 pinctrl-0 = <&pinctrl_flexcan1>;
0243 xceiver-supply = <®_can_xcvr>;
0244 status = "okay";
0245 };
0246
0247 &can2 {
0248 pinctrl-names = "default";
0249 pinctrl-0 = <&pinctrl_flexcan2>;
0250 xceiver-supply = <®_can_xcvr>;
0251 status = "okay";
0252 };
0253
0254 &ecspi1 {
0255 pinctrl-names = "default";
0256 pinctrl-0 = <&pinctrl_ecspi1>;
0257 cs-gpios = <
0258 &gpio2 30 GPIO_ACTIVE_HIGH
0259 &gpio3 19 GPIO_ACTIVE_HIGH
0260 >;
0261 status = "disabled";
0262 };
0263
0264 &fec {
0265 pinctrl-names = "default";
0266 pinctrl-0 = <&pinctrl_enet &pinctrl_enet_mdio &pinctrl_etnphy_rst>;
0267 phy-mode = "rmii";
0268 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
0269 phy-reset-post-delay = <10>;
0270 phy-handle = <&etnphy>;
0271 phy-supply = <®_3v3_etn>;
0272 status = "okay";
0273
0274 mdio {
0275 #address-cells = <1>;
0276 #size-cells = <0>;
0277
0278 etnphy: ethernet-phy@0 {
0279 compatible = "ethernet-phy-ieee802.3-c22";
0280 reg = <0>;
0281 pinctrl-names = "default";
0282 pinctrl-0 = <&pinctrl_etnphy_int>;
0283 interrupt-parent = <&gpio7>;
0284 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
0285 };
0286 };
0287 };
0288
0289 &gpmi {
0290 pinctrl-names = "default";
0291 pinctrl-0 = <&pinctrl_gpmi_nand>;
0292 nand-on-flash-bbt;
0293 fsl,no-blockmark-swap;
0294 status = "okay";
0295 };
0296
0297 &i2c1 {
0298 pinctrl-names = "default", "gpio";
0299 pinctrl-0 = <&pinctrl_i2c1>;
0300 pinctrl-1 = <&pinctrl_i2c1_gpio>;
0301 scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
0302 sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
0303 clock-frequency = <400000>;
0304 status = "okay";
0305
0306 ds1339: rtc@68 {
0307 compatible = "dallas,ds1339";
0308 reg = <0x68>;
0309 trickle-resistor-ohms = <250>;
0310 trickle-diode-disable;
0311 };
0312 };
0313
0314 &i2c3 {
0315 pinctrl-names = "default", "gpio";
0316 pinctrl-0 = <&pinctrl_i2c3>;
0317 pinctrl-1 = <&pinctrl_i2c3_gpio>;
0318 scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
0319 sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
0320 clock-frequency = <400000>;
0321 status = "okay";
0322
0323 sgtl5000: sgtl5000@a {
0324 compatible = "fsl,sgtl5000";
0325 #sound-dai-cells = <0>;
0326 reg = <0x0a>;
0327 VDDA-supply = <®_2v5>;
0328 VDDIO-supply = <®_3v3>;
0329 clocks = <&mclk>;
0330 };
0331
0332 polytouch: edt-ft5x06@38 {
0333 compatible = "edt,edt-ft5x06";
0334 reg = <0x38>;
0335 pinctrl-names = "default";
0336 pinctrl-0 = <&pinctrl_edt_ft5x06>;
0337 interrupt-parent = <&gpio6>;
0338 interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
0339 reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
0340 wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
0341 wakeup-source;
0342 };
0343
0344 touchscreen: tsc2007@48 {
0345 compatible = "ti,tsc2007";
0346 reg = <0x48>;
0347 pinctrl-names = "default";
0348 pinctrl-0 = <&pinctrl_tsc2007>;
0349 interrupt-parent = <&gpio3>;
0350 interrupts = <26 0>;
0351 gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
0352 ti,x-plate-ohms = <660>;
0353 wakeup-source;
0354 };
0355 };
0356
0357 &iomuxc {
0358 pinctrl-names = "default";
0359 pinctrl-0 = <&pinctrl_hog>;
0360
0361 pinctrl_hog: hoggrp {
0362 fsl,pins = <
0363 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* PWR BTN */
0364 >;
0365 };
0366
0367 pinctrl_audmux: audmuxgrp {
0368 fsl,pins = <
0369 MX6QDL_PAD_KEY_ROW1__AUD5_RXD 0x130b0 /* SSI1_RXD */
0370 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0 /* SSI1_TXD */
0371 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0 /* SSI1_CLK */
0372 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0 /* SSI1_FS */
0373 >;
0374 };
0375
0376 pinctrl_disp0_1: disp0grp-1 {
0377 fsl,pins = <
0378 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
0379 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
0380 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
0381 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
0382 /* PAD DISP0_DAT0 is used for the Flexcan transceiver control */
0383 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
0384 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
0385 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
0386 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
0387 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
0388 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
0389 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
0390 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
0391 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
0392 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
0393 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
0394 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
0395 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
0396 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
0397 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
0398 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
0399 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
0400 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
0401 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
0402 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
0403 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
0404 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
0405 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
0406 >;
0407 };
0408
0409 pinctrl_disp0_2: disp0grp-2 {
0410 fsl,pins = <
0411 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
0412 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
0413 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
0414 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
0415 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
0416 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
0417 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
0418 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
0419 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
0420 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
0421 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
0422 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
0423 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
0424 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
0425 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
0426 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
0427 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
0428 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
0429 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
0430 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
0431 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
0432 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
0433 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
0434 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
0435 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
0436 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
0437 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
0438 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
0439 >;
0440 };
0441
0442 pinctrl_ecspi1: ecspi1grp {
0443 fsl,pins = <
0444 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x0b0b0
0445 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x0b0b0
0446 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x0b0b0
0447 MX6QDL_PAD_GPIO_19__ECSPI1_RDY 0x0b0b0
0448 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x0b0b0 /* SPI CS0 */
0449 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x0b0b0 /* SPI CS1 */
0450 >;
0451 };
0452
0453 pinctrl_edt_ft5x06: edt-ft5x06grp {
0454 fsl,pins = <
0455 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 /* Interrupt */
0456 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b0 /* Reset */
0457 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0 /* Wake */
0458 >;
0459 };
0460
0461 pinctrl_enet: enetgrp {
0462 fsl,pins = <
0463 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
0464 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
0465 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
0466 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
0467 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
0468 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
0469 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
0470 >;
0471 };
0472
0473 pinctrl_enet_mdio: enet-mdiogrp {
0474 fsl,pins = <
0475 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0476 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0477 >;
0478 };
0479
0480 pinctrl_etnphy_int: etnphy-intgrp {
0481 fsl,pins = <
0482 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT */
0483 >;
0484 };
0485
0486 pinctrl_etnphy_power: etnphy-pwrgrp {
0487 fsl,pins = <
0488 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 /* ETN PHY POWER */
0489 >;
0490 };
0491
0492 pinctrl_etnphy_rst: etnphy-rstgrp {
0493 fsl,pins = <
0494 MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */
0495 >;
0496 };
0497
0498 pinctrl_flexcan1: flexcan1grp {
0499 fsl,pins = <
0500 MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
0501 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
0502 >;
0503 };
0504
0505 pinctrl_flexcan2: flexcan2grp {
0506 fsl,pins = <
0507 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
0508 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
0509 >;
0510 };
0511
0512 pinctrl_flexcan_xcvr: flexcan-xcvrgrp {
0513 fsl,pins = <
0514 MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b0b0 /* Flexcan XCVR enable */
0515 >;
0516 };
0517
0518 pinctrl_gpmi_nand: gpminandgrp {
0519 fsl,pins = <
0520 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1
0521 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1
0522 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1
0523 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000
0524 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1
0525 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1
0526 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1
0527 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1
0528 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1
0529 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1
0530 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1
0531 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1
0532 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1
0533 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1
0534 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1
0535 >;
0536 };
0537
0538 pinctrl_i2c1: i2c1grp {
0539 fsl,pins = <
0540 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
0541 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
0542 >;
0543 };
0544
0545 pinctrl_i2c1_gpio: i2c1-gpiogrp {
0546 fsl,pins = <
0547 MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1
0548 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1
0549 >;
0550 };
0551
0552 pinctrl_i2c3: i2c3grp {
0553 fsl,pins = <
0554 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
0555 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0556 >;
0557 };
0558
0559 pinctrl_i2c3_gpio: i2c3-gpiogrp {
0560 fsl,pins = <
0561 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1
0562 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1
0563 >;
0564 };
0565
0566 pinctrl_kpp: kppgrp {
0567 fsl,pins = <
0568 MX6QDL_PAD_GPIO_9__KEY_COL6 0x1b0b1
0569 MX6QDL_PAD_GPIO_4__KEY_COL7 0x1b0b1
0570 MX6QDL_PAD_KEY_COL2__KEY_COL2 0x1b0b1
0571 MX6QDL_PAD_KEY_COL3__KEY_COL3 0x1b0b1
0572 MX6QDL_PAD_GPIO_2__KEY_ROW6 0x1b0b1
0573 MX6QDL_PAD_GPIO_5__KEY_ROW7 0x1b0b1
0574 MX6QDL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b1
0575 MX6QDL_PAD_KEY_ROW3__KEY_ROW3 0x1b0b1
0576 >;
0577 };
0578
0579 pinctrl_lcd0_pwr: lcd0-pwrgrp {
0580 fsl,pins = <
0581 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1 /* LCD Reset */
0582 >;
0583 };
0584
0585 pinctrl_lcd1_pwr: lcd-pwrgrp {
0586 fsl,pins = <
0587 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b1 /* LCD Power Enable */
0588 >;
0589 };
0590
0591 pinctrl_pwm1: pwm1grp {
0592 fsl,pins = <
0593 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
0594 >;
0595 };
0596
0597 pinctrl_pwm2: pwm2grp {
0598 fsl,pins = <
0599 MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
0600 >;
0601 };
0602
0603 pinctrl_tsc2007: tsc2007grp {
0604 fsl,pins = <
0605 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 /* Interrupt */
0606 >;
0607 };
0608
0609 pinctrl_uart1: uart1grp {
0610 fsl,pins = <
0611 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
0612 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
0613 >;
0614 };
0615
0616 pinctrl_uart1_rtscts: uart1_rtsctsgrp {
0617 fsl,pins = <
0618 MX6QDL_PAD_SD3_DAT1__UART1_RTS_B 0x1b0b1
0619 MX6QDL_PAD_SD3_DAT0__UART1_CTS_B 0x1b0b1
0620 >;
0621 };
0622
0623 pinctrl_uart2: uart2grp {
0624 fsl,pins = <
0625 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
0626 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
0627 >;
0628 };
0629
0630 pinctrl_uart2_rtscts: uart2_rtsctsgrp {
0631 fsl,pins = <
0632 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
0633 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
0634 >;
0635 };
0636
0637 pinctrl_uart3: uart3grp {
0638 fsl,pins = <
0639 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
0640 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
0641 >;
0642 };
0643
0644 pinctrl_uart3_rtscts: uart3_rtsctsgrp {
0645 fsl,pins = <
0646 MX6QDL_PAD_SD3_DAT3__UART3_CTS_B 0x1b0b1
0647 MX6QDL_PAD_SD3_RST__UART3_RTS_B 0x1b0b1
0648 >;
0649 };
0650
0651 pinctrl_usbh1_vbus: usbh1-vbusgrp {
0652 fsl,pins = <
0653 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0 /* USBH1_VBUSEN */
0654 >;
0655 };
0656
0657 pinctrl_usbotg: usbotggrp {
0658 fsl,pins = <
0659 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x17059
0660 >;
0661 };
0662
0663 pinctrl_usbotg_vbus: usbotg-vbusgrp {
0664 fsl,pins = <
0665 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 /* USBOTG_VBUSEN */
0666 >;
0667 };
0668
0669 pinctrl_usdhc1: usdhc1grp {
0670 fsl,pins = <
0671 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x070b1
0672 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x070b1
0673 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x070b1
0674 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x070b1
0675 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x070b1
0676 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x070b1
0677 MX6QDL_PAD_SD3_CMD__GPIO7_IO02 0x170b0 /* SD1 CD */
0678 >;
0679 };
0680
0681 pinctrl_usdhc2: usdhc2grp {
0682 fsl,pins = <
0683 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x070b1
0684 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x070b1
0685 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x070b1
0686 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x070b1
0687 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x070b1
0688 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x070b1
0689 MX6QDL_PAD_SD3_CLK__GPIO7_IO03 0x170b0 /* SD2 CD */
0690 >;
0691 };
0692
0693 pinctrl_user_led: user-ledgrp {
0694 fsl,pins = <
0695 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1 /* LED */
0696 >;
0697 };
0698 };
0699
0700 &kpp {
0701 pinctrl-names = "default";
0702 pinctrl-0 = <&pinctrl_kpp>;
0703 /* sample keymap */
0704 /* row/col 0,1 are mapped to KPP row/col 6,7 */
0705 linux,keymap = <
0706 MATRIX_KEY(6, 6, KEY_POWER) /* 0x06060074 */
0707 MATRIX_KEY(6, 7, KEY_KP0) /* 0x06070052 */
0708 MATRIX_KEY(6, 2, KEY_KP1) /* 0x0602004f */
0709 MATRIX_KEY(6, 3, KEY_KP2) /* 0x06030050 */
0710 MATRIX_KEY(7, 6, KEY_KP3) /* 0x07060051 */
0711 MATRIX_KEY(7, 7, KEY_KP4) /* 0x0707004b */
0712 MATRIX_KEY(7, 2, KEY_KP5) /* 0x0702004c */
0713 MATRIX_KEY(7, 3, KEY_KP6) /* 0x0703004d */
0714 MATRIX_KEY(2, 6, KEY_KP7) /* 0x02060047 */
0715 MATRIX_KEY(2, 7, KEY_KP8) /* 0x02070048 */
0716 MATRIX_KEY(2, 2, KEY_KP9) /* 0x02020049 */
0717 >;
0718 status = "okay";
0719 };
0720
0721 &pwm1 {
0722 pinctrl-names = "default";
0723 pinctrl-0 = <&pinctrl_pwm1>;
0724 status = "disabled";
0725 };
0726
0727 &pwm2 {
0728 pinctrl-names = "default";
0729 pinctrl-0 = <&pinctrl_pwm2>;
0730 status = "okay";
0731 };
0732
0733 &ssi1 {
0734 status = "okay";
0735 };
0736
0737 &uart1 {
0738 pinctrl-names = "default";
0739 pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_rtscts>;
0740 uart-has-rtscts;
0741 status = "okay";
0742 };
0743
0744 &uart2 {
0745 pinctrl-names = "default";
0746 pinctrl-0 = <&pinctrl_uart2 &pinctrl_uart2_rtscts>;
0747 uart-has-rtscts;
0748 status = "okay";
0749 };
0750
0751 &uart3 {
0752 pinctrl-names = "default";
0753 pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
0754 uart-has-rtscts;
0755 status = "okay";
0756 };
0757
0758 &usbh1 {
0759 vbus-supply = <®_usbh1_vbus>;
0760 dr_mode = "host";
0761 disable-over-current;
0762 status = "okay";
0763 };
0764
0765 &usbotg {
0766 vbus-supply = <®_usbotg_vbus>;
0767 pinctrl-names = "default";
0768 pinctrl-0 = <&pinctrl_usbotg>;
0769 dr_mode = "peripheral";
0770 disable-over-current;
0771 status = "okay";
0772 };
0773
0774 &usdhc1 {
0775 pinctrl-names = "default";
0776 pinctrl-0 = <&pinctrl_usdhc1>;
0777 bus-width = <4>;
0778 no-1-8-v;
0779 cd-gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
0780 fsl,wp-controller;
0781 status = "okay";
0782 };
0783
0784 &usdhc2 {
0785 pinctrl-names = "default";
0786 pinctrl-0 = <&pinctrl_usdhc2>;
0787 bus-width = <4>;
0788 no-1-8-v;
0789 cd-gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
0790 fsl,wp-controller;
0791 status = "okay";
0792 };
