0001 /*
0002 * Copyright 2015 Technologic Systems
0003 * Copyright 2017 Savoir-Faire Linux
0004 *
0005 * This file is dual-licensed: you can use it either under the terms
0006 * of the GPL or the X11 license, at your option. Note that this dual
0007 * licensing only applies to this file, and not this project as a
0008 * whole.
0009 *
0010 * a) This file is free software; you can redistribute it and/or
0011 * modify it under the terms of the GNU General Public License
0012 * version 2 as published by the Free Software Foundation.
0013 *
0014 * This file is distributed in the hope that it will be useful,
0015 * but WITHOUT ANY WARRANTY; without even the implied warranty of
0016 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0017 * GNU General Public License for more details.
0018 *
0019 * Or, alternatively,
0020 *
0021 * b) Permission is hereby granted, free of charge, to any person
0022 * obtaining a copy of this software and associated documentation
0023 * files (the "Software"), to deal in the Software without
0024 * restriction, including without limitation the rights to use,
0025 * copy, modify, merge, publish, distribute, sublicense, and/or
0026 * sell copies of the Software, and to permit persons to whom the
0027 * Software is furnished to do so, subject to the following
0028 * conditions:
0029 *
0030 * The above copyright notice and this permission notice shall be
0031 * included in all copies or substantial portions of the Software.
0032 *
0033 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0034 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0035 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0036 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0037 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0038 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0039 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0040 * OTHER DEALINGS IN THE SOFTWARE.
0041 */
0042
0043 #include <dt-bindings/gpio/gpio.h>
0044 #include <dt-bindings/interrupt-controller/irq.h>
0045
0046 / {
0047 leds {
0048 pinctrl-names = "default";
0049 pinctrl-0 = <&pinctrl_leds1>;
0050 compatible = "gpio-leds";
0051
0052 green-led {
0053 label = "green-led";
0054 gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
0055 default-state = "on";
0056 };
0057
0058 red-led {
0059 label = "red-led";
0060 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
0061 default-state = "off";
0062 };
0063
0064 yel-led {
0065 label = "yellow-led";
0066 gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
0067 default-state = "off";
0068 };
0069
0070 blue-led {
0071 label = "blue-led";
0072 gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;
0073 default-state = "off";
0074 };
0075
0076 en-usb-5v {
0077 label = "en-usb-5v";
0078 gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
0079 default-state = "on";
0080 };
0081
0082 sel_dc_usb {
0083 label = "sel_dc_usb";
0084 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
0085 default-state = "off";
0086 };
0087
0088 };
0089
0090 reg_3p3v: regulator-3p3v {
0091 compatible = "regulator-fixed";
0092 regulator-name = "3p3v";
0093 regulator-min-microvolt = <3300000>;
0094 regulator-max-microvolt = <3300000>;
0095 regulator-always-on;
0096 };
0097
0098 reg_can1_3v3: reg_can1_3v3 {
0099 compatible = "regulator-fixed";
0100 regulator-name = "reg_can1_3v3";
0101 regulator-min-microvolt = <3300000>;
0102 regulator-max-microvolt = <3300000>;
0103 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
0104 enable-active-high;
0105 };
0106
0107 reg_can2_3v3: en-reg_can2_3v3 {
0108 compatible = "regulator-fixed";
0109 regulator-name = "reg_can2_3v3";
0110 regulator-min-microvolt = <3300000>;
0111 regulator-max-microvolt = <3300000>;
0112 gpio = <&gpio6 31 GPIO_ACTIVE_HIGH>;
0113 enable-active-high;
0114 };
0115
0116 reg_usb_otg_vbus: regulator-usb-otg-vbus {
0117 compatible = "regulator-fixed";
0118 regulator-name = "usb_otg_vbus";
0119 regulator-min-microvolt = <5000000>;
0120 regulator-max-microvolt = <5000000>;
0121 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0122 enable-active-high;
0123 };
0124
0125 reg_wlan_vmmc: regulator_wlan_vmmc {
0126 compatible = "regulator-fixed";
0127 regulator-name = "wlan_vmmc";
0128 regulator-min-microvolt = <1800000>;
0129 regulator-max-microvolt = <1800000>;
0130 gpio = <&gpio8 14 GPIO_ACTIVE_HIGH>;
0131 startup-delay-us = <70000>;
0132 enable-active-high;
0133 };
0134
0135 sound-sgtl5000 {
0136 audio-codec = <&sgtl5000>;
0137 audio-routing =
0138 "MIC_IN", "Mic Jack",
0139 "Mic Jack", "Mic Bias",
0140 "Headphone Jack", "HP_OUT";
0141 compatible = "fsl,imx-audio-sgtl5000";
0142 model = "On-board Codec";
0143 mux-ext-port = <3>;
0144 mux-int-port = <1>;
0145 ssi-controller = <&ssi1>;
0146 };
0147 };
0148
0149 &audmux {
0150 status = "okay";
0151 };
0152
0153 &can1 {
0154 pinctrl-names = "default";
0155 pinctrl-0 = <&pinctrl_flexcan1>;
0156 xceiver-supply = <®_can1_3v3>;
0157 status = "okay";
0158 };
0159
0160 &can2 {
0161 pinctrl-names = "default";
0162 pinctrl-0 = <&pinctrl_flexcan2>;
0163 xceiver-supply = <®_can2_3v3>;
0164 status = "okay";
0165 };
0166
0167 &ecspi1 {
0168 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
0169 pinctrl-names = "default";
0170 pinctrl-0 = <&pinctrl_ecspi1>;
0171 status = "okay";
0172
0173 n25q064: flash@0 {
0174 compatible = "micron,n25q064", "jedec,spi-nor";
0175 reg = <0>;
0176 spi-max-frequency = <20000000>;
0177 };
0178 };
0179
0180 &ecspi2 {
0181 cs-gpios = <
0182 &gpio5 31 GPIO_ACTIVE_LOW
0183 &gpio7 12 GPIO_ACTIVE_LOW
0184 &gpio5 18 GPIO_ACTIVE_LOW
0185 >;
0186 pinctrl-names = "default";
0187 pinctrl-0 = <&pinctrl_ecspi2>;
0188 status = "okay";
0189 };
0190
0191 &fec {
0192 pinctrl-names = "default";
0193 pinctrl-0 = <&pinctrl_enet>;
0194 phy-mode = "rgmii";
0195 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
0196 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
0197 fsl,err006687-workaround-present;
0198 status = "okay";
0199 };
0200
0201 &hdmi {
0202 status = "okay";
0203 };
0204
0205 &i2c1 {
0206 clock-frequency = <100000>;
0207 pinctrl-names = "default", "gpio";
0208 pinctrl-0 = <&pinctrl_i2c1>;
0209 pinctrl-1 = <&pinctrl_i2c1_gpio>;
0210 scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
0211 sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
0212 status = "okay";
0213
0214 m41t00s: rtc@68 {
0215 compatible = "m41t00";
0216 reg = <0x68>;
0217 };
0218
0219 isl12022: rtc@6f {
0220 compatible = "isl,isl12022";
0221 reg = <0x6f>;
0222 };
0223
0224 gpio8: gpio@28 {
0225 compatible = "technologic,ts7970-gpio";
0226 reg = <0x28>;
0227 #gpio-cells = <2>;
0228 gpio-controller;
0229 ngpios = <62>;
0230 };
0231
0232 sgtl5000: codec@a {
0233 compatible = "fsl,sgtl5000";
0234 pinctrl-names = "default";
0235 pinctrl-0 = <&pinctrl_sgtl5000>;
0236 reg = <0x0a>;
0237 clocks = <&clks IMX6QDL_CLK_CKO>;
0238 VDDA-supply = <®_3p3v>;
0239 VDDIO-supply = <®_3p3v>;
0240 };
0241 };
0242
0243 &i2c2 {
0244 clock-frequency = <100000>;
0245 pinctrl-names = "default", "gpio";
0246 pinctrl-0 = <&pinctrl_i2c2>;
0247 pinctrl-1 = <&pinctrl_i2c2_gpio>;
0248 scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
0249 sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
0250 status = "okay";
0251 };
0252
0253 &iomuxc {
0254 pinctrl-names = "default";
0255 pinctrl-0 = <&pinctrl_hog>;
0256
0257 pinctrl_ecspi1: ecspi1grp {
0258 fsl,pins = <
0259 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
0260 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
0261 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
0262 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 /* Onboard Flash CS */
0263 >;
0264 };
0265
0266 pinctrl_ecspi2: ecspi2 {
0267 fsl,pins = <
0268 MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1
0269 MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
0270 MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
0271 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x100b1 /* FPGA_SPI_CS0 */
0272 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x100b1 /* FPGA_SPI_CS1 */
0273 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x100b1 /* HD1_SPI_CS */
0274 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b088 /* FPGA_RESET */
0275 MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M 0x10 /* FPGA 24MHZ */
0276 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b088 /* FPGA_IRQ_0 */
0277 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b088 /* FPGA_IRQ_1 */
0278 >;
0279 };
0280
0281 pinctrl_enet: enet {
0282 fsl,pins = <
0283 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0284 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0285 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
0286 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
0287 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
0288 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
0289 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
0290 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
0291 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
0292 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
0293 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
0294 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
0295 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
0296 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
0297 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
0298 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b088
0299 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b088 /* ETH_PHY_RESET */
0300 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
0301 >;
0302 };
0303
0304 pinctrl_flexcan1: flexcan1grp {
0305 fsl,pins = <
0306 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b088
0307 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b088
0308 MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b088 /* EN_CAN_1 */
0309 >;
0310 };
0311
0312 pinctrl_flexcan2: flexcan2grp {
0313 fsl,pins = <
0314 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b088
0315 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b088
0316 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b088 /* EN_CAN_2 */
0317 >;
0318 };
0319
0320 pinctrl_hog: hoggrp {
0321 fsl,pins = <
0322 /* Onboard */
0323 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b088 /* USB_HUB_RESET */
0324 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b088 /* SEL_DC_USB */
0325 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b088 /* EN_USB_5V */
0326 MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1b088 /* JTAG_FPGA_TMS */
0327 MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b088 /* JTAG_FPGA_TCK */
0328 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b088 /* JTAG_FPGA_TDO */
0329 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b088 /* JTAG_FPGA_TDI */
0330 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b088 /* GYRO_INT */
0331 MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x1b088 /* MODBUS_FAULT */
0332 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b088 /* BUS_DIR/JP_SD_BOOT */
0333 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b088 /* EN_MODBUS_24V */
0334 MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x1b088 /* EN_MODBUS_3V */
0335 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b088 /* I210_RESET */
0336 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b088 /* EN_RTC_PWR */
0337 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b088 /* REVSTRAP1 */
0338
0339 /* Offboard */
0340 MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x1b088 /* LCD_D09 */
0341 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b088 /* HD1_IRQ */
0342 MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b088 /* LCD_D10 */
0343 MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x1b088 /* LCD_D11 */
0344 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b088 /* BUS_BHE */
0345 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b088 /* BUS_ALE */
0346 MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b088 /* BUS_CS */
0347 MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b088 /* DIO_20 */
0348 MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b088 /* BUS_WAIT */
0349 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x1b088 /* MUX_AD_00 */
0350 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x1b088 /* MUX_AD_01 */
0351 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b088 /* MUX_AD_02 */
0352 MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x1b088 /* MUX_AD_03 */
0353 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b088 /* MUX_AD_04 */
0354 MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b088 /* MUX_AD_05 */
0355 MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x1b088 /* MUX_AD_06 */
0356 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b088 /* MUX_AD_07 */
0357 MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x1b088 /* MUX_AD_08 */
0358 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x1b088 /* MUX_AD_09 */
0359 MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x1b088 /* MUX_AD_10 */
0360 MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x1b088 /* MUX_AD_11 */
0361 MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x1b088 /* MUX_AD_12 */
0362 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b088 /* MUX_AD_13 */
0363 MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x1b088 /* MUX_AD_14 */
0364 MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b088 /* MUX_AD_15 */
0365
0366 /* Strapping only */
0367 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b088
0368 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x1b088
0369 >;
0370 };
0371
0372 pinctrl_i2c1: i2c1grp {
0373 fsl,pins = <
0374 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
0375 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
0376 >;
0377 };
0378
0379 pinctrl_i2c1_gpio: i2c1gpiogrp {
0380 fsl,pins = <
0381 MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1
0382 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1
0383 >;
0384 };
0385
0386 pinctrl_i2c2: i2c2grp {
0387 fsl,pins = <
0388 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0389 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0390 >;
0391 };
0392
0393 pinctrl_i2c2_gpio: i2c2gpiogrp {
0394 fsl,pins = <
0395 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1
0396 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1
0397 >;
0398 };
0399
0400 pinctrl_leds1: leds1grp {
0401 fsl,pins = <
0402 MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b088 /* GREEN_LED */
0403 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b088 /* RED_LED */
0404 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b088 /* YEL_LED */
0405 MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x1b088 /* IMX6_BLUE_LED */
0406 >;
0407 };
0408
0409 pinctrl_sgtl5000: sgtl5000grp {
0410 fsl,pins = <
0411 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
0412 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
0413 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
0414 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
0415 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* Audio CLK */
0416 >;
0417 };
0418
0419 pinctrl_uart1: uart1grp {
0420 fsl,pins = <
0421 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b088
0422 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b088
0423 >;
0424 };
0425
0426 pinctrl_uart2: uart2grp {
0427 fsl,pins = <
0428 MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b088
0429 MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b088
0430 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b088
0431 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b088
0432 >;
0433 };
0434
0435 pinctrl_uart3: uart3grp {
0436 fsl,pins = <
0437 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b088
0438 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b088
0439 MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b088
0440 MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b088
0441 >;
0442 };
0443
0444 pinctrl_uart4: uart4grp {
0445 fsl,pins = <
0446 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b088
0447 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b088
0448 >;
0449 };
0450
0451 pinctrl_uart5: uart5grp {
0452 fsl,pins = <
0453 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b088
0454 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b088
0455 >;
0456 };
0457
0458 pinctrl_usbotg: usbotggrp {
0459 fsl,pins = <
0460 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
0461 >;
0462 };
0463
0464 pinctrl_usdhc1: usdhc1grp {
0465 fsl,pins = <
0466 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
0467 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
0468 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
0469 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
0470 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
0471 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
0472 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x17059 /* WIFI IRQ */
0473 >;
0474 };
0475
0476 pinctrl_usdhc2: usdhc2grp {
0477 fsl,pins = <
0478 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
0479 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
0480 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
0481 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
0482 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
0483 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
0484 MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b088 /* EN_SD_POWER */
0485 >;
0486 };
0487
0488 pinctrl_usdhc3: usdhc3grp {
0489 fsl,pins = <
0490 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
0491 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
0492 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
0493 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
0494 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
0495 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
0496 >;
0497 };
0498 };
0499
0500 &pcie {
0501 status = "okay";
0502 };
0503
0504 &snvs_rtc {
0505 status = "disabled";
0506 };
0507
0508 &ssi1 {
0509 status = "okay";
0510 };
0511
0512 &uart1 {
0513 pinctrl-names = "default";
0514 pinctrl-0 = <&pinctrl_uart1>;
0515 status = "okay";
0516 };
0517
0518 &uart2 {
0519 pinctrl-names = "default";
0520 pinctrl-0 = <&pinctrl_uart2>;
0521 uart-has-rtscts;
0522 status = "okay";
0523 };
0524
0525 &uart3 {
0526 pinctrl-names = "default";
0527 pinctrl-0 = <&pinctrl_uart3>;
0528 status = "okay";
0529 };
0530
0531 &uart4 {
0532 pinctrl-names = "default";
0533 pinctrl-0 = <&pinctrl_uart4>;
0534 status = "okay";
0535 };
0536
0537 &uart5 {
0538 pinctrl-names = "default";
0539 pinctrl-0 = <&pinctrl_uart5>;
0540 status = "okay";
0541 };
0542
0543 &usbh1 {
0544 status = "okay";
0545 };
0546
0547 &usbotg {
0548 vbus-supply = <®_usb_otg_vbus>;
0549 pinctrl-names = "default";
0550 pinctrl-0 = <&pinctrl_usbotg>;
0551 disable-over-current;
0552 status = "okay";
0553 };
0554
0555 /* WIFI */
0556 &usdhc1 {
0557 pinctrl-names = "default";
0558 pinctrl-0 = <&pinctrl_usdhc1>;
0559 vmmc-supply = <®_wlan_vmmc>;
0560 bus-width = <4>;
0561 non-removable;
0562 #address-cells = <1>;
0563 #size-cells = <0>;
0564 status = "okay";
0565
0566 wlcore: wlcore@2 {
0567 compatible = "ti,wl1271";
0568 reg = <2>;
0569 interrupt-parent = <&gpio1>;
0570 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>;
0571 ref-clock-frequency = <38400000>;
0572 };
0573 };
0574
0575 /* SD */
0576 &usdhc2 {
0577 pinctrl-names = "default";
0578 pinctrl-0 = <&pinctrl_usdhc2>;
0579 vmmc-supply = <®_3p3v>;
0580 bus-width = <4>;
0581 fsl,wp-controller;
0582 status = "okay";
0583 };
0584
0585 /* eMMC */
0586 &usdhc3 {
0587 pinctrl-names = "default";
0588 pinctrl-0 = <&pinctrl_usdhc3>;
0589 vmmc-supply = <®_3p3v>;
0590 bus-width = <4>;
0591 non-removable;
0592 status = "okay";
0593 };
