0001 // SPDX-License-Identifier: GPL-2.0+
0002 //
0003 // Copyright 2012 Freescale Semiconductor, Inc.
0004 // Copyright 2011 Linaro Ltd.
0005
0006 #include <dt-bindings/clock/imx6qdl-clock.h>
0007 #include <dt-bindings/gpio/gpio.h>
0008 #include <dt-bindings/input/input.h>
0009
0010 / {
0011 chosen {
0012 stdout-path = &uart1;
0013 };
0014
0015 memory@10000000 {
0016 device_type = "memory";
0017 reg = <0x10000000 0x40000000>;
0018 };
0019
0020 reg_usb_otg_vbus: regulator-usb-otg-vbus {
0021 compatible = "regulator-fixed";
0022 regulator-name = "usb_otg_vbus";
0023 regulator-min-microvolt = <5000000>;
0024 regulator-max-microvolt = <5000000>;
0025 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0026 enable-active-high;
0027 vin-supply = <&swbst_reg>;
0028 };
0029
0030 reg_usb_h1_vbus: regulator-usb-h1-vbus {
0031 compatible = "regulator-fixed";
0032 regulator-name = "usb_h1_vbus";
0033 regulator-min-microvolt = <5000000>;
0034 regulator-max-microvolt = <5000000>;
0035 gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
0036 enable-active-high;
0037 vin-supply = <&swbst_reg>;
0038 };
0039
0040 reg_audio: regulator-audio {
0041 compatible = "regulator-fixed";
0042 regulator-name = "wm8962-supply";
0043 gpio = <&gpio4 10 GPIO_ACTIVE_HIGH>;
0044 enable-active-high;
0045 };
0046
0047 reg_pcie: regulator-pcie {
0048 compatible = "regulator-fixed";
0049 pinctrl-names = "default";
0050 pinctrl-0 = <&pinctrl_pcie_reg>;
0051 regulator-name = "MPCIE_3V3";
0052 regulator-min-microvolt = <3300000>;
0053 regulator-max-microvolt = <3300000>;
0054 gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
0055 enable-active-high;
0056 };
0057
0058 reg_sensors: regulator-sensors {
0059 compatible = "regulator-fixed";
0060 pinctrl-names = "default";
0061 pinctrl-0 = <&pinctrl_sensors_reg>;
0062 regulator-name = "sensors-supply";
0063 regulator-min-microvolt = <3300000>;
0064 regulator-max-microvolt = <3300000>;
0065 gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
0066 enable-active-high;
0067 };
0068
0069 gpio-keys {
0070 compatible = "gpio-keys";
0071 pinctrl-names = "default";
0072 pinctrl-0 = <&pinctrl_gpio_keys>;
0073
0074 power {
0075 label = "Power Button";
0076 gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
0077 wakeup-source;
0078 linux,code = <KEY_POWER>;
0079 };
0080
0081 volume-up {
0082 label = "Volume Up";
0083 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
0084 wakeup-source;
0085 linux,code = <KEY_VOLUMEUP>;
0086 };
0087
0088 volume-down {
0089 label = "Volume Down";
0090 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
0091 wakeup-source;
0092 linux,code = <KEY_VOLUMEDOWN>;
0093 };
0094 };
0095
0096 sound {
0097 compatible = "fsl,imx6q-sabresd-wm8962",
0098 "fsl,imx-audio-wm8962";
0099 model = "wm8962-audio";
0100 pinctrl-names = "default";
0101 pinctrl-0 = <&pinctrl_hp>;
0102 ssi-controller = <&ssi2>;
0103 audio-codec = <&codec>;
0104 audio-asrc = <&asrc>;
0105 audio-routing =
0106 "Headphone Jack", "HPOUTL",
0107 "Headphone Jack", "HPOUTR",
0108 "Ext Spk", "SPKOUTL",
0109 "Ext Spk", "SPKOUTR",
0110 "AMIC", "MICBIAS",
0111 "IN3R", "AMIC",
0112 "DMIC", "MICBIAS",
0113 "DMICDAT", "DMIC";
0114 mux-int-port = <2>;
0115 mux-ext-port = <3>;
0116 hp-det-gpio = <&gpio7 8 GPIO_ACTIVE_LOW>;
0117 mic-det-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
0118 };
0119
0120 backlight_lvds: backlight-lvds {
0121 compatible = "pwm-backlight";
0122 pwms = <&pwm1 0 5000000>;
0123 brightness-levels = <0 4 8 16 32 64 128 255>;
0124 default-brightness-level = <7>;
0125 status = "okay";
0126 };
0127
0128 leds {
0129 compatible = "gpio-leds";
0130 pinctrl-names = "default";
0131 pinctrl-0 = <&pinctrl_gpio_leds>;
0132
0133 red {
0134 gpios = <&gpio1 2 0>;
0135 default-state = "on";
0136 };
0137 };
0138
0139 panel {
0140 compatible = "hannstar,hsd100pxn1";
0141 backlight = <&backlight_lvds>;
0142
0143 port {
0144 panel_in: endpoint {
0145 remote-endpoint = <&lvds0_out>;
0146 };
0147 };
0148 };
0149 };
0150
0151 &ipu1_csi0_from_ipu1_csi0_mux {
0152 bus-width = <8>;
0153 data-shift = <12>; /* Lines 19:12 used */
0154 hsync-active = <1>;
0155 vsync-active = <1>;
0156 };
0157
0158 &ipu1_csi0_mux_from_parallel_sensor {
0159 remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
0160 };
0161
0162 &ipu1_csi0 {
0163 pinctrl-names = "default";
0164 pinctrl-0 = <&pinctrl_ipu1_csi0>;
0165 };
0166
0167 &mipi_csi {
0168 status = "okay";
0169
0170 port@0 {
0171 reg = <0>;
0172
0173 mipi_csi2_in: endpoint {
0174 remote-endpoint = <&ov5640_to_mipi_csi2>;
0175 clock-lanes = <0>;
0176 data-lanes = <1 2>;
0177 };
0178 };
0179 };
0180
0181 &audmux {
0182 pinctrl-names = "default";
0183 pinctrl-0 = <&pinctrl_audmux>;
0184 status = "okay";
0185 };
0186
0187 &clks {
0188 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
0189 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
0190 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
0191 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
0192 };
0193
0194 &ecspi1 {
0195 cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
0196 pinctrl-names = "default";
0197 pinctrl-0 = <&pinctrl_ecspi1>;
0198 status = "okay";
0199
0200 flash: flash@0 {
0201 #address-cells = <1>;
0202 #size-cells = <1>;
0203 compatible = "st,m25p32", "jedec,spi-nor";
0204 spi-max-frequency = <20000000>;
0205 reg = <0>;
0206 };
0207 };
0208
0209 &fec {
0210 pinctrl-names = "default";
0211 pinctrl-0 = <&pinctrl_enet>;
0212 phy-mode = "rgmii-id";
0213 phy-handle = <&phy>;
0214 fsl,magic-packet;
0215 status = "okay";
0216
0217 mdio {
0218 #address-cells = <1>;
0219 #size-cells = <0>;
0220
0221 phy: ethernet-phy@1 {
0222 reg = <1>;
0223 qca,clk-out-frequency = <125000000>;
0224 reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
0225 reset-assert-us = <10000>;
0226 };
0227 };
0228 };
0229
0230 &hdmi {
0231 pinctrl-names = "default";
0232 pinctrl-0 = <&pinctrl_hdmi_cec>;
0233 ddc-i2c-bus = <&i2c2>;
0234 status = "okay";
0235 };
0236
0237 &i2c1 {
0238 clock-frequency = <100000>;
0239 pinctrl-names = "default";
0240 pinctrl-0 = <&pinctrl_i2c1>;
0241 status = "okay";
0242
0243 codec: wm8962@1a {
0244 compatible = "wlf,wm8962";
0245 reg = <0x1a>;
0246 clocks = <&clks IMX6QDL_CLK_CKO>;
0247 DCVDD-supply = <®_audio>;
0248 DBVDD-supply = <®_audio>;
0249 AVDD-supply = <®_audio>;
0250 CPVDD-supply = <®_audio>;
0251 MICVDD-supply = <®_audio>;
0252 PLLVDD-supply = <®_audio>;
0253 SPKVDD1-supply = <®_audio>;
0254 SPKVDD2-supply = <®_audio>;
0255 gpio-cfg = <
0256 0x0000 /* 0:Default */
0257 0x0000 /* 1:Default */
0258 0x0013 /* 2:FN_DMICCLK */
0259 0x0000 /* 3:Default */
0260 0x8014 /* 4:FN_DMICCDAT */
0261 0x0000 /* 5:Default */
0262 >;
0263 };
0264
0265 accelerometer@1c {
0266 compatible = "fsl,mma8451";
0267 reg = <0x1c>;
0268 pinctrl-names = "default";
0269 pinctrl-0 = <&pinctrl_i2c1_mma8451_int>;
0270 interrupt-parent = <&gpio1>;
0271 interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
0272 vdd-supply = <®_sensors>;
0273 vddio-supply = <®_sensors>;
0274 };
0275
0276 ov5642: camera@3c {
0277 compatible = "ovti,ov5642";
0278 pinctrl-names = "default";
0279 pinctrl-0 = <&pinctrl_ov5642>;
0280 clocks = <&clks IMX6QDL_CLK_CKO>;
0281 clock-names = "xclk";
0282 reg = <0x3c>;
0283 DOVDD-supply = <&vgen4_reg>; /* 1.8v */
0284 AVDD-supply = <&vgen3_reg>; /* 2.8v, rev C board is VGEN3
0285 rev B board is VGEN5 */
0286 DVDD-supply = <&vgen2_reg>; /* 1.5v*/
0287 powerdown-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
0288 reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
0289 status = "disabled";
0290
0291 port {
0292 ov5642_to_ipu1_csi0_mux: endpoint {
0293 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
0294 bus-width = <8>;
0295 hsync-active = <1>;
0296 vsync-active = <1>;
0297 };
0298 };
0299 };
0300 };
0301
0302 &i2c2 {
0303 clock-frequency = <100000>;
0304 pinctrl-names = "default";
0305 pinctrl-0 = <&pinctrl_i2c2>;
0306 status = "okay";
0307
0308 touchscreen@4 {
0309 compatible = "eeti,egalax_ts";
0310 reg = <0x04>;
0311 pinctrl-names = "default";
0312 pinctrl-0 = <&pinctrl_i2c2_egalax_int>;
0313 interrupt-parent = <&gpio6>;
0314 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
0315 wakeup-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
0316 };
0317
0318 ov5640: camera@3c {
0319 compatible = "ovti,ov5640";
0320 pinctrl-names = "default";
0321 pinctrl-0 = <&pinctrl_ov5640>;
0322 reg = <0x3c>;
0323 clocks = <&clks IMX6QDL_CLK_CKO>;
0324 clock-names = "xclk";
0325 DOVDD-supply = <&vgen4_reg>; /* 1.8v */
0326 AVDD-supply = <&vgen3_reg>; /* 2.8v, rev C board is VGEN3
0327 rev B board is VGEN5 */
0328 DVDD-supply = <&vgen2_reg>; /* 1.5v*/
0329 powerdown-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
0330 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
0331
0332 port {
0333 ov5640_to_mipi_csi2: endpoint {
0334 remote-endpoint = <&mipi_csi2_in>;
0335 clock-lanes = <0>;
0336 data-lanes = <1 2>;
0337 };
0338 };
0339 };
0340
0341 pmic: pfuze100@8 {
0342 compatible = "fsl,pfuze100";
0343 reg = <0x08>;
0344
0345 regulators {
0346 sw1a_reg: sw1ab {
0347 regulator-min-microvolt = <300000>;
0348 regulator-max-microvolt = <1875000>;
0349 regulator-boot-on;
0350 regulator-always-on;
0351 regulator-ramp-delay = <6250>;
0352 };
0353
0354 sw1c_reg: sw1c {
0355 regulator-min-microvolt = <300000>;
0356 regulator-max-microvolt = <1875000>;
0357 regulator-boot-on;
0358 regulator-always-on;
0359 regulator-ramp-delay = <6250>;
0360 };
0361
0362 sw2_reg: sw2 {
0363 regulator-min-microvolt = <800000>;
0364 regulator-max-microvolt = <3300000>;
0365 regulator-boot-on;
0366 regulator-always-on;
0367 regulator-ramp-delay = <6250>;
0368 };
0369
0370 sw3a_reg: sw3a {
0371 regulator-min-microvolt = <400000>;
0372 regulator-max-microvolt = <1975000>;
0373 regulator-boot-on;
0374 regulator-always-on;
0375 };
0376
0377 sw3b_reg: sw3b {
0378 regulator-min-microvolt = <400000>;
0379 regulator-max-microvolt = <1975000>;
0380 regulator-boot-on;
0381 regulator-always-on;
0382 };
0383
0384 sw4_reg: sw4 {
0385 regulator-min-microvolt = <800000>;
0386 regulator-max-microvolt = <3300000>;
0387 regulator-always-on;
0388 };
0389
0390 swbst_reg: swbst {
0391 regulator-min-microvolt = <5000000>;
0392 regulator-max-microvolt = <5150000>;
0393 };
0394
0395 snvs_reg: vsnvs {
0396 regulator-min-microvolt = <1000000>;
0397 regulator-max-microvolt = <3000000>;
0398 regulator-boot-on;
0399 regulator-always-on;
0400 };
0401
0402 vref_reg: vrefddr {
0403 regulator-boot-on;
0404 regulator-always-on;
0405 };
0406
0407 vgen1_reg: vgen1 {
0408 regulator-min-microvolt = <800000>;
0409 regulator-max-microvolt = <1550000>;
0410 };
0411
0412 vgen2_reg: vgen2 {
0413 regulator-min-microvolt = <800000>;
0414 regulator-max-microvolt = <1550000>;
0415 };
0416
0417 vgen3_reg: vgen3 {
0418 regulator-min-microvolt = <1800000>;
0419 regulator-max-microvolt = <3300000>;
0420 };
0421
0422 vgen4_reg: vgen4 {
0423 regulator-min-microvolt = <1800000>;
0424 regulator-max-microvolt = <3300000>;
0425 regulator-always-on;
0426 };
0427
0428 vgen5_reg: vgen5 {
0429 regulator-min-microvolt = <1800000>;
0430 regulator-max-microvolt = <3300000>;
0431 regulator-always-on;
0432 };
0433
0434 vgen6_reg: vgen6 {
0435 regulator-min-microvolt = <1800000>;
0436 regulator-max-microvolt = <3300000>;
0437 regulator-always-on;
0438 };
0439 };
0440 };
0441 };
0442
0443 &i2c3 {
0444 clock-frequency = <100000>;
0445 pinctrl-names = "default";
0446 pinctrl-0 = <&pinctrl_i2c3>;
0447 status = "okay";
0448
0449 egalax_ts@4 {
0450 compatible = "eeti,egalax_ts";
0451 reg = <0x04>;
0452 interrupt-parent = <&gpio6>;
0453 interrupts = <7 2>;
0454 wakeup-gpios = <&gpio6 7 0>;
0455 };
0456
0457 magnetometer@e {
0458 compatible = "fsl,mag3110";
0459 reg = <0x0e>;
0460 pinctrl-names = "default";
0461 pinctrl-0 = <&pinctrl_i2c3_mag3110_int>;
0462 interrupt-parent = <&gpio3>;
0463 interrupts = <16 IRQ_TYPE_EDGE_RISING>;
0464 vdd-supply = <®_sensors>;
0465 vddio-supply = <®_sensors>;
0466 };
0467
0468 light-sensor@44 {
0469 compatible = "isil,isl29023";
0470 reg = <0x44>;
0471 pinctrl-names = "default";
0472 pinctrl-0 = <&pinctrl_i2c3_isl29023_int>;
0473 interrupt-parent = <&gpio3>;
0474 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
0475 vcc-supply = <®_sensors>;
0476 };
0477 };
0478
0479 &iomuxc {
0480 pinctrl-names = "default";
0481 pinctrl-0 = <&pinctrl_hog>;
0482
0483 imx6qdl-sabresd {
0484 pinctrl_hog: hoggrp {
0485 fsl,pins = <
0486 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
0487 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
0488 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
0489 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
0490 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
0491 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
0492 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
0493 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
0494 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
0495 >;
0496 };
0497
0498 pinctrl_audmux: audmuxgrp {
0499 fsl,pins = <
0500 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
0501 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
0502 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
0503 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
0504 >;
0505 };
0506
0507 pinctrl_ecspi1: ecspi1grp {
0508 fsl,pins = <
0509 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
0510 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
0511 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
0512 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
0513 >;
0514 };
0515
0516 pinctrl_enet: enetgrp {
0517 fsl,pins = <
0518 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0519 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0520 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
0521 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
0522 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
0523 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
0524 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
0525 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0526 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
0527 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0528 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0529 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0530 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0531 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0532 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
0533 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
0534 >;
0535 };
0536
0537 pinctrl_gpio_keys: gpio_keysgrp {
0538 fsl,pins = <
0539 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
0540 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
0541 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
0542 >;
0543 };
0544
0545 pinctrl_hdmi_cec: hdmicecgrp {
0546 fsl,pins = <
0547 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
0548 >;
0549 };
0550
0551 pinctrl_hp: hpgrp {
0552 fsl,pins = <
0553 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b0
0554 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
0555 >;
0556 };
0557
0558 pinctrl_i2c1: i2c1grp {
0559 fsl,pins = <
0560 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
0561 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
0562 >;
0563 };
0564
0565 pinctrl_i2c1_mma8451_int: i2c1mma8451intgrp {
0566 fsl,pins = <
0567 MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0xb0b1
0568 >;
0569 };
0570
0571 pinctrl_i2c2: i2c2grp {
0572 fsl,pins = <
0573 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0574 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0575 >;
0576 };
0577
0578 pinctrl_i2c2_egalax_int: i2c2egalaxintgrp {
0579 fsl,pins = <
0580 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x1b0b0
0581 >;
0582 };
0583
0584 pinctrl_i2c3: i2c3grp {
0585 fsl,pins = <
0586 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
0587 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0588 >;
0589 };
0590
0591 pinctrl_i2c3_isl29023_int: i2c3isl29023intgrp {
0592 fsl,pins = <
0593 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0xb0b1
0594 >;
0595 };
0596
0597 pinctrl_i2c3_mag3110_int: i2c3mag3110intgrp {
0598 fsl,pins = <
0599 MX6QDL_PAD_EIM_D16__GPIO3_IO16 0xb0b1
0600 >;
0601 };
0602
0603 pinctrl_ipu1_csi0: ipu1csi0grp {
0604 fsl,pins = <
0605 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
0606 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
0607 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
0608 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
0609 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
0610 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
0611 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
0612 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
0613 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
0614 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
0615 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
0616 >;
0617 };
0618
0619 pinctrl_ov5640: ov5640grp {
0620 fsl,pins = <
0621 MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x1b0b0
0622 MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x1b0b0
0623 >;
0624 };
0625
0626 pinctrl_ov5642: ov5642grp {
0627 fsl,pins = <
0628 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
0629 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
0630 >;
0631 };
0632
0633 pinctrl_pcie: pciegrp {
0634 fsl,pins = <
0635 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
0636 >;
0637 };
0638
0639 pinctrl_pcie_reg: pciereggrp {
0640 fsl,pins = <
0641 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0
0642 >;
0643 };
0644
0645 pinctrl_pwm1: pwm1grp {
0646 fsl,pins = <
0647 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
0648 >;
0649 };
0650
0651 pinctrl_sensors_reg: sensorsreggrp {
0652 fsl,pins = <
0653 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b0
0654 >;
0655 };
0656
0657 pinctrl_uart1: uart1grp {
0658 fsl,pins = <
0659 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
0660 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
0661 >;
0662 };
0663
0664 pinctrl_usbotg: usbotggrp {
0665 fsl,pins = <
0666 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
0667 >;
0668 };
0669
0670 pinctrl_usdhc2: usdhc2grp {
0671 fsl,pins = <
0672 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
0673 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
0674 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
0675 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
0676 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
0677 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
0678 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
0679 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
0680 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
0681 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
0682 >;
0683 };
0684
0685 pinctrl_usdhc3: usdhc3grp {
0686 fsl,pins = <
0687 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
0688 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
0689 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
0690 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
0691 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
0692 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
0693 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
0694 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
0695 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
0696 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
0697 >;
0698 };
0699
0700 pinctrl_usdhc4: usdhc4grp {
0701 fsl,pins = <
0702 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
0703 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
0704 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
0705 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
0706 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
0707 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
0708 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
0709 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
0710 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
0711 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
0712 >;
0713 };
0714
0715 pinctrl_wdog: wdoggrp {
0716 fsl,pins = <
0717 MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0
0718 >;
0719 };
0720 };
0721
0722 gpio_leds {
0723 pinctrl_gpio_leds: gpioledsgrp {
0724 fsl,pins = <
0725 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
0726 >;
0727 };
0728 };
0729 };
0730
0731 &ldb {
0732 status = "okay";
0733
0734 lvds-channel@1 {
0735 fsl,data-mapping = "spwg";
0736 fsl,data-width = <18>;
0737 status = "okay";
0738
0739 port@4 {
0740 reg = <4>;
0741
0742 lvds0_out: endpoint {
0743 remote-endpoint = <&panel_in>;
0744 };
0745 };
0746 };
0747 };
0748
0749 &pcie {
0750 pinctrl-names = "default";
0751 pinctrl-0 = <&pinctrl_pcie>;
0752 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
0753 vpcie-supply = <®_pcie>;
0754 status = "okay";
0755 };
0756
0757 &pwm1 {
0758 #pwm-cells = <2>;
0759 pinctrl-names = "default";
0760 pinctrl-0 = <&pinctrl_pwm1>;
0761 status = "okay";
0762 };
0763
0764 ®_arm {
0765 vin-supply = <&sw1a_reg>;
0766 };
0767
0768 ®_pu {
0769 vin-supply = <&sw1c_reg>;
0770 };
0771
0772 ®_soc {
0773 vin-supply = <&sw1c_reg>;
0774 };
0775
0776 ®_vdd1p1 {
0777 vin-supply = <&vgen5_reg>;
0778 };
0779
0780 ®_vdd2p5 {
0781 vin-supply = <&vgen5_reg>;
0782 };
0783
0784 &snvs_poweroff {
0785 status = "okay";
0786 };
0787
0788 &snvs_pwrkey {
0789 status = "okay";
0790 };
0791
0792 &ssi2 {
0793 status = "okay";
0794 };
0795
0796 &uart1 {
0797 pinctrl-names = "default";
0798 pinctrl-0 = <&pinctrl_uart1>;
0799 status = "okay";
0800 };
0801
0802 &usbh1 {
0803 vbus-supply = <®_usb_h1_vbus>;
0804 status = "okay";
0805 };
0806
0807 &usbotg {
0808 vbus-supply = <®_usb_otg_vbus>;
0809 pinctrl-names = "default";
0810 pinctrl-0 = <&pinctrl_usbotg>;
0811 disable-over-current;
0812 status = "okay";
0813 };
0814
0815 &usdhc2 {
0816 pinctrl-names = "default";
0817 pinctrl-0 = <&pinctrl_usdhc2>;
0818 bus-width = <8>;
0819 cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
0820 wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
0821 status = "okay";
0822 };
0823
0824 &usdhc3 {
0825 pinctrl-names = "default";
0826 pinctrl-0 = <&pinctrl_usdhc3>;
0827 bus-width = <8>;
0828 cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
0829 wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
0830 status = "okay";
0831 };
0832
0833 &usdhc4 {
0834 pinctrl-names = "default";
0835 pinctrl-0 = <&pinctrl_usdhc4>;
0836 bus-width = <8>;
0837 non-removable;
0838 no-1-8-v;
0839 status = "okay";
0840 };
0841
0842 &wdog1 {
0843 status = "disabled";
0844 };
0845
0846 &wdog2 {
0847 pinctrl-names = "default";
0848 pinctrl-0 = <&pinctrl_wdog>;
0849 fsl,ext-reset-output;
0850 status = "okay";
0851 };
