0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright 2014 FEDEVEL, Inc.
0004 *
0005 * Author: Robert Nelson <robertcnelson@gmail.com>
0006 */
0007
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include <dt-bindings/input/input.h>
0010
0011 / {
0012 chosen {
0013 stdout-path = &uart1;
0014 };
0015
0016 regulators {
0017 compatible = "simple-bus";
0018 #address-cells = <1>;
0019 #size-cells = <0>;
0020
0021 reg_3p3v: regulator@0 {
0022 compatible = "regulator-fixed";
0023 reg = <0>;
0024 regulator-name = "3P3V";
0025 regulator-min-microvolt = <3300000>;
0026 regulator-max-microvolt = <3300000>;
0027 regulator-always-on;
0028 };
0029
0030 reg_usbh1_vbus: regulator@1 {
0031 compatible = "regulator-fixed";
0032 reg = <1>;
0033 pinctrl-names = "default";
0034 regulator-name = "usbh1_vbus";
0035 regulator-min-microvolt = <5000000>;
0036 regulator-max-microvolt = <5000000>;
0037 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
0038 enable-active-high;
0039 };
0040
0041 reg_usb_otg_vbus: regulator@2 {
0042 compatible = "regulator-fixed";
0043 reg = <2>;
0044 pinctrl-names = "default";
0045 regulator-name = "usb_otg_vbus";
0046 regulator-min-microvolt = <5000000>;
0047 regulator-max-microvolt = <5000000>;
0048 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0049 enable-active-high;
0050 };
0051 };
0052
0053 leds {
0054 compatible = "gpio-leds";
0055 pinctrl-names = "default";
0056 pinctrl-0 = <&pinctrl_led>;
0057
0058 led0: usr {
0059 label = "usr";
0060 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
0061 default-state = "off";
0062 linux,default-trigger = "heartbeat";
0063 };
0064 };
0065
0066 sound {
0067 compatible = "fsl,imx6-rex-sgtl5000",
0068 "fsl,imx-audio-sgtl5000";
0069 model = "imx6-rex-sgtl5000";
0070 ssi-controller = <&ssi1>;
0071 audio-codec = <&codec>;
0072 audio-routing =
0073 "MIC_IN", "Mic Jack",
0074 "Mic Jack", "Mic Bias",
0075 "Headphone Jack", "HP_OUT";
0076 mux-int-port = <1>;
0077 mux-ext-port = <3>;
0078 };
0079 };
0080
0081 &audmux {
0082 pinctrl-names = "default";
0083 pinctrl-0 = <&pinctrl_audmux>;
0084 status = "okay";
0085 };
0086
0087 &ecspi2 {
0088 cs-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
0089 pinctrl-names = "default";
0090 pinctrl-0 = <&pinctrl_ecspi2>;
0091 status = "okay";
0092 };
0093
0094 &ecspi3 {
0095 cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
0096 pinctrl-names = "default";
0097 pinctrl-0 = <&pinctrl_ecspi3>;
0098 status = "okay";
0099 };
0100
0101 &fec {
0102 pinctrl-names = "default";
0103 pinctrl-0 = <&pinctrl_enet>;
0104 phy-mode = "rgmii";
0105 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
0106 status = "okay";
0107 };
0108
0109 &hdmi {
0110 ddc-i2c-bus = <&i2c2>;
0111 status = "okay";
0112 };
0113
0114 &i2c1 {
0115 clock-frequency = <100000>;
0116 pinctrl-names = "default";
0117 pinctrl-0 = <&pinctrl_i2c1>;
0118 status = "okay";
0119
0120 codec: sgtl5000@a {
0121 compatible = "fsl,sgtl5000";
0122 reg = <0x0a>;
0123 clocks = <&clks IMX6QDL_CLK_CKO>;
0124 VDDA-supply = <®_3p3v>;
0125 VDDIO-supply = <®_3p3v>;
0126 };
0127 };
0128
0129 &i2c2 {
0130 clock-frequency = <100000>;
0131 pinctrl-names = "default";
0132 pinctrl-0 = <&pinctrl_i2c2>;
0133 status = "okay";
0134
0135 pca9535: gpio-expander@27 {
0136 compatible = "nxp,pca9535";
0137 reg = <0x27>;
0138 gpio-controller;
0139 #gpio-cells = <2>;
0140 pinctrl-names = "default";
0141 pinctrl-0 = <&pinctrl_pca9535>;
0142 interrupt-parent = <&gpio6>;
0143 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
0144 interrupt-controller;
0145 #interrupt-cells = <2>;
0146 };
0147
0148 eeprom@57 {
0149 compatible = "atmel,24c02";
0150 reg = <0x57>;
0151 };
0152 };
0153
0154 &i2c3 {
0155 clock-frequency = <100000>;
0156 pinctrl-names = "default";
0157 pinctrl-0 = <&pinctrl_i2c3>;
0158 status = "okay";
0159 };
0160
0161 &iomuxc {
0162 pinctrl-names = "default";
0163 pinctrl-0 = <&pinctrl_hog>;
0164
0165 imx6qdl-rex {
0166 pinctrl_hog: hoggrp {
0167 fsl,pins = <
0168 /* SGTL5000 sys_mclk */
0169 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
0170 >;
0171 };
0172
0173 pinctrl_audmux: audmuxgrp {
0174 fsl,pins = <
0175 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
0176 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
0177 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
0178 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
0179 >;
0180 };
0181
0182 pinctrl_ecspi2: ecspi2grp {
0183 fsl,pins = <
0184 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
0185 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
0186 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
0187 /* CS */
0188 MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x000b1
0189 >;
0190 };
0191
0192 pinctrl_ecspi3: ecspi3grp {
0193 fsl,pins = <
0194 MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO 0x100b1
0195 MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x100b1
0196 MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x100b1
0197 /* CS */
0198 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x000b1
0199 >;
0200 };
0201
0202 pinctrl_enet: enetgrp {
0203 fsl,pins = <
0204 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0205 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0206 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
0207 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
0208 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
0209 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
0210 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
0211 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0212 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
0213 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0214 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0215 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0216 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0217 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0218 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
0219 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
0220 /* Phy reset */
0221 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0
0222 >;
0223 };
0224
0225 pinctrl_i2c1: i2c1grp {
0226 fsl,pins = <
0227 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
0228 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
0229 >;
0230 };
0231
0232 pinctrl_i2c2: i2c2grp {
0233 fsl,pins = <
0234 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0235 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0236 >;
0237 };
0238
0239 pinctrl_i2c3: i2c3grp {
0240 fsl,pins = <
0241 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
0242 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
0243 >;
0244 };
0245
0246 pinctrl_led: ledgrp {
0247 fsl,pins = <
0248 /* user led */
0249 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
0250 >;
0251 };
0252
0253 pinctrl_pca9535: pca9535grp {
0254 fsl,pins = <
0255 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x17059
0256 >;
0257 };
0258
0259 pinctrl_uart1: uart1grp {
0260 fsl,pins = <
0261 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
0262 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
0263 >;
0264 };
0265
0266 pinctrl_uart2: uart2grp {
0267 fsl,pins = <
0268 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
0269 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
0270 >;
0271 };
0272
0273 pinctrl_usbh1: usbh1grp {
0274 fsl,pins = <
0275 /* power enable, high active */
0276 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x10b0
0277 >;
0278 };
0279
0280 pinctrl_usbotg: usbotggrp {
0281 fsl,pins = <
0282 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
0283 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
0284 /* power enable, high active */
0285 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x10b0
0286 >;
0287 };
0288
0289 pinctrl_usdhc2: usdhc2grp {
0290 fsl,pins = <
0291 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
0292 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
0293 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
0294 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
0295 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
0296 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
0297 /* CD */
0298 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
0299 /* WP */
0300 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1f0b0
0301 >;
0302 };
0303
0304 pinctrl_usdhc3: usdhc3grp {
0305 fsl,pins = <
0306 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
0307 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
0308 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
0309 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
0310 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
0311 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
0312 /* CD */
0313 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
0314 /* WP */
0315 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1f0b0
0316 >;
0317 };
0318 };
0319 };
0320
0321 &ssi1 {
0322 status = "okay";
0323 };
0324
0325 &uart1 {
0326 pinctrl-names = "default";
0327 pinctrl-0 = <&pinctrl_uart1>;
0328 status = "okay";
0329 };
0330
0331 &uart2 {
0332 pinctrl-names = "default";
0333 pinctrl-0 = <&pinctrl_uart2>;
0334 status = "okay";
0335 };
0336
0337 &usbh1 {
0338 vbus-supply = <®_usbh1_vbus>;
0339 pinctrl-names = "default";
0340 pinctrl-0 = <&pinctrl_usbh1>;
0341 status = "okay";
0342 };
0343
0344 &usbotg {
0345 vbus-supply = <®_usb_otg_vbus>;
0346 pinctrl-names = "default";
0347 pinctrl-0 = <&pinctrl_usbotg>;
0348 status = "okay";
0349 };
0350
0351 &usdhc2 {
0352 pinctrl-names = "default";
0353 pinctrl-0 = <&pinctrl_usdhc2>;
0354 bus-width = <4>;
0355 cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
0356 wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
0357 status = "okay";
0358 };
0359
0360 &usdhc3 {
0361 pinctrl-names = "default";
0362 pinctrl-0 = <&pinctrl_usdhc3>;
0363 bus-width = <4>;
0364 cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
0365 wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
0366 status = "okay";
0367 };
